cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bsru6.h (3113B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * bsru6.h - ALPS BSRU6 tuner support (moved from budget-ci.c)
      4 *
      5 * the project's page is at https://linuxtv.org
      6 */
      7
      8#ifndef BSRU6_H
      9#define BSRU6_H
     10
     11static u8 alps_bsru6_inittab[] = {
     12	0x01, 0x15,
     13	0x02, 0x30,
     14	0x03, 0x00,
     15	0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
     16	0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
     17	0x06, 0x40,   /* DAC not used, set to high impendance mode */
     18	0x07, 0x00,   /* DAC LSB */
     19	0x08, 0x40,   /* DiSEqC off, LNB power on OP2/LOCK pin on */
     20	0x09, 0x00,   /* FIFO */
     21	0x0c, 0x51,   /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
     22	0x0d, 0x82,   /* DC offset compensation = ON, beta_agc1 = 2 */
     23	0x0e, 0x23,   /* alpha_tmg = 2, beta_tmg = 3 */
     24	0x10, 0x3f,   // AGC2  0x3d
     25	0x11, 0x84,
     26	0x12, 0xb9,
     27	0x15, 0xc9,   // lock detector threshold
     28	0x16, 0x00,
     29	0x17, 0x00,
     30	0x18, 0x00,
     31	0x19, 0x00,
     32	0x1a, 0x00,
     33	0x1f, 0x50,
     34	0x20, 0x00,
     35	0x21, 0x00,
     36	0x22, 0x00,
     37	0x23, 0x00,
     38	0x28, 0x00,  // out imp: normal  out type: parallel FEC mode:0
     39	0x29, 0x1e,  // 1/2 threshold
     40	0x2a, 0x14,  // 2/3 threshold
     41	0x2b, 0x0f,  // 3/4 threshold
     42	0x2c, 0x09,  // 5/6 threshold
     43	0x2d, 0x05,  // 7/8 threshold
     44	0x2e, 0x01,
     45	0x31, 0x1f,  // test all FECs
     46	0x32, 0x19,  // viterbi and synchro search
     47	0x33, 0xfc,  // rs control
     48	0x34, 0x93,  // error control
     49	0x0f, 0x52,
     50	0xff, 0xff
     51};
     52
     53static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
     54{
     55	u8 aclk = 0;
     56	u8 bclk = 0;
     57
     58	if (srate < 1500000) {
     59		aclk = 0xb7;
     60		bclk = 0x47;
     61	} else if (srate < 3000000) {
     62		aclk = 0xb7;
     63		bclk = 0x4b;
     64	} else if (srate < 7000000) {
     65		aclk = 0xb7;
     66		bclk = 0x4f;
     67	} else if (srate < 14000000) {
     68		aclk = 0xb7;
     69		bclk = 0x53;
     70	} else if (srate < 30000000) {
     71		aclk = 0xb6;
     72		bclk = 0x53;
     73	} else if (srate < 45000000) {
     74		aclk = 0xb4;
     75		bclk = 0x51;
     76	}
     77
     78	stv0299_writereg(fe, 0x13, aclk);
     79	stv0299_writereg(fe, 0x14, bclk);
     80	stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
     81	stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
     82	stv0299_writereg(fe, 0x21, ratio & 0xf0);
     83
     84	return 0;
     85}
     86
     87static int alps_bsru6_tuner_set_params(struct dvb_frontend *fe)
     88{
     89	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
     90	u8 buf[4];
     91	u32 div;
     92	struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
     93	struct i2c_adapter *i2c = fe->tuner_priv;
     94
     95	if ((p->frequency < 950000) || (p->frequency > 2150000))
     96		return -EINVAL;
     97
     98	div = (p->frequency + (125 - 1)) / 125;	/* round correctly */
     99	buf[0] = (div >> 8) & 0x7f;
    100	buf[1] = div & 0xff;
    101	buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
    102	buf[3] = 0xC4;
    103
    104	if (p->frequency > 1530000)
    105		buf[3] = 0xc0;
    106
    107	if (fe->ops.i2c_gate_ctrl)
    108		fe->ops.i2c_gate_ctrl(fe, 1);
    109	if (i2c_transfer(i2c, &msg, 1) != 1)
    110		return -EIO;
    111	return 0;
    112}
    113
    114static struct stv0299_config alps_bsru6_config = {
    115	.demod_address = 0x68,
    116	.inittab = alps_bsru6_inittab,
    117	.mclk = 88000000UL,
    118	.invert = 1,
    119	.skip_reinit = 0,
    120	.lock_output = STV0299_LOCKOUTPUT_1,
    121	.volt13_op0_op1 = STV0299_VOLT13_OP1,
    122	.min_delay_ms = 100,
    123	.set_symbol_rate = alps_bsru6_set_symbol_rate,
    124};
    125
    126#endif