cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cxd2880_tnrdmd_dvbt2.h (1698B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * cxd2880_tnrdmd_dvbt2.h
      4 * Sony CXD2880 DVB-T2/T tuner + demodulator driver
      5 * control interface for DVB-T2
      6 *
      7 * Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation
      8 */
      9
     10#ifndef CXD2880_TNRDMD_DVBT2_H
     11#define CXD2880_TNRDMD_DVBT2_H
     12
     13#include "cxd2880_common.h"
     14#include "cxd2880_tnrdmd.h"
     15
     16enum cxd2880_tnrdmd_dvbt2_tune_info {
     17	CXD2880_TNRDMD_DVBT2_TUNE_INFO_OK,
     18	CXD2880_TNRDMD_DVBT2_TUNE_INFO_INVALID_PLP_ID
     19};
     20
     21struct cxd2880_dvbt2_tune_param {
     22	u32 center_freq_khz;
     23	enum cxd2880_dtv_bandwidth bandwidth;
     24	u16 data_plp_id;
     25	enum cxd2880_dvbt2_profile profile;
     26	enum cxd2880_tnrdmd_dvbt2_tune_info tune_info;
     27};
     28
     29#define CXD2880_DVBT2_TUNE_PARAM_PLPID_AUTO  0xffff
     30
     31int cxd2880_tnrdmd_dvbt2_tune1(struct cxd2880_tnrdmd *tnr_dmd,
     32			       struct cxd2880_dvbt2_tune_param
     33			       *tune_param);
     34
     35int cxd2880_tnrdmd_dvbt2_tune2(struct cxd2880_tnrdmd *tnr_dmd,
     36			       struct cxd2880_dvbt2_tune_param
     37			       *tune_param);
     38
     39int cxd2880_tnrdmd_dvbt2_sleep_setting(struct cxd2880_tnrdmd
     40				       *tnr_dmd);
     41
     42int cxd2880_tnrdmd_dvbt2_check_demod_lock(struct cxd2880_tnrdmd
     43					  *tnr_dmd,
     44					  enum
     45					  cxd2880_tnrdmd_lock_result
     46					  *lock);
     47
     48int cxd2880_tnrdmd_dvbt2_check_ts_lock(struct cxd2880_tnrdmd
     49				       *tnr_dmd,
     50				       enum
     51				       cxd2880_tnrdmd_lock_result
     52				       *lock);
     53
     54int cxd2880_tnrdmd_dvbt2_set_plp_cfg(struct cxd2880_tnrdmd
     55				     *tnr_dmd, u8 auto_plp,
     56				     u8 plp_id);
     57
     58int cxd2880_tnrdmd_dvbt2_diver_fef_setting(struct cxd2880_tnrdmd
     59					   *tnr_dmd);
     60
     61int cxd2880_tnrdmd_dvbt2_check_l1post_valid(struct cxd2880_tnrdmd
     62					    *tnr_dmd,
     63					    u8 *l1_post_valid);
     64
     65#endif