cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ccs-reg-access.h (1286B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * include/media/ccs/ccs-reg-access.h
      4 *
      5 * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
      6 *
      7 * Copyright (C) 2020 Intel Corporation
      8 * Copyright (C) 2011--2012 Nokia Corporation
      9 * Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
     10 */
     11
     12#ifndef SMIAPP_REGS_H
     13#define SMIAPP_REGS_H
     14
     15#include <linux/i2c.h>
     16#include <linux/types.h>
     17
     18#include "ccs-regs.h"
     19
     20#define CCS_REG_ADDR(reg)		((u16)reg)
     21
     22struct ccs_sensor;
     23
     24int ccs_read_addr_no_quirk(struct ccs_sensor *sensor, u32 reg, u32 *val);
     25int ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val);
     26int ccs_read_addr_8only(struct ccs_sensor *sensor, u32 reg, u32 *val);
     27int ccs_read_addr_noconv(struct ccs_sensor *sensor, u32 reg, u32 *val);
     28int ccs_write_addr_no_quirk(struct ccs_sensor *sensor, u32 reg, u32 val);
     29int ccs_write_addr(struct ccs_sensor *sensor, u32 reg, u32 val);
     30int ccs_write_data_regs(struct ccs_sensor *sensor, struct ccs_reg *regs,
     31			size_t num_regs);
     32
     33unsigned int ccs_reg_width(u32 reg);
     34u32 ccs_reg_conv(struct ccs_sensor *sensor, u32 reg, u32 val);
     35
     36#define ccs_read(sensor, reg_name, val) \
     37	ccs_read_addr(sensor, CCS_R_##reg_name, val)
     38
     39#define ccs_write(sensor, reg_name, val) \
     40	ccs_write_addr(sensor, CCS_R_##reg_name, val)
     41
     42#endif