cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ths8200_regs.h (6003B)


      1/*
      2 * ths8200 - Texas Instruments THS8200 video encoder driver
      3 *
      4 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates.
      5 *
      6 * This program is free software; you may redistribute it and/or modify
      7 * it under the terms of the GNU General Public License as published by
      8 * the Free Software Foundation; version 2 of the License.
      9 *
     10 * This program is free software; you can redistribute it and/or
     11 * modify it under the terms of the GNU General Public License as
     12 * published by the Free Software Foundation version 2.
     13 *
     14 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
     15 * kind, whether express or implied; without even the implied warranty
     16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 * GNU General Public License for more details.
     18 */
     19
     20#ifndef THS8200_REGS_H
     21#define THS8200_REGS_H
     22
     23/* Register offset macros */
     24#define THS8200_VERSION				0x02
     25#define THS8200_CHIP_CTL			0x03
     26#define THS8200_CSC_R11				0x04
     27#define THS8200_CSC_R12				0x05
     28#define THS8200_CSC_R21				0x06
     29#define THS8200_CSC_R22				0x07
     30#define THS8200_CSC_R31				0x08
     31#define THS8200_CSC_R32				0x09
     32#define THS8200_CSC_G11				0x0a
     33#define THS8200_CSC_G12				0x0b
     34#define THS8200_CSC_G21				0x0c
     35#define THS8200_CSC_G22				0x0d
     36#define THS8200_CSC_G31				0x0e
     37#define THS8200_CSC_G32				0x0f
     38#define THS8200_CSC_B11				0x10
     39#define THS8200_CSC_B12				0x11
     40#define THS8200_CSC_B21				0x12
     41#define THS8200_CSC_B22				0x13
     42#define THS8200_CSC_B31				0x14
     43#define THS8200_CSC_B32				0x15
     44#define THS8200_CSC_OFFS1			0x16
     45#define THS8200_CSC_OFFS12			0x17
     46#define THS8200_CSC_OFFS23			0x18
     47#define THS8200_CSC_OFFS3			0x19
     48#define THS8200_TST_CNTL1			0x1a
     49#define THS8200_TST_CNTL2			0x1b
     50#define THS8200_DATA_CNTL			0x1c
     51#define THS8200_DTG1_Y_SYNC1_LSB		0x1d
     52#define THS8200_DTG1_Y_SYNC2_LSB		0x1e
     53#define THS8200_DTG1_Y_SYNC3_LSB		0x1f
     54#define THS8200_DTG1_CBCR_SYNC1_LSB		0x20
     55#define THS8200_DTG1_CBCR_SYNC2_LSB		0x21
     56#define THS8200_DTG1_CBCR_SYNC3_LSB		0x22
     57#define THS8200_DTG1_Y_SYNC_MSB			0x23
     58#define THS8200_DTG1_CBCR_SYNC_MSB		0x24
     59#define THS8200_DTG1_SPEC_A			0x25
     60#define THS8200_DTG1_SPEC_B			0x26
     61#define THS8200_DTG1_SPEC_C			0x27
     62#define THS8200_DTG1_SPEC_D_LSB			0x28
     63#define THS8200_DTG1_SPEC_D1			0x29
     64#define THS8200_DTG1_SPEC_E_LSB			0x2a
     65#define THS8200_DTG1_SPEC_DEH_MSB		0x2b
     66#define THS8200_DTG1_SPEC_H_LSB			0x2c
     67#define THS8200_DTG1_SPEC_I_MSB			0x2d
     68#define THS8200_DTG1_SPEC_I_LSB			0x2e
     69#define THS8200_DTG1_SPEC_K_LSB			0x2f
     70#define THS8200_DTG1_SPEC_K_MSB			0x30
     71#define THS8200_DTG1_SPEC_K1			0x31
     72#define THS8200_DTG1_SPEC_G_LSB			0x32
     73#define THS8200_DTG1_SPEC_G_MSB			0x33
     74#define THS8200_DTG1_TOT_PIXELS_MSB		0x34
     75#define THS8200_DTG1_TOT_PIXELS_LSB		0x35
     76#define THS8200_DTG1_FLD_FLIP_LINECNT_MSB	0x36
     77#define THS8200_DTG1_LINECNT_LSB		0x37
     78#define THS8200_DTG1_MODE			0x38
     79#define THS8200_DTG1_FRAME_FIELD_SZ_MSB		0x39
     80#define THS8200_DTG1_FRAME_SZ_LSB		0x3a
     81#define THS8200_DTG1_FIELD_SZ_LSB		0x3b
     82#define THS8200_DTG1_VESA_CBAR_SIZE		0x3c
     83#define THS8200_DAC_CNTL_MSB			0x3d
     84#define THS8200_DAC1_CNTL_LSB			0x3e
     85#define THS8200_DAC2_CNTL_LSB			0x3f
     86#define THS8200_DAC3_CNTL_LSB			0x40
     87#define THS8200_CSM_CLIP_GY_LOW			0x41
     88#define THS8200_CSM_CLIP_BCB_LOW		0x42
     89#define THS8200_CSM_CLIP_RCR_LOW		0x43
     90#define THS8200_CSM_CLIP_GY_HIGH		0x44
     91#define THS8200_CSM_CLIP_BCB_HIGH		0x45
     92#define THS8200_CSM_CLIP_RCR_HIGH		0x46
     93#define THS8200_CSM_SHIFT_GY			0x47
     94#define THS8200_CSM_SHIFT_BCB			0x48
     95#define THS8200_CSM_SHIFT_RCR			0x49
     96#define THS8200_CSM_GY_CNTL_MULT_MSB		0x4a
     97#define THS8200_CSM_MULT_BCB_RCR_MSB		0x4b
     98#define THS8200_CSM_MULT_GY_LSB			0x4c
     99#define THS8200_CSM_MULT_BCB_LSB		0x4d
    100#define THS8200_CSM_MULT_RCR_LSB		0x4e
    101#define THS8200_CSM_MULT_RCR_BCB_CNTL		0x4f
    102#define THS8200_CSM_MULT_RCR_LSB		0x4e
    103#define THS8200_DTG2_BP1_2_MSB			0x50
    104#define THS8200_DTG2_BP3_4_MSB			0x51
    105#define THS8200_DTG2_BP5_6_MSB			0x52
    106#define THS8200_DTG2_BP7_8_MSB			0x53
    107#define THS8200_DTG2_BP9_10_MSB			0x54
    108#define THS8200_DTG2_BP11_12_MSB		0x55
    109#define THS8200_DTG2_BP13_14_MSB		0x56
    110#define THS8200_DTG2_BP15_16_MSB		0x57
    111#define THS8200_DTG2_BP1_LSB			0x58
    112#define THS8200_DTG2_BP2_LSB			0x59
    113#define THS8200_DTG2_BP3_LSB			0x5a
    114#define THS8200_DTG2_BP4_LSB			0x5b
    115#define THS8200_DTG2_BP5_LSB			0x5c
    116#define THS8200_DTG2_BP6_LSB			0x5d
    117#define THS8200_DTG2_BP7_LSB			0x5e
    118#define THS8200_DTG2_BP8_LSB			0x5f
    119#define THS8200_DTG2_BP9_LSB			0x60
    120#define THS8200_DTG2_BP10_LSB			0x61
    121#define THS8200_DTG2_BP11_LSB			0x62
    122#define THS8200_DTG2_BP12_LSB			0x63
    123#define THS8200_DTG2_BP13_LSB			0x64
    124#define THS8200_DTG2_BP14_LSB			0x65
    125#define THS8200_DTG2_BP15_LSB			0x66
    126#define THS8200_DTG2_BP16_LSB			0x67
    127#define THS8200_DTG2_LINETYPE1			0x68
    128#define THS8200_DTG2_LINETYPE2			0x69
    129#define THS8200_DTG2_LINETYPE3			0x6a
    130#define THS8200_DTG2_LINETYPE4			0x6b
    131#define THS8200_DTG2_LINETYPE5			0x6c
    132#define THS8200_DTG2_LINETYPE6			0x6d
    133#define THS8200_DTG2_LINETYPE7			0x6e
    134#define THS8200_DTG2_LINETYPE8			0x6f
    135#define THS8200_DTG2_HLENGTH_LSB		0x70
    136#define THS8200_DTG2_HLENGTH_LSB_HDLY_MSB	0x71
    137#define THS8200_DTG2_HLENGTH_HDLY_LSB		0x72
    138#define THS8200_DTG2_VLENGTH1_LSB		0x73
    139#define THS8200_DTG2_VLENGTH1_MSB_VDLY1_MSB	0x74
    140#define THS8200_DTG2_VDLY1_LSB			0x75
    141#define THS8200_DTG2_VLENGTH2_LSB		0x76
    142#define THS8200_DTG2_VLENGTH2_MSB_VDLY2_MSB	0x77
    143#define THS8200_DTG2_VDLY2_LSB			0x78
    144#define THS8200_DTG2_HS_IN_DLY_MSB		0x79
    145#define THS8200_DTG2_HS_IN_DLY_LSB		0x7a
    146#define THS8200_DTG2_VS_IN_DLY_MSB		0x7b
    147#define THS8200_DTG2_VS_IN_DLY_LSB		0x7c
    148#define THS8200_DTG2_PIXEL_CNT_MSB		0x7d
    149#define THS8200_DTG2_PIXEL_CNT_LSB		0x7e
    150#define THS8200_DTG2_LINE_CNT_MSB		0x7f
    151#define THS8200_DTG2_LINE_CNT_LSB		0x80
    152#define THS8200_DTG2_CNTL			0x82
    153#define THS8200_CGMS_CNTL_HEADER		0x83
    154#define THS8200_CGMS_PAYLOAD_MSB		0x84
    155#define THS8200_CGMS_PAYLOAD_LSB		0x85
    156#define THS8200_MISC_PPL_LSB			0x86
    157#define THS8200_MISC_PPL_MSB			0x87
    158#define THS8200_MISC_LPF_MSB			0x88
    159#define THS8200_MISC_LPF_LSB			0x89
    160
    161#endif /* THS8200_REGS_H */