cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tw2804.c (10559B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2005-2006 Micronas USA Inc.
      4 */
      5
      6#include <linux/module.h>
      7#include <linux/init.h>
      8#include <linux/i2c.h>
      9#include <linux/videodev2.h>
     10#include <linux/ioctl.h>
     11#include <linux/slab.h>
     12#include <media/v4l2-subdev.h>
     13#include <media/v4l2-device.h>
     14#include <media/v4l2-ctrls.h>
     15
     16#define TW2804_REG_AUTOGAIN		0x02
     17#define TW2804_REG_HUE			0x0f
     18#define TW2804_REG_SATURATION		0x10
     19#define TW2804_REG_CONTRAST		0x11
     20#define TW2804_REG_BRIGHTNESS		0x12
     21#define TW2804_REG_COLOR_KILLER		0x14
     22#define TW2804_REG_GAIN			0x3c
     23#define TW2804_REG_CHROMA_GAIN		0x3d
     24#define TW2804_REG_BLUE_BALANCE		0x3e
     25#define TW2804_REG_RED_BALANCE		0x3f
     26
     27struct tw2804 {
     28	struct v4l2_subdev sd;
     29	struct v4l2_ctrl_handler hdl;
     30	u8 channel:2;
     31	u8 input:1;
     32	int norm;
     33};
     34
     35static const u8 global_registers[] = {
     36	0x39, 0x00,
     37	0x3a, 0xff,
     38	0x3b, 0x84,
     39	0x3c, 0x80,
     40	0x3d, 0x80,
     41	0x3e, 0x82,
     42	0x3f, 0x82,
     43	0x78, 0x00,
     44	0xff, 0xff, /* Terminator (reg 0xff does not exist) */
     45};
     46
     47static const u8 channel_registers[] = {
     48	0x01, 0xc4,
     49	0x02, 0xa5,
     50	0x03, 0x20,
     51	0x04, 0xd0,
     52	0x05, 0x20,
     53	0x06, 0xd0,
     54	0x07, 0x88,
     55	0x08, 0x20,
     56	0x09, 0x07,
     57	0x0a, 0xf0,
     58	0x0b, 0x07,
     59	0x0c, 0xf0,
     60	0x0d, 0x40,
     61	0x0e, 0xd2,
     62	0x0f, 0x80,
     63	0x10, 0x80,
     64	0x11, 0x80,
     65	0x12, 0x80,
     66	0x13, 0x1f,
     67	0x14, 0x00,
     68	0x15, 0x00,
     69	0x16, 0x00,
     70	0x17, 0x00,
     71	0x18, 0xff,
     72	0x19, 0xff,
     73	0x1a, 0xff,
     74	0x1b, 0xff,
     75	0x1c, 0xff,
     76	0x1d, 0xff,
     77	0x1e, 0xff,
     78	0x1f, 0xff,
     79	0x20, 0x07,
     80	0x21, 0x07,
     81	0x22, 0x00,
     82	0x23, 0x91,
     83	0x24, 0x51,
     84	0x25, 0x03,
     85	0x26, 0x00,
     86	0x27, 0x00,
     87	0x28, 0x00,
     88	0x29, 0x00,
     89	0x2a, 0x00,
     90	0x2b, 0x00,
     91	0x2c, 0x00,
     92	0x2d, 0x00,
     93	0x2e, 0x00,
     94	0x2f, 0x00,
     95	0x30, 0x00,
     96	0x31, 0x00,
     97	0x32, 0x00,
     98	0x33, 0x00,
     99	0x34, 0x00,
    100	0x35, 0x00,
    101	0x36, 0x00,
    102	0x37, 0x00,
    103	0xff, 0xff, /* Terminator (reg 0xff does not exist) */
    104};
    105
    106static int write_reg(struct i2c_client *client, u8 reg, u8 value, u8 channel)
    107{
    108	return i2c_smbus_write_byte_data(client, reg | (channel << 6), value);
    109}
    110
    111static int write_regs(struct i2c_client *client, const u8 *regs, u8 channel)
    112{
    113	int ret;
    114	int i;
    115
    116	for (i = 0; regs[i] != 0xff; i += 2) {
    117		ret = i2c_smbus_write_byte_data(client,
    118				regs[i] | (channel << 6), regs[i + 1]);
    119		if (ret < 0)
    120			return ret;
    121	}
    122	return 0;
    123}
    124
    125static int read_reg(struct i2c_client *client, u8 reg, u8 channel)
    126{
    127	return i2c_smbus_read_byte_data(client, (reg) | (channel << 6));
    128}
    129
    130static inline struct tw2804 *to_state(struct v4l2_subdev *sd)
    131{
    132	return container_of(sd, struct tw2804, sd);
    133}
    134
    135static inline struct tw2804 *to_state_from_ctrl(struct v4l2_ctrl *ctrl)
    136{
    137	return container_of(ctrl->handler, struct tw2804, hdl);
    138}
    139
    140static int tw2804_log_status(struct v4l2_subdev *sd)
    141{
    142	struct tw2804 *state = to_state(sd);
    143
    144	v4l2_info(sd, "Standard: %s\n",
    145			state->norm & V4L2_STD_525_60 ? "60 Hz" : "50 Hz");
    146	v4l2_info(sd, "Channel: %d\n", state->channel);
    147	v4l2_info(sd, "Input: %d\n", state->input);
    148	return v4l2_ctrl_subdev_log_status(sd);
    149}
    150
    151/*
    152 * These volatile controls are needed because all four channels share
    153 * these controls. So a change made to them through one channel would
    154 * require another channel to be updated.
    155 *
    156 * Normally this would have been done in a different way, but since the one
    157 * board that uses this driver sees this single chip as if it was on four
    158 * different i2c adapters (each adapter belonging to a separate instance of
    159 * the same USB driver) there is no reliable method that I have found to let
    160 * the instances know about each other.
    161 *
    162 * So implementing these global registers as volatile is the best we can do.
    163 */
    164static int tw2804_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
    165{
    166	struct tw2804 *state = to_state_from_ctrl(ctrl);
    167	struct i2c_client *client = v4l2_get_subdevdata(&state->sd);
    168
    169	switch (ctrl->id) {
    170	case V4L2_CID_GAIN:
    171		ctrl->val = read_reg(client, TW2804_REG_GAIN, 0);
    172		return 0;
    173
    174	case V4L2_CID_CHROMA_GAIN:
    175		ctrl->val = read_reg(client, TW2804_REG_CHROMA_GAIN, 0);
    176		return 0;
    177
    178	case V4L2_CID_BLUE_BALANCE:
    179		ctrl->val = read_reg(client, TW2804_REG_BLUE_BALANCE, 0);
    180		return 0;
    181
    182	case V4L2_CID_RED_BALANCE:
    183		ctrl->val = read_reg(client, TW2804_REG_RED_BALANCE, 0);
    184		return 0;
    185	}
    186	return 0;
    187}
    188
    189static int tw2804_s_ctrl(struct v4l2_ctrl *ctrl)
    190{
    191	struct tw2804 *state = to_state_from_ctrl(ctrl);
    192	struct i2c_client *client = v4l2_get_subdevdata(&state->sd);
    193	int addr;
    194	int reg;
    195
    196	switch (ctrl->id) {
    197	case V4L2_CID_AUTOGAIN:
    198		addr = TW2804_REG_AUTOGAIN;
    199		reg = read_reg(client, addr, state->channel);
    200		if (reg < 0)
    201			return reg;
    202		if (ctrl->val == 0)
    203			reg &= ~(1 << 7);
    204		else
    205			reg |= 1 << 7;
    206		return write_reg(client, addr, reg, state->channel);
    207
    208	case V4L2_CID_COLOR_KILLER:
    209		addr = TW2804_REG_COLOR_KILLER;
    210		reg = read_reg(client, addr, state->channel);
    211		if (reg < 0)
    212			return reg;
    213		reg = (reg & ~(0x03)) | (ctrl->val == 0 ? 0x02 : 0x03);
    214		return write_reg(client, addr, reg, state->channel);
    215
    216	case V4L2_CID_GAIN:
    217		return write_reg(client, TW2804_REG_GAIN, ctrl->val, 0);
    218
    219	case V4L2_CID_CHROMA_GAIN:
    220		return write_reg(client, TW2804_REG_CHROMA_GAIN, ctrl->val, 0);
    221
    222	case V4L2_CID_BLUE_BALANCE:
    223		return write_reg(client, TW2804_REG_BLUE_BALANCE, ctrl->val, 0);
    224
    225	case V4L2_CID_RED_BALANCE:
    226		return write_reg(client, TW2804_REG_RED_BALANCE, ctrl->val, 0);
    227
    228	case V4L2_CID_BRIGHTNESS:
    229		return write_reg(client, TW2804_REG_BRIGHTNESS,
    230				ctrl->val, state->channel);
    231
    232	case V4L2_CID_CONTRAST:
    233		return write_reg(client, TW2804_REG_CONTRAST,
    234				ctrl->val, state->channel);
    235
    236	case V4L2_CID_SATURATION:
    237		return write_reg(client, TW2804_REG_SATURATION,
    238				ctrl->val, state->channel);
    239
    240	case V4L2_CID_HUE:
    241		return write_reg(client, TW2804_REG_HUE,
    242				ctrl->val, state->channel);
    243
    244	default:
    245		break;
    246	}
    247	return -EINVAL;
    248}
    249
    250static int tw2804_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
    251{
    252	struct tw2804 *dec = to_state(sd);
    253	struct i2c_client *client = v4l2_get_subdevdata(sd);
    254	bool is_60hz = norm & V4L2_STD_525_60;
    255	u8 regs[] = {
    256		0x01, is_60hz ? 0xc4 : 0x84,
    257		0x09, is_60hz ? 0x07 : 0x04,
    258		0x0a, is_60hz ? 0xf0 : 0x20,
    259		0x0b, is_60hz ? 0x07 : 0x04,
    260		0x0c, is_60hz ? 0xf0 : 0x20,
    261		0x0d, is_60hz ? 0x40 : 0x4a,
    262		0x16, is_60hz ? 0x00 : 0x40,
    263		0x17, is_60hz ? 0x00 : 0x40,
    264		0x20, is_60hz ? 0x07 : 0x0f,
    265		0x21, is_60hz ? 0x07 : 0x0f,
    266		0xff, 0xff,
    267	};
    268
    269	write_regs(client, regs, dec->channel);
    270	dec->norm = norm;
    271	return 0;
    272}
    273
    274static int tw2804_s_video_routing(struct v4l2_subdev *sd, u32 input, u32 output,
    275	u32 config)
    276{
    277	struct tw2804 *dec = to_state(sd);
    278	struct i2c_client *client = v4l2_get_subdevdata(sd);
    279	int reg;
    280
    281	if (config && config - 1 != dec->channel) {
    282		if (config > 4) {
    283			dev_err(&client->dev,
    284				"channel %d is not between 1 and 4!\n", config);
    285			return -EINVAL;
    286		}
    287		dec->channel = config - 1;
    288		dev_dbg(&client->dev, "initializing TW2804 channel %d\n",
    289			dec->channel);
    290		if (dec->channel == 0 &&
    291				write_regs(client, global_registers, 0) < 0) {
    292			dev_err(&client->dev,
    293				"error initializing TW2804 global registers\n");
    294			return -EIO;
    295		}
    296		if (write_regs(client, channel_registers, dec->channel) < 0) {
    297			dev_err(&client->dev,
    298				"error initializing TW2804 channel %d\n",
    299				dec->channel);
    300			return -EIO;
    301		}
    302	}
    303
    304	if (input > 1)
    305		return -EINVAL;
    306
    307	if (input == dec->input)
    308		return 0;
    309
    310	reg = read_reg(client, 0x22, dec->channel);
    311
    312	if (reg >= 0) {
    313		if (input == 0)
    314			reg &= ~(1 << 2);
    315		else
    316			reg |= 1 << 2;
    317		reg = write_reg(client, 0x22, reg, dec->channel);
    318	}
    319
    320	if (reg >= 0)
    321		dec->input = input;
    322	else
    323		return reg;
    324	return 0;
    325}
    326
    327static const struct v4l2_ctrl_ops tw2804_ctrl_ops = {
    328	.g_volatile_ctrl = tw2804_g_volatile_ctrl,
    329	.s_ctrl = tw2804_s_ctrl,
    330};
    331
    332static const struct v4l2_subdev_video_ops tw2804_video_ops = {
    333	.s_std = tw2804_s_std,
    334	.s_routing = tw2804_s_video_routing,
    335};
    336
    337static const struct v4l2_subdev_core_ops tw2804_core_ops = {
    338	.log_status = tw2804_log_status,
    339};
    340
    341static const struct v4l2_subdev_ops tw2804_ops = {
    342	.core = &tw2804_core_ops,
    343	.video = &tw2804_video_ops,
    344};
    345
    346static int tw2804_probe(struct i2c_client *client,
    347			    const struct i2c_device_id *id)
    348{
    349	struct i2c_adapter *adapter = client->adapter;
    350	struct tw2804 *state;
    351	struct v4l2_subdev *sd;
    352	struct v4l2_ctrl *ctrl;
    353	int err;
    354
    355	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
    356		return -ENODEV;
    357
    358	state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
    359	if (state == NULL)
    360		return -ENOMEM;
    361	sd = &state->sd;
    362	v4l2_i2c_subdev_init(sd, client, &tw2804_ops);
    363	state->channel = -1;
    364	state->norm = V4L2_STD_NTSC;
    365
    366	v4l2_ctrl_handler_init(&state->hdl, 10);
    367	v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    368				V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
    369	v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    370				V4L2_CID_CONTRAST, 0, 255, 1, 128);
    371	v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    372				V4L2_CID_SATURATION, 0, 255, 1, 128);
    373	v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    374				V4L2_CID_HUE, 0, 255, 1, 128);
    375	v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    376				V4L2_CID_COLOR_KILLER, 0, 1, 1, 0);
    377	v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    378				V4L2_CID_AUTOGAIN, 0, 1, 1, 0);
    379	ctrl = v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    380				V4L2_CID_GAIN, 0, 255, 1, 128);
    381	if (ctrl)
    382		ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
    383	ctrl = v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    384				V4L2_CID_CHROMA_GAIN, 0, 255, 1, 128);
    385	if (ctrl)
    386		ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
    387	ctrl = v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    388				V4L2_CID_BLUE_BALANCE, 0, 255, 1, 122);
    389	if (ctrl)
    390		ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
    391	ctrl = v4l2_ctrl_new_std(&state->hdl, &tw2804_ctrl_ops,
    392				V4L2_CID_RED_BALANCE, 0, 255, 1, 122);
    393	if (ctrl)
    394		ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
    395	sd->ctrl_handler = &state->hdl;
    396	err = state->hdl.error;
    397	if (err) {
    398		v4l2_ctrl_handler_free(&state->hdl);
    399		return err;
    400	}
    401
    402	v4l_info(client, "chip found @ 0x%02x (%s)\n",
    403			client->addr << 1, client->adapter->name);
    404
    405	return 0;
    406}
    407
    408static int tw2804_remove(struct i2c_client *client)
    409{
    410	struct v4l2_subdev *sd = i2c_get_clientdata(client);
    411	struct tw2804 *state = to_state(sd);
    412
    413	v4l2_device_unregister_subdev(sd);
    414	v4l2_ctrl_handler_free(&state->hdl);
    415	return 0;
    416}
    417
    418static const struct i2c_device_id tw2804_id[] = {
    419	{ "tw2804", 0 },
    420	{ }
    421};
    422MODULE_DEVICE_TABLE(i2c, tw2804_id);
    423
    424static struct i2c_driver tw2804_driver = {
    425	.driver = {
    426		.name	= "tw2804",
    427	},
    428	.probe		= tw2804_probe,
    429	.remove		= tw2804_remove,
    430	.id_table	= tw2804_id,
    431};
    432
    433module_i2c_driver(tw2804_driver);
    434
    435MODULE_LICENSE("GPL v2");
    436MODULE_DESCRIPTION("TW2804/TW2802 V4L2 i2c driver");
    437MODULE_AUTHOR("Micronas USA Inc");