cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dst_common.h (3663B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3	Frontend-driver for TwinHan DST Frontend
      4
      5	Copyright (C) 2003 Jamie Honan
      6	Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
      7
      8*/
      9
     10#ifndef DST_COMMON_H
     11#define DST_COMMON_H
     12
     13#include <linux/dvb/frontend.h>
     14#include <linux/device.h>
     15#include <linux/mutex.h>
     16#include "bt878.h"
     17
     18#include "dst_ca.h"
     19
     20
     21#define NO_DELAY		0
     22#define LONG_DELAY		1
     23#define DEVICE_INIT		2
     24
     25#define DELAY			1
     26
     27#define DST_TYPE_IS_SAT		0
     28#define DST_TYPE_IS_TERR	1
     29#define DST_TYPE_IS_CABLE	2
     30#define DST_TYPE_IS_ATSC	3
     31
     32#define DST_TYPE_HAS_TS188	1
     33#define DST_TYPE_HAS_TS204	2
     34#define DST_TYPE_HAS_SYMDIV	4
     35#define DST_TYPE_HAS_FW_1	8
     36#define DST_TYPE_HAS_FW_2	16
     37#define DST_TYPE_HAS_FW_3	32
     38#define DST_TYPE_HAS_FW_BUILD	64
     39#define DST_TYPE_HAS_OBS_REGS	128
     40#define DST_TYPE_HAS_INC_COUNT	256
     41#define DST_TYPE_HAS_MULTI_FE	512
     42#define DST_TYPE_HAS_NEWTUNE_2	1024
     43#define DST_TYPE_HAS_DBOARD	2048
     44#define DST_TYPE_HAS_VLF	4096
     45
     46/*	Card capability list	*/
     47
     48#define DST_TYPE_HAS_MAC	1
     49#define DST_TYPE_HAS_DISEQC3	2
     50#define DST_TYPE_HAS_DISEQC4	4
     51#define DST_TYPE_HAS_DISEQC5	8
     52#define DST_TYPE_HAS_MOTO	16
     53#define DST_TYPE_HAS_CA		32
     54#define	DST_TYPE_HAS_ANALOG	64	/*	Analog inputs	*/
     55#define DST_TYPE_HAS_SESSION	128
     56
     57#define TUNER_TYPE_MULTI	1
     58#define TUNER_TYPE_UNKNOWN	2
     59/*	DVB-S		*/
     60#define TUNER_TYPE_L64724	4
     61#define TUNER_TYPE_STV0299	8
     62#define TUNER_TYPE_MB86A15	16
     63
     64/*	DVB-T		*/
     65#define TUNER_TYPE_TDA10046	32
     66
     67/*	ATSC		*/
     68#define TUNER_TYPE_NXT200x	64
     69
     70
     71#define RDC_8820_PIO_0_DISABLE	0
     72#define RDC_8820_PIO_0_ENABLE	1
     73#define RDC_8820_INT		2
     74#define RDC_8820_RESET		4
     75
     76/*	DST Communication	*/
     77#define GET_REPLY		1
     78#define NO_REPLY		0
     79
     80#define GET_ACK			1
     81#define FIXED_COMM		8
     82
     83#define ACK			0xff
     84
     85struct dst_state {
     86
     87	struct i2c_adapter* i2c;
     88
     89	struct bt878* bt;
     90
     91	/* configuration settings */
     92	const struct dst_config* config;
     93
     94	struct dvb_frontend frontend;
     95
     96	/* private ASIC data */
     97	u8 tx_tuna[10];
     98	u8 rx_tuna[10];
     99	u8 rxbuffer[10];
    100	u8 diseq_flags;
    101	u8 dst_type;
    102	u32 type_flags;
    103	u32 frequency;		/* intermediate frequency in kHz for QPSK */
    104	enum fe_spectral_inversion inversion;
    105	u32 symbol_rate;	/* symbol rate in Symbols per second */
    106	enum fe_code_rate fec;
    107	enum fe_sec_voltage voltage;
    108	enum fe_sec_tone_mode tone;
    109	u32 decode_freq;
    110	u8 decode_lock;
    111	u16 decode_strength;
    112	u16 decode_snr;
    113	unsigned long cur_jiff;
    114	u8 k22;
    115	u32 bandwidth;
    116	u32 dst_hw_cap;
    117	u8 dst_fw_version;
    118	enum fe_sec_mini_cmd minicmd;
    119	enum fe_modulation modulation;
    120	u8 messages[256];
    121	u8 mac_address[8];
    122	u8 fw_version[8];
    123	u8 card_info[8];
    124	u8 vendor[8];
    125	u8 board_info[8];
    126	u32 tuner_type;
    127	char *tuner_name;
    128	struct mutex dst_mutex;
    129	char fw_name[8];
    130	struct dvb_device *dst_ca;
    131};
    132
    133struct tuner_types {
    134	u32 tuner_type;
    135	char *tuner_name;
    136	char *board_name;
    137	char *fw_name;
    138};
    139
    140struct dst_types {
    141	char *device_id;
    142	int offset;
    143	u8 dst_type;
    144	u32 type_flags;
    145	u32 dst_feature;
    146	u32 tuner_type;
    147};
    148
    149struct dst_config
    150{
    151	/* the ASIC i2c address */
    152	u8 demod_address;
    153};
    154
    155int rdc_reset_state(struct dst_state *state);
    156
    157int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode);
    158int dst_pio_disable(struct dst_state *state);
    159int dst_error_recovery(struct dst_state* state);
    160int dst_error_bailout(struct dst_state *state);
    161int dst_comm_init(struct dst_state* state);
    162
    163int write_dst(struct dst_state *state, u8 * data, u8 len);
    164int read_dst(struct dst_state *state, u8 * ret, u8 len);
    165u8 dst_check_sum(u8 * buf, u32 len);
    166struct dst_state* dst_attach(struct dst_state* state, struct dvb_adapter *dvb_adapter);
    167struct dvb_device *dst_ca_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter);
    168
    169
    170#endif // DST_COMMON_H