ddbridge.h (10412B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * ddbridge.h: Digital Devices PCIe bridge driver 4 * 5 * Copyright (C) 2010-2017 Digital Devices GmbH 6 * Ralph Metzler <rmetzler@digitaldevices.de> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 only, as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18#ifndef _DDBRIDGE_H_ 19#define _DDBRIDGE_H_ 20 21#include <linux/clk.h> 22#include <linux/completion.h> 23#include <linux/delay.h> 24#include <linux/device.h> 25#include <linux/dvb/ca.h> 26#include <linux/gpio.h> 27#include <linux/i2c.h> 28#include <linux/init.h> 29#include <linux/interrupt.h> 30#include <linux/io.h> 31#include <linux/kthread.h> 32#include <linux/module.h> 33#include <linux/mutex.h> 34#include <linux/pci.h> 35#include <linux/platform_device.h> 36#include <linux/poll.h> 37#include <linux/sched.h> 38#include <linux/slab.h> 39#include <linux/socket.h> 40#include <linux/spi/spi.h> 41#include <linux/swab.h> 42#include <linux/timer.h> 43#include <linux/types.h> 44#include <linux/uaccess.h> 45#include <linux/vmalloc.h> 46#include <linux/workqueue.h> 47 48#include <asm/dma.h> 49#include <asm/irq.h> 50 51#include <media/dmxdev.h> 52#include <media/dvb_ca_en50221.h> 53#include <media/dvb_demux.h> 54#include <media/dvbdev.h> 55#include <media/dvb_frontend.h> 56#include <media/dvb_net.h> 57#include <media/dvb_ringbuffer.h> 58 59#define DDBRIDGE_VERSION "0.9.33-integrated" 60 61#define DDB_MAX_I2C 32 62#define DDB_MAX_PORT 32 63#define DDB_MAX_INPUT 64 64#define DDB_MAX_OUTPUT 32 65#define DDB_MAX_LINK 4 66#define DDB_LINK_SHIFT 28 67 68#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT) 69 70struct ddb_regset { 71 u32 base; 72 u32 num; 73 u32 size; 74}; 75 76struct ddb_regmap { 77 u32 irq_base_i2c; 78 u32 irq_base_idma; 79 u32 irq_base_odma; 80 81 const struct ddb_regset *i2c; 82 const struct ddb_regset *i2c_buf; 83 const struct ddb_regset *idma; 84 const struct ddb_regset *idma_buf; 85 const struct ddb_regset *odma; 86 const struct ddb_regset *odma_buf; 87 88 const struct ddb_regset *input; 89 const struct ddb_regset *output; 90 91 const struct ddb_regset *channel; 92}; 93 94struct ddb_ids { 95 u16 vendor; 96 u16 device; 97 u16 subvendor; 98 u16 subdevice; 99 100 u32 hwid; 101 u32 regmapid; 102 u32 devid; 103 u32 mac; 104}; 105 106struct ddb_info { 107 int type; 108#define DDB_NONE 0 109#define DDB_OCTOPUS 1 110#define DDB_OCTOPUS_CI 2 111#define DDB_OCTOPUS_MAX 5 112#define DDB_OCTOPUS_MAX_CT 6 113#define DDB_OCTOPUS_MCI 9 114 char *name; 115 u32 i2c_mask; 116 u32 board_control; 117 u32 board_control_2; 118 119 u8 port_num; 120 u8 led_num; 121 u8 fan_num; 122 u8 temp_num; 123 u8 temp_bus; 124 u8 con_clock; /* use a continuous clock */ 125 u8 ts_quirks; 126#define TS_QUIRK_SERIAL 1 127#define TS_QUIRK_REVERSED 2 128#define TS_QUIRK_ALT_OSC 8 129 u8 mci_ports; 130 u8 mci_type; 131 132 u32 tempmon_irq; 133 const struct ddb_regmap *regmap; 134}; 135 136#define DMA_MAX_BUFS 32 /* hardware table limit */ 137 138struct ddb; 139struct ddb_port; 140 141struct ddb_dma { 142 void *io; 143 u32 regs; 144 u32 bufregs; 145 146 dma_addr_t pbuf[DMA_MAX_BUFS]; 147 u8 *vbuf[DMA_MAX_BUFS]; 148 u32 num; 149 u32 size; 150 u32 div; 151 u32 bufval; 152 153 struct work_struct work; 154 spinlock_t lock; /* DMA lock */ 155 wait_queue_head_t wq; 156 int running; 157 u32 stat; 158 u32 ctrl; 159 u32 cbuf; 160 u32 coff; 161}; 162 163struct ddb_dvb { 164 struct dvb_adapter *adap; 165 int adap_registered; 166 struct dvb_device *dev; 167 struct i2c_client *i2c_client[1]; 168 struct dvb_frontend *fe; 169 struct dvb_frontend *fe2; 170 struct dmxdev dmxdev; 171 struct dvb_demux demux; 172 struct dvb_net dvbnet; 173 struct dmx_frontend hw_frontend; 174 struct dmx_frontend mem_frontend; 175 int users; 176 u32 attached; 177 u8 input; 178 179 enum fe_sec_tone_mode tone; 180 enum fe_sec_voltage voltage; 181 182 int (*i2c_gate_ctrl)(struct dvb_frontend *, int); 183 int (*set_voltage)(struct dvb_frontend *fe, 184 enum fe_sec_voltage voltage); 185 int (*set_input)(struct dvb_frontend *fe, int input); 186 int (*diseqc_send_master_cmd)(struct dvb_frontend *fe, 187 struct dvb_diseqc_master_cmd *cmd); 188}; 189 190struct ddb_ci { 191 struct dvb_ca_en50221 en; 192 struct ddb_port *port; 193 u32 nr; 194}; 195 196struct ddb_io { 197 struct ddb_port *port; 198 u32 nr; 199 u32 regs; 200 struct ddb_dma *dma; 201 struct ddb_io *redo; 202 struct ddb_io *redi; 203}; 204 205#define ddb_output ddb_io 206#define ddb_input ddb_io 207 208struct ddb_i2c { 209 struct ddb *dev; 210 u32 nr; 211 u32 regs; 212 u32 link; 213 struct i2c_adapter adap; 214 u32 rbuf; 215 u32 wbuf; 216 u32 bsize; 217 struct completion completion; 218}; 219 220struct ddb_port { 221 struct ddb *dev; 222 u32 nr; 223 u32 pnr; 224 u32 regs; 225 u32 lnr; 226 struct ddb_i2c *i2c; 227 struct mutex i2c_gate_lock; /* I2C access lock */ 228 u32 class; 229#define DDB_PORT_NONE 0 230#define DDB_PORT_CI 1 231#define DDB_PORT_TUNER 2 232#define DDB_PORT_LOOP 3 233 char *name; 234 char *type_name; 235 u32 type; 236#define DDB_TUNER_DUMMY 0xffffffff 237#define DDB_TUNER_NONE 0 238#define DDB_TUNER_DVBS_ST 1 239#define DDB_TUNER_DVBS_ST_AA 2 240#define DDB_TUNER_DVBCT_TR 3 241#define DDB_TUNER_DVBCT_ST 4 242#define DDB_CI_INTERNAL 5 243#define DDB_CI_EXTERNAL_SONY 6 244#define DDB_TUNER_DVBCT2_SONY_P 7 245#define DDB_TUNER_DVBC2T2_SONY_P 8 246#define DDB_TUNER_ISDBT_SONY_P 9 247#define DDB_TUNER_DVBS_STV0910_P 10 248#define DDB_TUNER_MXL5XX 11 249#define DDB_CI_EXTERNAL_XO2 12 250#define DDB_CI_EXTERNAL_XO2_B 13 251#define DDB_TUNER_DVBS_STV0910_PR 14 252#define DDB_TUNER_DVBC2T2I_SONY_P 15 253 254#define DDB_TUNER_XO2 32 255#define DDB_TUNER_DVBS_STV0910 (DDB_TUNER_XO2 + 0) 256#define DDB_TUNER_DVBCT2_SONY (DDB_TUNER_XO2 + 1) 257#define DDB_TUNER_ISDBT_SONY (DDB_TUNER_XO2 + 2) 258#define DDB_TUNER_DVBC2T2_SONY (DDB_TUNER_XO2 + 3) 259#define DDB_TUNER_ATSC_ST (DDB_TUNER_XO2 + 4) 260#define DDB_TUNER_DVBC2T2I_SONY (DDB_TUNER_XO2 + 5) 261 262#define DDB_TUNER_MCI 48 263#define DDB_TUNER_MCI_SX8 (DDB_TUNER_MCI + 0) 264 265 struct ddb_input *input[2]; 266 struct ddb_output *output; 267 struct dvb_ca_en50221 *en; 268 u8 en_freedata; 269 struct ddb_dvb dvb[2]; 270 u32 gap; 271 u32 obr; 272 u8 creg; 273}; 274 275#define CM_STARTUP_DELAY 2 276#define CM_AVERAGE 20 277#define CM_GAIN 10 278 279#define HW_LSB_SHIFT 12 280#define HW_LSB_MASK 0x1000 281 282#define CM_IDLE 0 283#define CM_STARTUP 1 284#define CM_ADJUST 2 285 286#define TS_CAPTURE_LEN (4096) 287 288struct ddb_lnb { 289 struct mutex lock; /* lock lnb access */ 290 u32 tone; 291 enum fe_sec_voltage oldvoltage[4]; 292 u32 voltage[4]; 293 u32 voltages; 294 u32 fmode; 295}; 296 297struct ddb_irq { 298 void (*handler)(void *); 299 void *data; 300}; 301 302struct ddb_link { 303 struct ddb *dev; 304 const struct ddb_info *info; 305 u32 nr; 306 u32 regs; 307 spinlock_t lock; /* lock link access */ 308 struct mutex flash_mutex; /* lock flash access */ 309 struct ddb_lnb lnb; 310 struct tasklet_struct tasklet; 311 struct ddb_ids ids; 312 313 spinlock_t temp_lock; /* lock temp chip access */ 314 int overtemperature_error; 315 u8 temp_tab[11]; 316 struct ddb_irq irq[256]; 317}; 318 319struct ddb { 320 struct pci_dev *pdev; 321 struct platform_device *pfdev; 322 struct device *dev; 323 324 int msi; 325 struct workqueue_struct *wq; 326 u32 has_dma; 327 328 struct ddb_link link[DDB_MAX_LINK]; 329 unsigned char __iomem *regs; 330 u32 regs_len; 331 u32 port_num; 332 struct ddb_port port[DDB_MAX_PORT]; 333 u32 i2c_num; 334 struct ddb_i2c i2c[DDB_MAX_I2C]; 335 struct ddb_input input[DDB_MAX_INPUT]; 336 struct ddb_output output[DDB_MAX_OUTPUT]; 337 struct dvb_adapter adap[DDB_MAX_INPUT]; 338 struct ddb_dma idma[DDB_MAX_INPUT]; 339 struct ddb_dma odma[DDB_MAX_OUTPUT]; 340 341 struct device *ddb_dev; 342 u32 ddb_dev_users; 343 u32 nr; 344 u8 iobuf[1028]; 345 346 u8 leds; 347 u32 ts_irq; 348 u32 i2c_irq; 349 350 struct mutex mutex; /* lock access to global ddb array */ 351 352 u8 tsbuf[TS_CAPTURE_LEN]; 353}; 354 355/****************************************************************************/ 356/****************************************************************************/ 357/****************************************************************************/ 358 359int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len); 360 361/****************************************************************************/ 362 363/* ddbridge-core.c */ 364struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr, 365 void (*handler)(void *), void *data); 366void ddb_ports_detach(struct ddb *dev); 367void ddb_ports_release(struct ddb *dev); 368void ddb_buffers_free(struct ddb *dev); 369void ddb_device_destroy(struct ddb *dev); 370irqreturn_t ddb_irq_handler0(int irq, void *dev_id); 371irqreturn_t ddb_irq_handler1(int irq, void *dev_id); 372irqreturn_t ddb_irq_handler(int irq, void *dev_id); 373void ddb_ports_init(struct ddb *dev); 374int ddb_buffers_alloc(struct ddb *dev); 375int ddb_ports_attach(struct ddb *dev); 376int ddb_device_create(struct ddb *dev); 377int ddb_init(struct ddb *dev); 378void ddb_unmap(struct ddb *dev); 379int ddb_exit_ddbridge(int stage, int error); 380int ddb_init_ddbridge(void); 381 382#endif /* DDBRIDGE_H */