cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tw68-reg.h (5259B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 *  tw68-reg.h - TW68xx register offsets
      4 *
      5 *  Much of this code is derived from the cx88 and sa7134 drivers, which
      6 *  were in turn derived from the bt87x driver.  The original work was by
      7 *  Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
      8 *  Hans Verkuil, Andy Walls and many others.  Their work is gratefully
      9 *  acknowledged.  Full credit goes to them - any problems within this code
     10 *  are mine.
     11 *
     12 *  Copyright (C) William M. Brack
     13 *
     14 *  Refactored and updated to the latest v4l core frameworks:
     15 *
     16 *  Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
     17*/
     18
     19#ifndef _TW68_REG_H_
     20#define _TW68_REG_H_
     21
     22/* ---------------------------------------------------------------------- */
     23#define	TW68_DMAC		0x000
     24#define	TW68_DMAP_SA		0x004
     25#define	TW68_DMAP_EXE		0x008
     26#define	TW68_DMAP_PP		0x00c
     27#define	TW68_VBIC		0x010
     28#define	TW68_SBUSC		0x014
     29#define	TW68_SBUSSD		0x018
     30#define	TW68_INTSTAT		0x01C
     31#define	TW68_INTMASK		0x020
     32#define	TW68_GPIOC		0x024
     33#define	TW68_GPOE		0x028
     34#define	TW68_TESTREG		0x02C
     35#define	TW68_SBUSRD		0x030
     36#define	TW68_SBUS_TRIG		0x034
     37#define	TW68_CAP_CTL		0x040
     38#define	TW68_SUBSYS		0x054
     39#define	TW68_I2C_RST		0x064
     40#define	TW68_VBIINST		0x06C
     41/* define bits in FIFO and DMAP Control reg */
     42#define	TW68_DMAP_EN		(1 << 0)
     43#define	TW68_FIFO_EN		(1 << 1)
     44/* define the Interrupt Status Register bits */
     45#define	TW68_SBDONE		(1 << 0)
     46#define	TW68_DMAPI		(1 << 1)
     47#define	TW68_GPINT		(1 << 2)
     48#define	TW68_FFOF		(1 << 3)
     49#define	TW68_FDMIS		(1 << 4)
     50#define	TW68_DMAPERR		(1 << 5)
     51#define	TW68_PABORT		(1 << 6)
     52#define	TW68_SBDONE2		(1 << 12)
     53#define	TW68_SBERR2		(1 << 13)
     54#define	TW68_PPERR		(1 << 14)
     55#define	TW68_FFERR		(1 << 15)
     56#define	TW68_DET50		(1 << 16)
     57#define	TW68_FLOCK		(1 << 17)
     58#define	TW68_CCVALID		(1 << 18)
     59#define	TW68_VLOCK		(1 << 19)
     60#define	TW68_FIELD		(1 << 20)
     61#define	TW68_SLOCK		(1 << 21)
     62#define	TW68_HLOCK		(1 << 22)
     63#define	TW68_VDLOSS		(1 << 23)
     64#define	TW68_SBERR		(1 << 24)
     65/* define the i2c control register bits */
     66#define	TW68_SBMODE		(0)
     67#define	TW68_WREN		(1)
     68#define	TW68_SSCLK		(6)
     69#define	TW68_SSDAT		(7)
     70#define	TW68_SBCLK		(8)
     71#define	TW68_WDLEN		(16)
     72#define	TW68_RDLEN		(20)
     73#define	TW68_SBRW		(24)
     74#define	TW68_SBDEV		(25)
     75
     76#define	TW68_SBMODE_B		(1 << TW68_SBMODE)
     77#define	TW68_WREN_B		(1 << TW68_WREN)
     78#define	TW68_SSCLK_B		(1 << TW68_SSCLK)
     79#define	TW68_SSDAT_B		(1 << TW68_SSDAT)
     80#define	TW68_SBRW_B		(1 << TW68_SBRW)
     81
     82#define	TW68_GPDATA		0x100
     83#define	TW68_STATUS1		0x204
     84#define	TW68_INFORM		0x208
     85#define	TW68_OPFORM		0x20C
     86#define	TW68_HSYNC		0x210
     87#define	TW68_ACNTL		0x218
     88#define	TW68_CROP_HI		0x21C
     89#define	TW68_VDELAY_LO		0x220
     90#define	TW68_VACTIVE_LO		0x224
     91#define	TW68_HDELAY_LO		0x228
     92#define	TW68_HACTIVE_LO		0x22C
     93#define	TW68_CNTRL1		0x230
     94#define	TW68_VSCALE_LO		0x234
     95#define	TW68_SCALE_HI		0x238
     96#define	TW68_HSCALE_LO		0x23C
     97#define	TW68_BRIGHT		0x240
     98#define	TW68_CONTRAST		0x244
     99#define	TW68_SHARPNESS		0x248
    100#define	TW68_SAT_U		0x24C
    101#define	TW68_SAT_V		0x250
    102#define	TW68_HUE		0x254
    103#define	TW68_SHARP2		0x258
    104#define	TW68_VSHARP		0x25C
    105#define	TW68_CORING		0x260
    106#define	TW68_VBICNTL		0x264
    107#define	TW68_CNTRL2		0x268
    108#define	TW68_CC_DATA		0x26C
    109#define	TW68_SDT		0x270
    110#define	TW68_SDTR		0x274
    111#define	TW68_RESERV2		0x278
    112#define	TW68_RESERV3		0x27C
    113#define	TW68_CLMPG		0x280
    114#define	TW68_IAGC		0x284
    115#define	TW68_AGCGAIN		0x288
    116#define	TW68_PEAKWT		0x28C
    117#define	TW68_CLMPL		0x290
    118#define	TW68_SYNCT		0x294
    119#define	TW68_MISSCNT		0x298
    120#define	TW68_PCLAMP		0x29C
    121#define	TW68_VCNTL1		0x2A0
    122#define	TW68_VCNTL2		0x2A4
    123#define	TW68_CKILL		0x2A8
    124#define	TW68_COMB		0x2AC
    125#define	TW68_LDLY		0x2B0
    126#define	TW68_MISC1		0x2B4
    127#define	TW68_LOOP		0x2B8
    128#define	TW68_MISC2		0x2BC
    129#define	TW68_MVSN		0x2C0
    130#define	TW68_STATUS2		0x2C4
    131#define	TW68_HFREF		0x2C8
    132#define	TW68_CLMD		0x2CC
    133#define	TW68_IDCNTL		0x2D0
    134#define	TW68_CLCNTL1		0x2D4
    135
    136/* Audio */
    137#define	TW68_ACKI1		0x300
    138#define	TW68_ACKI2		0x304
    139#define	TW68_ACKI3		0x308
    140#define	TW68_ACKN1		0x30C
    141#define	TW68_ACKN2		0x310
    142#define	TW68_ACKN3		0x314
    143#define	TW68_SDIV		0x318
    144#define	TW68_LRDIV		0x31C
    145#define	TW68_ACCNTL		0x320
    146
    147#define	TW68_VSCTL		0x3B8
    148#define	TW68_CHROMAGVAL		0x3BC
    149
    150#define	TW68_F2CROP_HI		0x3DC
    151#define	TW68_F2VDELAY_LO	0x3E0
    152#define	TW68_F2VACTIVE_LO	0x3E4
    153#define	TW68_F2HDELAY_LO	0x3E8
    154#define	TW68_F2HACTIVE_LO	0x3EC
    155#define	TW68_F2CNT		0x3F0
    156#define	TW68_F2VSCALE_LO	0x3F4
    157#define	TW68_F2SCALE_HI		0x3F8
    158#define	TW68_F2HSCALE_LO	0x3FC
    159
    160#define	RISC_INT_BIT		0x08000000
    161#define	RISC_SYNCO		0xC0000000
    162#define	RISC_SYNCE		0xD0000000
    163#define	RISC_JUMP		0xB0000000
    164#define	RISC_LINESTART		0x90000000
    165#define	RISC_INLINE		0xA0000000
    166
    167#define VideoFormatNTSC		 0
    168#define VideoFormatNTSCJapan	 0
    169#define VideoFormatPALBDGHI	 1
    170#define VideoFormatSECAM	 2
    171#define VideoFormatNTSC443	 3
    172#define VideoFormatPALM		 4
    173#define VideoFormatPALN		 5
    174#define VideoFormatPALNC	 5
    175#define VideoFormatPAL60	 6
    176#define VideoFormatAuto		 7
    177
    178#define ColorFormatRGB32	 0x00
    179#define ColorFormatRGB24	 0x10
    180#define ColorFormatRGB16	 0x20
    181#define ColorFormatRGB15	 0x30
    182#define ColorFormatYUY2		 0x40
    183#define ColorFormatBSWAP         0x04
    184#define ColorFormatWSWAP         0x08
    185#define ColorFormatGamma         0x80
    186#endif