mtk_vcodec_drv.h (15675B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3* Copyright (c) 2016 MediaTek Inc. 4* Author: PC Chen <pc.chen@mediatek.com> 5* Tiffany Lin <tiffany.lin@mediatek.com> 6*/ 7 8#ifndef _MTK_VCODEC_DRV_H_ 9#define _MTK_VCODEC_DRV_H_ 10 11#include <linux/platform_device.h> 12#include <linux/videodev2.h> 13#include <media/v4l2-ctrls.h> 14#include <media/v4l2-device.h> 15#include <media/v4l2-ioctl.h> 16#include <media/v4l2-mem2mem.h> 17#include <media/videobuf2-core.h> 18 19#include "mtk_vcodec_util.h" 20#include "vdec_msg_queue.h" 21 22#define MTK_VCODEC_DRV_NAME "mtk_vcodec_drv" 23#define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec" 24#define MTK_VCODEC_ENC_NAME "mtk-vcodec-enc" 25#define MTK_PLATFORM_STR "platform:mt8173" 26 27#define MTK_VCODEC_MAX_PLANES 3 28#define MTK_V4L2_BENCHMARK 0 29#define WAIT_INTR_TIMEOUT_MS 1000 30#define IS_VDEC_LAT_ARCH(hw_arch) ((hw_arch) >= MTK_VDEC_LAT_SINGLE_CORE) 31 32/* 33 * enum mtk_hw_reg_idx - MTK hw register base index 34 */ 35enum mtk_hw_reg_idx { 36 VDEC_SYS, 37 VDEC_MISC, 38 VDEC_LD, 39 VDEC_TOP, 40 VDEC_CM, 41 VDEC_AD, 42 VDEC_AV, 43 VDEC_PP, 44 VDEC_HWD, 45 VDEC_HWQ, 46 VDEC_HWB, 47 VDEC_HWG, 48 NUM_MAX_VDEC_REG_BASE, 49 /* h264 encoder */ 50 VENC_SYS = NUM_MAX_VDEC_REG_BASE, 51 /* vp8 encoder */ 52 VENC_LT_SYS, 53 NUM_MAX_VCODEC_REG_BASE 54}; 55 56/* 57 * enum mtk_instance_type - The type of an MTK Vcodec instance. 58 */ 59enum mtk_instance_type { 60 MTK_INST_DECODER = 0, 61 MTK_INST_ENCODER = 1, 62}; 63 64/** 65 * enum mtk_instance_state - The state of an MTK Vcodec instance. 66 * @MTK_STATE_FREE: default state when instance is created 67 * @MTK_STATE_INIT: vcodec instance is initialized 68 * @MTK_STATE_HEADER: vdec had sps/pps header parsed or venc 69 * had sps/pps header encoded 70 * @MTK_STATE_FLUSH: vdec is flushing. Only used by decoder 71 * @MTK_STATE_ABORT: vcodec should be aborted 72 */ 73enum mtk_instance_state { 74 MTK_STATE_FREE = 0, 75 MTK_STATE_INIT = 1, 76 MTK_STATE_HEADER = 2, 77 MTK_STATE_FLUSH = 3, 78 MTK_STATE_ABORT = 4, 79}; 80 81/* 82 * enum mtk_encode_param - General encoding parameters type 83 */ 84enum mtk_encode_param { 85 MTK_ENCODE_PARAM_NONE = 0, 86 MTK_ENCODE_PARAM_BITRATE = (1 << 0), 87 MTK_ENCODE_PARAM_FRAMERATE = (1 << 1), 88 MTK_ENCODE_PARAM_INTRA_PERIOD = (1 << 2), 89 MTK_ENCODE_PARAM_FORCE_INTRA = (1 << 3), 90 MTK_ENCODE_PARAM_GOP_SIZE = (1 << 4), 91}; 92 93enum mtk_fmt_type { 94 MTK_FMT_DEC = 0, 95 MTK_FMT_ENC = 1, 96 MTK_FMT_FRAME = 2, 97}; 98 99/* 100 * enum mtk_vdec_hw_id - Hardware index used to separate 101 * different hardware 102 */ 103enum mtk_vdec_hw_id { 104 MTK_VDEC_CORE, 105 MTK_VDEC_LAT0, 106 MTK_VDEC_LAT1, 107 MTK_VDEC_HW_MAX, 108}; 109 110/* 111 * enum mtk_vdec_hw_count - Supported hardware count 112 */ 113enum mtk_vdec_hw_count { 114 MTK_VDEC_NO_HW = 0, 115 MTK_VDEC_ONE_CORE, 116 MTK_VDEC_ONE_LAT_ONE_CORE, 117 MTK_VDEC_MAX_HW_COUNT, 118}; 119 120/* 121 * struct mtk_video_fmt - Structure used to store information about pixelformats 122 */ 123struct mtk_video_fmt { 124 u32 fourcc; 125 enum mtk_fmt_type type; 126 u32 num_planes; 127 u32 flags; 128}; 129 130/* 131 * struct mtk_codec_framesizes - Structure used to store information about 132 * framesizes 133 */ 134struct mtk_codec_framesizes { 135 u32 fourcc; 136 struct v4l2_frmsize_stepwise stepwise; 137}; 138 139/* 140 * enum mtk_q_type - Type of queue 141 */ 142enum mtk_q_type { 143 MTK_Q_DATA_SRC = 0, 144 MTK_Q_DATA_DST = 1, 145}; 146 147/* 148 * struct mtk_q_data - Structure used to store information about queue 149 */ 150struct mtk_q_data { 151 unsigned int visible_width; 152 unsigned int visible_height; 153 unsigned int coded_width; 154 unsigned int coded_height; 155 enum v4l2_field field; 156 unsigned int bytesperline[MTK_VCODEC_MAX_PLANES]; 157 unsigned int sizeimage[MTK_VCODEC_MAX_PLANES]; 158 const struct mtk_video_fmt *fmt; 159}; 160 161/** 162 * struct mtk_enc_params - General encoding parameters 163 * @bitrate: target bitrate in bits per second 164 * @num_b_frame: number of b frames between p-frame 165 * @rc_frame: frame based rate control 166 * @rc_mb: macroblock based rate control 167 * @seq_hdr_mode: H.264 sequence header is encoded separately or joined 168 * with the first frame 169 * @intra_period: I frame period 170 * @gop_size: group of picture size, it's used as the intra frame period 171 * @framerate_num: frame rate numerator. ex: framerate_num=30 and 172 * framerate_denom=1 means FPS is 30 173 * @framerate_denom: frame rate denominator. ex: framerate_num=30 and 174 * framerate_denom=1 means FPS is 30 175 * @h264_max_qp: Max value for H.264 quantization parameter 176 * @h264_profile: V4L2 defined H.264 profile 177 * @h264_level: V4L2 defined H.264 level 178 * @force_intra: force/insert intra frame 179 */ 180struct mtk_enc_params { 181 unsigned int bitrate; 182 unsigned int num_b_frame; 183 unsigned int rc_frame; 184 unsigned int rc_mb; 185 unsigned int seq_hdr_mode; 186 unsigned int intra_period; 187 unsigned int gop_size; 188 unsigned int framerate_num; 189 unsigned int framerate_denom; 190 unsigned int h264_max_qp; 191 unsigned int h264_profile; 192 unsigned int h264_level; 193 unsigned int force_intra; 194}; 195 196/* 197 * struct mtk_vcodec_clk_info - Structure used to store clock name 198 */ 199struct mtk_vcodec_clk_info { 200 const char *clk_name; 201 struct clk *vcodec_clk; 202}; 203 204/* 205 * struct mtk_vcodec_clk - Structure used to store vcodec clock information 206 */ 207struct mtk_vcodec_clk { 208 struct mtk_vcodec_clk_info *clk_info; 209 int clk_num; 210}; 211 212/* 213 * struct mtk_vcodec_pm - Power management data structure 214 */ 215struct mtk_vcodec_pm { 216 struct mtk_vcodec_clk vdec_clk; 217 struct mtk_vcodec_clk venc_clk; 218 struct device *dev; 219}; 220 221/** 222 * struct vdec_pic_info - picture size information 223 * @pic_w: picture width 224 * @pic_h: picture height 225 * @buf_w: picture buffer width (64 aligned up from pic_w) 226 * @buf_h: picture buffer heiht (64 aligned up from pic_h) 227 * @fb_sz: bitstream size of each plane 228 * E.g. suppose picture size is 176x144, 229 * buffer size will be aligned to 176x160. 230 * @cap_fourcc: fourcc number(may changed when resolution change) 231 * @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os. 232 */ 233struct vdec_pic_info { 234 unsigned int pic_w; 235 unsigned int pic_h; 236 unsigned int buf_w; 237 unsigned int buf_h; 238 unsigned int fb_sz[VIDEO_MAX_PLANES]; 239 unsigned int cap_fourcc; 240 unsigned int reserved; 241}; 242 243/** 244 * struct mtk_vcodec_ctx - Context (instance) private data. 245 * 246 * @type: type of the instance - decoder or encoder 247 * @dev: pointer to the mtk_vcodec_dev of the device 248 * @list: link to ctx_list of mtk_vcodec_dev 249 * @fh: struct v4l2_fh 250 * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context 251 * @q_data: store information of input and output queue 252 * of the context 253 * @id: index of the context that this structure describes 254 * @state: state of the context 255 * @param_change: indicate encode parameter type 256 * @enc_params: encoding parameters 257 * @dec_if: hooked decoder driver interface 258 * @enc_if: hoooked encoder driver interface 259 * @drv_handle: driver handle for specific decode/encode instance 260 * 261 * @picinfo: store picture info after header parsing 262 * @dpb_size: store dpb count after header parsing 263 * @int_cond: variable used by the waitqueue 264 * @int_type: type of the last interrupt 265 * @queue: waitqueue that can be used to wait for this context to 266 * finish 267 * @irq_status: irq status 268 * 269 * @ctrl_hdl: handler for v4l2 framework 270 * @decode_work: worker for the decoding 271 * @encode_work: worker for the encoding 272 * @last_decoded_picinfo: pic information get from latest decode 273 * @empty_flush_buf: a fake size-0 capture buffer that indicates flush. Only 274 * to be used with encoder and stateful decoder. 275 * @is_flushing: set to true if flushing is in progress. 276 * @current_codec: current set input codec, in V4L2 pixel format 277 * @capture_fourcc: capture queue type in V4L2 pixel format 278 * 279 * @colorspace: enum v4l2_colorspace; supplemental to pixelformat 280 * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding 281 * @quantization: enum v4l2_quantization, colorspace quantization 282 * @xfer_func: enum v4l2_xfer_func, colorspace transfer function 283 * @decoded_frame_cnt: number of decoded frames 284 * @lock: protect variables accessed by V4L2 threads and worker thread such as 285 * mtk_video_dec_buf. 286 * @hw_id: hardware index used to identify different hardware. 287 * 288 * @max_width: hardware supported max width 289 * @max_height: hardware supported max height 290 * @msg_queue: msg queue used to store lat buffer information. 291 */ 292struct mtk_vcodec_ctx { 293 enum mtk_instance_type type; 294 struct mtk_vcodec_dev *dev; 295 struct list_head list; 296 297 struct v4l2_fh fh; 298 struct v4l2_m2m_ctx *m2m_ctx; 299 struct mtk_q_data q_data[2]; 300 int id; 301 enum mtk_instance_state state; 302 enum mtk_encode_param param_change; 303 struct mtk_enc_params enc_params; 304 305 const struct vdec_common_if *dec_if; 306 const struct venc_common_if *enc_if; 307 void *drv_handle; 308 309 struct vdec_pic_info picinfo; 310 int dpb_size; 311 312 int int_cond[MTK_VDEC_HW_MAX]; 313 int int_type[MTK_VDEC_HW_MAX]; 314 wait_queue_head_t queue[MTK_VDEC_HW_MAX]; 315 unsigned int irq_status; 316 317 struct v4l2_ctrl_handler ctrl_hdl; 318 struct work_struct decode_work; 319 struct work_struct encode_work; 320 struct vdec_pic_info last_decoded_picinfo; 321 struct v4l2_m2m_buffer empty_flush_buf; 322 bool is_flushing; 323 324 u32 current_codec; 325 u32 capture_fourcc; 326 327 enum v4l2_colorspace colorspace; 328 enum v4l2_ycbcr_encoding ycbcr_enc; 329 enum v4l2_quantization quantization; 330 enum v4l2_xfer_func xfer_func; 331 332 int decoded_frame_cnt; 333 struct mutex lock; 334 int hw_id; 335 336 unsigned int max_width; 337 unsigned int max_height; 338 struct vdec_msg_queue msg_queue; 339}; 340 341/* 342 * enum mtk_vdec_hw_arch - Used to separate different hardware architecture 343 */ 344enum mtk_vdec_hw_arch { 345 MTK_VDEC_PURE_SINGLE_CORE, 346 MTK_VDEC_LAT_SINGLE_CORE, 347}; 348 349/* 350 * struct mtk_vdec_format_types - Structure used to get supported 351 * format types according to decoder capability 352 */ 353enum mtk_vdec_format_types { 354 MTK_VDEC_FORMAT_MM21 = 0x20, 355 MTK_VDEC_FORMAT_MT21C = 0x40, 356 MTK_VDEC_FORMAT_H264_SLICE = 0x100, 357 MTK_VDEC_FORMAT_VP8_FRAME = 0x200, 358 MTK_VDEC_FORMAT_VP9_FRAME = 0x400, 359}; 360 361/** 362 * struct mtk_vcodec_dec_pdata - compatible data for each IC 363 * @init_vdec_params: init vdec params 364 * @ctrls_setup: init vcodec dec ctrls 365 * @worker: worker to start a decode job 366 * @flush_decoder: function that flushes the decoder 367 * @get_cap_buffer: get capture buffer from capture queue 368 * @cap_to_disp: put capture buffer to disp list for lat and core arch 369 * @vdec_vb2_ops: struct vb2_ops 370 * 371 * @vdec_formats: supported video decoder formats 372 * @num_formats: count of video decoder formats 373 * @default_out_fmt: default output buffer format 374 * @default_cap_fmt: default capture buffer format 375 * 376 * @vdec_framesizes: supported video decoder frame sizes 377 * @num_framesizes: count of video decoder frame sizes 378 * 379 * @hw_arch: hardware arch is used to separate pure_sin_core and lat_sin_core 380 * 381 * @is_subdev_supported: whether support parent-node architecture(subdev) 382 * @uses_stateless_api: whether the decoder uses the stateless API with requests 383 */ 384 385struct mtk_vcodec_dec_pdata { 386 void (*init_vdec_params)(struct mtk_vcodec_ctx *ctx); 387 int (*ctrls_setup)(struct mtk_vcodec_ctx *ctx); 388 void (*worker)(struct work_struct *work); 389 int (*flush_decoder)(struct mtk_vcodec_ctx *ctx); 390 struct vdec_fb *(*get_cap_buffer)(struct mtk_vcodec_ctx *ctx); 391 void (*cap_to_disp)(struct mtk_vcodec_ctx *ctx, int error, 392 struct media_request *src_buf_req); 393 394 struct vb2_ops *vdec_vb2_ops; 395 396 const struct mtk_video_fmt *vdec_formats; 397 const int *num_formats; 398 const struct mtk_video_fmt *default_out_fmt; 399 const struct mtk_video_fmt *default_cap_fmt; 400 401 const struct mtk_codec_framesizes *vdec_framesizes; 402 const int *num_framesizes; 403 404 enum mtk_vdec_hw_arch hw_arch; 405 406 bool is_subdev_supported; 407 bool uses_stateless_api; 408}; 409 410/** 411 * struct mtk_vcodec_enc_pdata - compatible data for each IC 412 * 413 * @uses_ext: whether the encoder uses the extended firmware messaging format 414 * @min_bitrate: minimum supported encoding bitrate 415 * @max_bitrate: maximum supported encoding bitrate 416 * @capture_formats: array of supported capture formats 417 * @num_capture_formats: number of entries in capture_formats 418 * @output_formats: array of supported output formats 419 * @num_output_formats: number of entries in output_formats 420 * @core_id: stand for h264 or vp8 encode index 421 */ 422struct mtk_vcodec_enc_pdata { 423 bool uses_ext; 424 unsigned long min_bitrate; 425 unsigned long max_bitrate; 426 const struct mtk_video_fmt *capture_formats; 427 size_t num_capture_formats; 428 const struct mtk_video_fmt *output_formats; 429 size_t num_output_formats; 430 int core_id; 431}; 432 433#define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext) 434 435/** 436 * struct mtk_vcodec_dev - driver data 437 * @v4l2_dev: V4L2 device to register video devices for. 438 * @vfd_dec: Video device for decoder 439 * @mdev_dec: Media device for decoder 440 * @vfd_enc: Video device for encoder. 441 * 442 * @m2m_dev_dec: m2m device for decoder 443 * @m2m_dev_enc: m2m device for encoder. 444 * @plat_dev: platform device 445 * @ctx_list: list of struct mtk_vcodec_ctx 446 * @irqlock: protect data access by irq handler and work thread 447 * @curr_ctx: The context that is waiting for codec hardware 448 * 449 * @reg_base: Mapped address of MTK Vcodec registers. 450 * @vdec_pdata: decoder IC-specific data 451 * @venc_pdata: encoder IC-specific data 452 * 453 * @fw_handler: used to communicate with the firmware. 454 * @id_counter: used to identify current opened instance 455 * 456 * @decode_workqueue: decode work queue 457 * @encode_workqueue: encode work queue 458 * 459 * @int_cond: used to identify interrupt condition happen 460 * @int_type: used to identify what kind of interrupt condition happen 461 * @dev_mutex: video_device lock 462 * @queue: waitqueue for waiting for completion of device commands 463 * 464 * @dec_irq: decoder irq resource 465 * @enc_irq: h264 encoder irq resource 466 * 467 * @dec_mutex: decoder hardware lock 468 * @enc_mutex: encoder hardware lock. 469 * 470 * @pm: power management control 471 * @dec_capability: used to identify decode capability, ex: 4k 472 * @enc_capability: used to identify encode capability 473 * 474 * @core_workqueue: queue used for core hardware decode 475 * @msg_queue_core_ctx: msg queue context used for core workqueue 476 * 477 * @subdev_dev: subdev hardware device 478 * @subdev_prob_done: check whether all used hw device is prob done 479 * @subdev_bitmap: used to record hardware is ready or not 480 */ 481struct mtk_vcodec_dev { 482 struct v4l2_device v4l2_dev; 483 struct video_device *vfd_dec; 484 struct media_device mdev_dec; 485 struct video_device *vfd_enc; 486 487 struct v4l2_m2m_dev *m2m_dev_dec; 488 struct v4l2_m2m_dev *m2m_dev_enc; 489 struct platform_device *plat_dev; 490 struct list_head ctx_list; 491 spinlock_t irqlock; 492 struct mtk_vcodec_ctx *curr_ctx; 493 void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE]; 494 const struct mtk_vcodec_dec_pdata *vdec_pdata; 495 const struct mtk_vcodec_enc_pdata *venc_pdata; 496 497 struct mtk_vcodec_fw *fw_handler; 498 499 unsigned long id_counter; 500 501 struct workqueue_struct *decode_workqueue; 502 struct workqueue_struct *encode_workqueue; 503 int int_cond; 504 int int_type; 505 struct mutex dev_mutex; 506 wait_queue_head_t queue; 507 508 int dec_irq; 509 int enc_irq; 510 511 /* decoder hardware mutex lock */ 512 struct mutex dec_mutex[MTK_VDEC_HW_MAX]; 513 struct mutex enc_mutex; 514 515 struct mtk_vcodec_pm pm; 516 unsigned int dec_capability; 517 unsigned int enc_capability; 518 519 struct workqueue_struct *core_workqueue; 520 struct vdec_msg_queue_ctx msg_queue_core_ctx; 521 522 void *subdev_dev[MTK_VDEC_HW_MAX]; 523 int (*subdev_prob_done)(struct mtk_vcodec_dev *vdec_dev); 524 DECLARE_BITMAP(subdev_bitmap, MTK_VDEC_HW_MAX); 525}; 526 527static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh) 528{ 529 return container_of(fh, struct mtk_vcodec_ctx, fh); 530} 531 532static inline struct mtk_vcodec_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl) 533{ 534 return container_of(ctrl->handler, struct mtk_vcodec_ctx, ctrl_hdl); 535} 536 537/* Wake up context wait_queue */ 538static inline void 539wake_up_ctx(struct mtk_vcodec_ctx *ctx, unsigned int reason, unsigned int hw_id) 540{ 541 ctx->int_cond[hw_id] = 1; 542 ctx->int_type[hw_id] = reason; 543 wake_up_interruptible(&ctx->queue[hw_id]); 544} 545 546#endif /* _MTK_VCODEC_DRV_H_ */