cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vdec_drv_if.c (2801B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (c) 2016 MediaTek Inc.
      4 * Author: PC Chen <pc.chen@mediatek.com>
      5 *         Tiffany Lin <tiffany.lin@mediatek.com>
      6 */
      7
      8#include <linux/interrupt.h>
      9#include <linux/kernel.h>
     10#include <linux/slab.h>
     11
     12#include "vdec_drv_if.h"
     13#include "mtk_vcodec_dec.h"
     14#include "vdec_drv_base.h"
     15#include "mtk_vcodec_dec_pm.h"
     16
     17int vdec_if_init(struct mtk_vcodec_ctx *ctx, unsigned int fourcc)
     18{
     19	enum mtk_vdec_hw_arch hw_arch = ctx->dev->vdec_pdata->hw_arch;
     20	int ret = 0;
     21
     22	switch (fourcc) {
     23	case V4L2_PIX_FMT_H264_SLICE:
     24		if (!ctx->dev->vdec_pdata->is_subdev_supported) {
     25			ctx->dec_if = &vdec_h264_slice_if;
     26			ctx->hw_id = MTK_VDEC_CORE;
     27		} else {
     28			ctx->dec_if = &vdec_h264_slice_multi_if;
     29			ctx->hw_id = IS_VDEC_LAT_ARCH(hw_arch) ? MTK_VDEC_LAT0 : MTK_VDEC_CORE;
     30		}
     31		break;
     32	case V4L2_PIX_FMT_H264:
     33		ctx->dec_if = &vdec_h264_if;
     34		ctx->hw_id = MTK_VDEC_CORE;
     35		break;
     36	case V4L2_PIX_FMT_VP8_FRAME:
     37		ctx->dec_if = &vdec_vp8_slice_if;
     38		ctx->hw_id = MTK_VDEC_CORE;
     39		break;
     40	case V4L2_PIX_FMT_VP8:
     41		ctx->dec_if = &vdec_vp8_if;
     42		ctx->hw_id = MTK_VDEC_CORE;
     43		break;
     44	case V4L2_PIX_FMT_VP9:
     45		ctx->dec_if = &vdec_vp9_if;
     46		ctx->hw_id = MTK_VDEC_CORE;
     47		break;
     48	case V4L2_PIX_FMT_VP9_FRAME:
     49		ctx->dec_if = &vdec_vp9_slice_lat_if;
     50		ctx->hw_id = MTK_VDEC_LAT0;
     51		break;
     52	default:
     53		return -EINVAL;
     54	}
     55
     56	mtk_vcodec_dec_enable_hardware(ctx, ctx->hw_id);
     57	ret = ctx->dec_if->init(ctx);
     58	mtk_vcodec_dec_disable_hardware(ctx, ctx->hw_id);
     59
     60	return ret;
     61}
     62
     63int vdec_if_decode(struct mtk_vcodec_ctx *ctx, struct mtk_vcodec_mem *bs,
     64		   struct vdec_fb *fb, bool *res_chg)
     65{
     66	int ret = 0;
     67
     68	if (bs) {
     69		if ((bs->dma_addr & 63) != 0) {
     70			mtk_v4l2_err("bs dma_addr should 64 byte align");
     71			return -EINVAL;
     72		}
     73	}
     74
     75	if (fb) {
     76		if (((fb->base_y.dma_addr & 511) != 0) ||
     77		    ((fb->base_c.dma_addr & 511) != 0)) {
     78			mtk_v4l2_err("frame buffer dma_addr should 512 byte align");
     79			return -EINVAL;
     80		}
     81	}
     82
     83	if (!ctx->drv_handle)
     84		return -EIO;
     85
     86	mtk_vcodec_dec_enable_hardware(ctx, ctx->hw_id);
     87	mtk_vcodec_set_curr_ctx(ctx->dev, ctx, ctx->hw_id);
     88	ret = ctx->dec_if->decode(ctx->drv_handle, bs, fb, res_chg);
     89	mtk_vcodec_set_curr_ctx(ctx->dev, NULL, ctx->hw_id);
     90	mtk_vcodec_dec_disable_hardware(ctx, ctx->hw_id);
     91
     92	return ret;
     93}
     94
     95int vdec_if_get_param(struct mtk_vcodec_ctx *ctx, enum vdec_get_param_type type,
     96		      void *out)
     97{
     98	int ret = 0;
     99
    100	if (!ctx->drv_handle)
    101		return -EIO;
    102
    103	mtk_vdec_lock(ctx);
    104	ret = ctx->dec_if->get_param(ctx->drv_handle, type, out);
    105	mtk_vdec_unlock(ctx);
    106
    107	return ret;
    108}
    109
    110void vdec_if_deinit(struct mtk_vcodec_ctx *ctx)
    111{
    112	if (!ctx->drv_handle)
    113		return;
    114
    115	mtk_vcodec_dec_enable_hardware(ctx, ctx->hw_id);
    116	ctx->dec_if->deinit(ctx->drv_handle);
    117	mtk_vcodec_dec_disable_hardware(ctx, ctx->hw_id);
    118
    119	ctx->drv_handle = NULL;
    120}