cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fimc-lite.h (6392B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2012 Samsung Electronics Co., Ltd.
      4 */
      5
      6#ifndef FIMC_LITE_H_
      7#define FIMC_LITE_H_
      8
      9#include <linux/sizes.h>
     10#include <linux/io.h>
     11#include <linux/irqreturn.h>
     12#include <linux/platform_device.h>
     13#include <linux/sched.h>
     14#include <linux/spinlock.h>
     15#include <linux/types.h>
     16#include <linux/videodev2.h>
     17
     18#include <media/media-entity.h>
     19#include <media/videobuf2-v4l2.h>
     20#include <media/v4l2-ctrls.h>
     21#include <media/v4l2-device.h>
     22#include <media/v4l2-mediabus.h>
     23#include <media/drv-intf/exynos-fimc.h>
     24
     25#define FIMC_LITE_DRV_NAME	"exynos-fimc-lite"
     26#define FLITE_CLK_NAME		"flite"
     27#define FIMC_LITE_MAX_DEVS	3
     28#define FLITE_REQ_BUFS_MIN	2
     29#define FLITE_DEFAULT_WIDTH	640
     30#define FLITE_DEFAULT_HEIGHT	480
     31
     32/* Bit index definitions for struct fimc_lite::state */
     33enum {
     34	ST_FLITE_LPM,
     35	ST_FLITE_PENDING,
     36	ST_FLITE_RUN,
     37	ST_FLITE_STREAM,
     38	ST_FLITE_SUSPENDED,
     39	ST_FLITE_OFF,
     40	ST_FLITE_IN_USE,
     41	ST_FLITE_CONFIG,
     42	ST_SENSOR_STREAM,
     43};
     44
     45#define FLITE_SD_PAD_SINK	0
     46#define FLITE_SD_PAD_SOURCE_DMA	1
     47#define FLITE_SD_PAD_SOURCE_ISP	2
     48#define FLITE_SD_PADS_NUM	3
     49
     50/**
     51 * struct flite_drvdata - FIMC-LITE IP variant data structure
     52 * @max_width: maximum camera interface input width in pixels
     53 * @max_height: maximum camera interface input height in pixels
     54 * @out_width_align: minimum output width alignment in pixels
     55 * @win_hor_offs_align: minimum camera interface crop window horizontal
     56 *			offset alignment in pixels
     57 * @out_hor_offs_align: minimum output DMA compose rectangle horizontal
     58 *			offset alignment in pixels
     59 * @max_dma_bufs: number of output DMA buffer start address registers
     60 * @num_instances: total number of FIMC-LITE IP instances available
     61 */
     62struct flite_drvdata {
     63	unsigned short max_width;
     64	unsigned short max_height;
     65	unsigned short out_width_align;
     66	unsigned short win_hor_offs_align;
     67	unsigned short out_hor_offs_align;
     68	unsigned short max_dma_bufs;
     69	unsigned short num_instances;
     70};
     71
     72struct fimc_lite_events {
     73	unsigned int data_overflow;
     74};
     75
     76#define FLITE_MAX_PLANES	1
     77
     78/**
     79 * struct flite_frame - source/target frame properties
     80 * @f_width: full pixel width
     81 * @f_height: full pixel height
     82 * @rect: crop/composition rectangle
     83 * @fmt: pointer to pixel format description data structure
     84 */
     85struct flite_frame {
     86	u16 f_width;
     87	u16 f_height;
     88	struct v4l2_rect rect;
     89	const struct fimc_fmt *fmt;
     90};
     91
     92/**
     93 * struct flite_buffer - video buffer structure
     94 * @vb:    vb2 buffer
     95 * @list:  list head for the buffers queue
     96 * @addr: DMA buffer start address
     97 * @index: DMA start address register's index
     98 */
     99struct flite_buffer {
    100	struct vb2_v4l2_buffer vb;
    101	struct list_head list;
    102	dma_addr_t addr;
    103	unsigned short index;
    104};
    105
    106/**
    107 * struct fimc_lite - fimc lite structure
    108 * @pdev: pointer to FIMC-LITE platform device
    109 * @dd: SoC specific driver data structure
    110 * @ve: exynos video device entity structure
    111 * @v4l2_dev: pointer to top the level v4l2_device
    112 * @fh: v4l2 file handle
    113 * @subdev: FIMC-LITE subdev
    114 * @vd_pad: media (sink) pad for the capture video node
    115 * @subdev_pads: the subdev media pads
    116 * @sensor: sensor subdev attached to FIMC-LITE directly or through MIPI-CSIS
    117 * @ctrl_handler: v4l2 control handler
    118 * @test_pattern: test pattern controls
    119 * @index: FIMC-LITE platform device index
    120 * @pipeline: video capture pipeline data structure
    121 * @pipeline_ops: media pipeline ops for the video node driver
    122 * @slock: spinlock protecting this data structure and the hw registers
    123 * @lock: mutex serializing video device and the subdev operations
    124 * @clock: FIMC-LITE gate clock
    125 * @regs: memory mapped io registers
    126 * @irq_queue: interrupt handler waitqueue
    127 * @payload: image size in bytes (w x h x bpp)
    128 * @inp_frame: camera input frame structure
    129 * @out_frame: DMA output frame structure
    130 * @out_path: output data path (DMA or FIFO)
    131 * @source_subdev_grp_id: source subdev group id
    132 * @state: driver state flags
    133 * @pending_buf_q: pending buffers queue head
    134 * @active_buf_q: the queue head of buffers scheduled in hardware
    135 * @vb_queue: vb2 buffers queue
    136 * @buf_index: helps to keep track of the DMA start address register index
    137 * @active_buf_count: number of video buffers scheduled in hardware
    138 * @frame_count: the captured frames counter
    139 * @reqbufs_count: the number of buffers requested with REQBUFS ioctl
    140 * @events: event info
    141 * @streaming: is streaming in progress?
    142 */
    143struct fimc_lite {
    144	struct platform_device	*pdev;
    145	struct flite_drvdata	*dd;
    146	struct exynos_video_entity ve;
    147	struct v4l2_device	*v4l2_dev;
    148	struct v4l2_fh		fh;
    149	struct v4l2_subdev	subdev;
    150	struct media_pad	vd_pad;
    151	struct media_pad	subdev_pads[FLITE_SD_PADS_NUM];
    152	struct v4l2_subdev	*sensor;
    153	struct v4l2_ctrl_handler ctrl_handler;
    154	struct v4l2_ctrl	*test_pattern;
    155	int			index;
    156
    157	struct mutex		lock;
    158	spinlock_t		slock;
    159
    160	struct clk		*clock;
    161	void __iomem		*regs;
    162	wait_queue_head_t	irq_queue;
    163
    164	unsigned long		payload[FLITE_MAX_PLANES];
    165	struct flite_frame	inp_frame;
    166	struct flite_frame	out_frame;
    167	atomic_t		out_path;
    168	unsigned int		source_subdev_grp_id;
    169
    170	unsigned long		state;
    171	struct list_head	pending_buf_q;
    172	struct list_head	active_buf_q;
    173	struct vb2_queue	vb_queue;
    174	unsigned short		buf_index;
    175	unsigned int		frame_count;
    176	unsigned int		reqbufs_count;
    177
    178	struct fimc_lite_events	events;
    179	bool			streaming;
    180};
    181
    182static inline bool fimc_lite_active(struct fimc_lite *fimc)
    183{
    184	unsigned long flags;
    185	bool ret;
    186
    187	spin_lock_irqsave(&fimc->slock, flags);
    188	ret = fimc->state & (1 << ST_FLITE_RUN) ||
    189		fimc->state & (1 << ST_FLITE_PENDING);
    190	spin_unlock_irqrestore(&fimc->slock, flags);
    191	return ret;
    192}
    193
    194static inline void fimc_lite_active_queue_add(struct fimc_lite *dev,
    195					 struct flite_buffer *buf)
    196{
    197	list_add_tail(&buf->list, &dev->active_buf_q);
    198}
    199
    200static inline struct flite_buffer *fimc_lite_active_queue_pop(
    201					struct fimc_lite *dev)
    202{
    203	struct flite_buffer *buf = list_entry(dev->active_buf_q.next,
    204					      struct flite_buffer, list);
    205	list_del(&buf->list);
    206	return buf;
    207}
    208
    209static inline void fimc_lite_pending_queue_add(struct fimc_lite *dev,
    210					struct flite_buffer *buf)
    211{
    212	list_add_tail(&buf->list, &dev->pending_buf_q);
    213}
    214
    215static inline struct flite_buffer *fimc_lite_pending_queue_pop(
    216					struct fimc_lite *dev)
    217{
    218	struct flite_buffer *buf = list_entry(dev->pending_buf_q.next,
    219					      struct flite_buffer, list);
    220	list_del(&buf->list);
    221	return buf;
    222}
    223
    224#endif /* FIMC_LITE_H_ */