cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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s5p_mfc_dec.c (34082B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * linux/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c
      4 *
      5 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
      6 *		http://www.samsung.com/
      7 * Kamil Debski, <k.debski@samsung.com>
      8 */
      9
     10#include <linux/clk.h>
     11#include <linux/interrupt.h>
     12#include <linux/io.h>
     13#include <linux/module.h>
     14#include <linux/platform_device.h>
     15#include <linux/sched.h>
     16#include <linux/slab.h>
     17#include <linux/videodev2.h>
     18#include <linux/workqueue.h>
     19#include <media/v4l2-ctrls.h>
     20#include <media/v4l2-event.h>
     21#include <media/videobuf2-v4l2.h>
     22#include "s5p_mfc_common.h"
     23#include "s5p_mfc_ctrl.h"
     24#include "s5p_mfc_debug.h"
     25#include "s5p_mfc_dec.h"
     26#include "s5p_mfc_intr.h"
     27#include "s5p_mfc_opr.h"
     28#include "s5p_mfc_pm.h"
     29
     30static struct s5p_mfc_fmt formats[] = {
     31	{
     32		.fourcc		= V4L2_PIX_FMT_NV12MT_16X16,
     33		.codec_mode	= S5P_MFC_CODEC_NONE,
     34		.type		= MFC_FMT_RAW,
     35		.num_planes	= 2,
     36		.versions	= MFC_V6_BIT | MFC_V7_BIT,
     37	},
     38	{
     39		.fourcc		= V4L2_PIX_FMT_NV12MT,
     40		.codec_mode	= S5P_MFC_CODEC_NONE,
     41		.type		= MFC_FMT_RAW,
     42		.num_planes	= 2,
     43		.versions	= MFC_V5_BIT,
     44	},
     45	{
     46		.fourcc		= V4L2_PIX_FMT_NV12M,
     47		.codec_mode	= S5P_MFC_CODEC_NONE,
     48		.type		= MFC_FMT_RAW,
     49		.num_planes	= 2,
     50		.versions	= MFC_V6PLUS_BITS,
     51	},
     52	{
     53		.fourcc		= V4L2_PIX_FMT_NV21M,
     54		.codec_mode	= S5P_MFC_CODEC_NONE,
     55		.type		= MFC_FMT_RAW,
     56		.num_planes	= 2,
     57		.versions	= MFC_V6PLUS_BITS,
     58	},
     59	{
     60		.fourcc		= V4L2_PIX_FMT_H264,
     61		.codec_mode	= S5P_MFC_CODEC_H264_DEC,
     62		.type		= MFC_FMT_DEC,
     63		.num_planes	= 1,
     64		.versions	= MFC_V5PLUS_BITS,
     65		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION |
     66				  V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM,
     67	},
     68	{
     69		.fourcc		= V4L2_PIX_FMT_H264_MVC,
     70		.codec_mode	= S5P_MFC_CODEC_H264_MVC_DEC,
     71		.type		= MFC_FMT_DEC,
     72		.num_planes	= 1,
     73		.versions	= MFC_V6PLUS_BITS,
     74		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION |
     75				  V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM,
     76	},
     77	{
     78		.fourcc		= V4L2_PIX_FMT_H263,
     79		.codec_mode	= S5P_MFC_CODEC_H263_DEC,
     80		.type		= MFC_FMT_DEC,
     81		.num_planes	= 1,
     82		.versions	= MFC_V5PLUS_BITS,
     83		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION,
     84	},
     85	{
     86		.fourcc		= V4L2_PIX_FMT_MPEG1,
     87		.codec_mode	= S5P_MFC_CODEC_MPEG2_DEC,
     88		.type		= MFC_FMT_DEC,
     89		.num_planes	= 1,
     90		.versions	= MFC_V5PLUS_BITS,
     91		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION |
     92				  V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM,
     93	},
     94	{
     95		.fourcc		= V4L2_PIX_FMT_MPEG2,
     96		.codec_mode	= S5P_MFC_CODEC_MPEG2_DEC,
     97		.type		= MFC_FMT_DEC,
     98		.num_planes	= 1,
     99		.versions	= MFC_V5PLUS_BITS,
    100		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION |
    101				  V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM,
    102	},
    103	{
    104		.fourcc		= V4L2_PIX_FMT_MPEG4,
    105		.codec_mode	= S5P_MFC_CODEC_MPEG4_DEC,
    106		.type		= MFC_FMT_DEC,
    107		.num_planes	= 1,
    108		.versions	= MFC_V5PLUS_BITS,
    109		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION |
    110				  V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM,
    111	},
    112	{
    113		.fourcc		= V4L2_PIX_FMT_XVID,
    114		.codec_mode	= S5P_MFC_CODEC_MPEG4_DEC,
    115		.type		= MFC_FMT_DEC,
    116		.num_planes	= 1,
    117		.versions	= MFC_V5PLUS_BITS,
    118		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION,
    119	},
    120	{
    121		.fourcc		= V4L2_PIX_FMT_VC1_ANNEX_G,
    122		.codec_mode	= S5P_MFC_CODEC_VC1_DEC,
    123		.type		= MFC_FMT_DEC,
    124		.num_planes	= 1,
    125		.versions	= MFC_V5PLUS_BITS,
    126		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION,
    127	},
    128	{
    129		.fourcc		= V4L2_PIX_FMT_VC1_ANNEX_L,
    130		.codec_mode	= S5P_MFC_CODEC_VC1RCV_DEC,
    131		.type		= MFC_FMT_DEC,
    132		.num_planes	= 1,
    133		.versions	= MFC_V5PLUS_BITS,
    134		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION,
    135	},
    136	{
    137		.fourcc		= V4L2_PIX_FMT_VP8,
    138		.codec_mode	= S5P_MFC_CODEC_VP8_DEC,
    139		.type		= MFC_FMT_DEC,
    140		.num_planes	= 1,
    141		.versions	= MFC_V6PLUS_BITS,
    142		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION,
    143	},
    144	{
    145		.fourcc		= V4L2_PIX_FMT_HEVC,
    146		.codec_mode	= S5P_FIMV_CODEC_HEVC_DEC,
    147		.type		= MFC_FMT_DEC,
    148		.num_planes	= 1,
    149		.versions	= MFC_V10_BIT,
    150		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION |
    151				  V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM,
    152	},
    153	{
    154		.fourcc		= V4L2_PIX_FMT_VP9,
    155		.codec_mode	= S5P_FIMV_CODEC_VP9_DEC,
    156		.type		= MFC_FMT_DEC,
    157		.num_planes	= 1,
    158		.versions	= MFC_V10_BIT,
    159		.flags		= V4L2_FMT_FLAG_DYN_RESOLUTION,
    160	},
    161};
    162
    163#define NUM_FORMATS ARRAY_SIZE(formats)
    164
    165/* Find selected format description */
    166static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
    167{
    168	unsigned int i;
    169
    170	for (i = 0; i < NUM_FORMATS; i++) {
    171		if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
    172		    formats[i].type == t)
    173			return &formats[i];
    174	}
    175	return NULL;
    176}
    177
    178static struct mfc_control controls[] = {
    179	{
    180		.id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY,
    181		.type = V4L2_CTRL_TYPE_INTEGER,
    182		.name = "H264 Display Delay",
    183		.minimum = 0,
    184		.maximum = 16383,
    185		.step = 1,
    186		.default_value = 0,
    187	},
    188	{
    189		.id = V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
    190		.type = V4L2_CTRL_TYPE_INTEGER,
    191		.minimum = 0,
    192		.maximum = 16383,
    193		.step = 1,
    194		.default_value = 0,
    195	},
    196	{
    197		.id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE,
    198		.type = V4L2_CTRL_TYPE_BOOLEAN,
    199		.name = "H264 Display Delay Enable",
    200		.minimum = 0,
    201		.maximum = 1,
    202		.step = 1,
    203		.default_value = 0,
    204	},
    205	{
    206		.id = V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
    207		.type = V4L2_CTRL_TYPE_BOOLEAN,
    208		.minimum = 0,
    209		.maximum = 1,
    210		.default_value = 0,
    211	},
    212	{
    213		.id = V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER,
    214		.type = V4L2_CTRL_TYPE_BOOLEAN,
    215		.name = "Mpeg4 Loop Filter Enable",
    216		.minimum = 0,
    217		.maximum = 1,
    218		.step = 1,
    219		.default_value = 0,
    220	},
    221	{
    222		.id = V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE,
    223		.type = V4L2_CTRL_TYPE_BOOLEAN,
    224		.name = "Slice Interface Enable",
    225		.minimum = 0,
    226		.maximum = 1,
    227		.step = 1,
    228		.default_value = 0,
    229	},
    230	{
    231		.id = V4L2_CID_MIN_BUFFERS_FOR_CAPTURE,
    232		.type = V4L2_CTRL_TYPE_INTEGER,
    233		.name = "Minimum number of cap bufs",
    234		.minimum = 1,
    235		.maximum = 32,
    236		.step = 1,
    237		.default_value = 1,
    238		.is_volatile = 1,
    239	},
    240};
    241
    242#define NUM_CTRLS ARRAY_SIZE(controls)
    243
    244/* Check whether a context should be run on hardware */
    245static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
    246{
    247	/* Context is to parse header */
    248	if (ctx->src_queue_cnt >= 1 && ctx->state == MFCINST_GOT_INST)
    249		return 1;
    250	/* Context is to decode a frame */
    251	if (ctx->src_queue_cnt >= 1 &&
    252	    ctx->state == MFCINST_RUNNING &&
    253	    ctx->dst_queue_cnt >= ctx->pb_count)
    254		return 1;
    255	/* Context is to return last frame */
    256	if (ctx->state == MFCINST_FINISHING &&
    257	    ctx->dst_queue_cnt >= ctx->pb_count)
    258		return 1;
    259	/* Context is to set buffers */
    260	if (ctx->src_queue_cnt >= 1 &&
    261	    ctx->state == MFCINST_HEAD_PARSED &&
    262	    ctx->capture_state == QUEUE_BUFS_MMAPED)
    263		return 1;
    264	/* Resolution change */
    265	if ((ctx->state == MFCINST_RES_CHANGE_INIT ||
    266		ctx->state == MFCINST_RES_CHANGE_FLUSH) &&
    267		ctx->dst_queue_cnt >= ctx->pb_count)
    268		return 1;
    269	if (ctx->state == MFCINST_RES_CHANGE_END &&
    270		ctx->src_queue_cnt >= 1)
    271		return 1;
    272	mfc_debug(2, "ctx is not ready\n");
    273	return 0;
    274}
    275
    276static const struct s5p_mfc_codec_ops decoder_codec_ops = {
    277	.pre_seq_start		= NULL,
    278	.post_seq_start		= NULL,
    279	.pre_frame_start	= NULL,
    280	.post_frame_start	= NULL,
    281};
    282
    283/* Query capabilities of the device */
    284static int vidioc_querycap(struct file *file, void *priv,
    285			   struct v4l2_capability *cap)
    286{
    287	struct s5p_mfc_dev *dev = video_drvdata(file);
    288
    289	strscpy(cap->driver, S5P_MFC_NAME, sizeof(cap->driver));
    290	strscpy(cap->card, dev->vfd_dec->name, sizeof(cap->card));
    291	return 0;
    292}
    293
    294/* Enumerate format */
    295static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
    296							bool out)
    297{
    298	struct s5p_mfc_dev *dev = video_drvdata(file);
    299	int i, j = 0;
    300
    301	for (i = 0; i < ARRAY_SIZE(formats); ++i) {
    302		if (out && formats[i].type != MFC_FMT_DEC)
    303			continue;
    304		else if (!out && formats[i].type != MFC_FMT_RAW)
    305			continue;
    306		else if ((dev->variant->version_bit & formats[i].versions) == 0)
    307			continue;
    308
    309		if (j == f->index)
    310			break;
    311		++j;
    312	}
    313	if (i == ARRAY_SIZE(formats))
    314		return -EINVAL;
    315	f->pixelformat = formats[i].fourcc;
    316	return 0;
    317}
    318
    319static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
    320				   struct v4l2_fmtdesc *f)
    321{
    322	return vidioc_enum_fmt(file, f, false);
    323}
    324
    325static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
    326				   struct v4l2_fmtdesc *f)
    327{
    328	return vidioc_enum_fmt(file, f, true);
    329}
    330
    331/* Get format */
    332static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
    333{
    334	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    335	struct v4l2_pix_format_mplane *pix_mp;
    336
    337	mfc_debug_enter();
    338	pix_mp = &f->fmt.pix_mp;
    339	if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE &&
    340	    (ctx->state == MFCINST_GOT_INST || ctx->state ==
    341						MFCINST_RES_CHANGE_END)) {
    342		/* If the MFC is parsing the header,
    343		 * so wait until it is finished */
    344		s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_SEQ_DONE_RET,
    345									0);
    346	}
    347	if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE &&
    348	    ctx->state >= MFCINST_HEAD_PARSED &&
    349	    ctx->state < MFCINST_ABORT) {
    350		/* This is run on CAPTURE (decode output) */
    351		/* Width and height are set to the dimensions
    352		   of the movie, the buffer is bigger and
    353		   further processing stages should crop to this
    354		   rectangle. */
    355		pix_mp->width = ctx->buf_width;
    356		pix_mp->height = ctx->buf_height;
    357		pix_mp->field = V4L2_FIELD_NONE;
    358		pix_mp->num_planes = 2;
    359		/* Set pixelformat to the format in which MFC
    360		   outputs the decoded frame */
    361		pix_mp->pixelformat = ctx->dst_fmt->fourcc;
    362		pix_mp->plane_fmt[0].bytesperline = ctx->buf_width;
    363		pix_mp->plane_fmt[0].sizeimage = ctx->luma_size;
    364		pix_mp->plane_fmt[1].bytesperline = ctx->buf_width;
    365		pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
    366	} else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
    367		/* This is run on OUTPUT
    368		   The buffer contains compressed image
    369		   so width and height have no meaning */
    370		pix_mp->width = 0;
    371		pix_mp->height = 0;
    372		pix_mp->field = V4L2_FIELD_NONE;
    373		pix_mp->plane_fmt[0].bytesperline = ctx->dec_src_buf_size;
    374		pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size;
    375		pix_mp->pixelformat = ctx->src_fmt->fourcc;
    376		pix_mp->num_planes = ctx->src_fmt->num_planes;
    377	} else {
    378		mfc_err("Format could not be read\n");
    379		mfc_debug(2, "%s-- with error\n", __func__);
    380		return -EINVAL;
    381	}
    382	mfc_debug_leave();
    383	return 0;
    384}
    385
    386/* Try format */
    387static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
    388{
    389	struct s5p_mfc_dev *dev = video_drvdata(file);
    390	struct s5p_mfc_fmt *fmt;
    391
    392	mfc_debug(2, "Type is %d\n", f->type);
    393	if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
    394		fmt = find_format(f, MFC_FMT_DEC);
    395		if (!fmt) {
    396			mfc_err("Unsupported format for source.\n");
    397			return -EINVAL;
    398		}
    399		if (fmt->codec_mode == S5P_FIMV_CODEC_NONE) {
    400			mfc_err("Unknown codec\n");
    401			return -EINVAL;
    402		}
    403		if ((dev->variant->version_bit & fmt->versions) == 0) {
    404			mfc_err("Unsupported format by this MFC version.\n");
    405			return -EINVAL;
    406		}
    407	} else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    408		fmt = find_format(f, MFC_FMT_RAW);
    409		if (!fmt) {
    410			mfc_err("Unsupported format for destination.\n");
    411			return -EINVAL;
    412		}
    413		if ((dev->variant->version_bit & fmt->versions) == 0) {
    414			mfc_err("Unsupported format by this MFC version.\n");
    415			return -EINVAL;
    416		}
    417	}
    418
    419	return 0;
    420}
    421
    422/* Set format */
    423static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
    424{
    425	struct s5p_mfc_dev *dev = video_drvdata(file);
    426	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    427	int ret = 0;
    428	struct v4l2_pix_format_mplane *pix_mp;
    429	struct s5p_mfc_buf_size *buf_size = dev->variant->buf_size;
    430
    431	mfc_debug_enter();
    432	ret = vidioc_try_fmt(file, priv, f);
    433	pix_mp = &f->fmt.pix_mp;
    434	if (ret)
    435		return ret;
    436	if (vb2_is_streaming(&ctx->vq_src) || vb2_is_streaming(&ctx->vq_dst)) {
    437		v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
    438		ret = -EBUSY;
    439		goto out;
    440	}
    441	if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    442		/* dst_fmt is validated by call to vidioc_try_fmt */
    443		ctx->dst_fmt = find_format(f, MFC_FMT_RAW);
    444		ret = 0;
    445		goto out;
    446	} else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
    447		/* src_fmt is validated by call to vidioc_try_fmt */
    448		ctx->src_fmt = find_format(f, MFC_FMT_DEC);
    449		ctx->codec_mode = ctx->src_fmt->codec_mode;
    450		mfc_debug(2, "The codec number is: %d\n", ctx->codec_mode);
    451		pix_mp->height = 0;
    452		pix_mp->width = 0;
    453		if (pix_mp->plane_fmt[0].sizeimage == 0)
    454			pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size =
    455								DEF_CPB_SIZE;
    456		else if (pix_mp->plane_fmt[0].sizeimage > buf_size->cpb)
    457			ctx->dec_src_buf_size = buf_size->cpb;
    458		else
    459			ctx->dec_src_buf_size = pix_mp->plane_fmt[0].sizeimage;
    460		pix_mp->plane_fmt[0].bytesperline = 0;
    461		ctx->state = MFCINST_INIT;
    462		ret = 0;
    463		goto out;
    464	} else {
    465		mfc_err("Wrong type error for S_FMT : %d", f->type);
    466		ret = -EINVAL;
    467		goto out;
    468	}
    469
    470out:
    471	mfc_debug_leave();
    472	return ret;
    473}
    474
    475static int reqbufs_output(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
    476				struct v4l2_requestbuffers *reqbufs)
    477{
    478	int ret = 0;
    479
    480	s5p_mfc_clock_on();
    481
    482	if (reqbufs->count == 0) {
    483		mfc_debug(2, "Freeing buffers\n");
    484		ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
    485		if (ret)
    486			goto out;
    487		ctx->src_bufs_cnt = 0;
    488		ctx->output_state = QUEUE_FREE;
    489	} else if (ctx->output_state == QUEUE_FREE) {
    490		/* Can only request buffers when we have a valid format set. */
    491		WARN_ON(ctx->src_bufs_cnt != 0);
    492		if (ctx->state != MFCINST_INIT) {
    493			mfc_err("Reqbufs called in an invalid state\n");
    494			ret = -EINVAL;
    495			goto out;
    496		}
    497
    498		mfc_debug(2, "Allocating %d buffers for OUTPUT queue\n",
    499				reqbufs->count);
    500		ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
    501		if (ret)
    502			goto out;
    503
    504		ret = s5p_mfc_open_mfc_inst(dev, ctx);
    505		if (ret) {
    506			reqbufs->count = 0;
    507			vb2_reqbufs(&ctx->vq_src, reqbufs);
    508			goto out;
    509		}
    510
    511		ctx->output_state = QUEUE_BUFS_REQUESTED;
    512	} else {
    513		mfc_err("Buffers have already been requested\n");
    514		ret = -EINVAL;
    515	}
    516out:
    517	s5p_mfc_clock_off();
    518	if (ret)
    519		mfc_err("Failed allocating buffers for OUTPUT queue\n");
    520	return ret;
    521}
    522
    523static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
    524				struct v4l2_requestbuffers *reqbufs)
    525{
    526	int ret = 0;
    527
    528	s5p_mfc_clock_on();
    529
    530	if (reqbufs->count == 0) {
    531		mfc_debug(2, "Freeing buffers\n");
    532		ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
    533		if (ret)
    534			goto out;
    535		s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx);
    536		ctx->dst_bufs_cnt = 0;
    537	} else if (ctx->capture_state == QUEUE_FREE) {
    538		WARN_ON(ctx->dst_bufs_cnt != 0);
    539		mfc_debug(2, "Allocating %d buffers for CAPTURE queue\n",
    540				reqbufs->count);
    541		ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
    542		if (ret)
    543			goto out;
    544
    545		ctx->capture_state = QUEUE_BUFS_REQUESTED;
    546		ctx->total_dpb_count = reqbufs->count;
    547
    548		ret = s5p_mfc_hw_call(dev->mfc_ops, alloc_codec_buffers, ctx);
    549		if (ret) {
    550			mfc_err("Failed to allocate decoding buffers\n");
    551			reqbufs->count = 0;
    552			vb2_reqbufs(&ctx->vq_dst, reqbufs);
    553			ret = -ENOMEM;
    554			ctx->capture_state = QUEUE_FREE;
    555			goto out;
    556		}
    557
    558		WARN_ON(ctx->dst_bufs_cnt != ctx->total_dpb_count);
    559		ctx->capture_state = QUEUE_BUFS_MMAPED;
    560
    561		if (s5p_mfc_ctx_ready(ctx))
    562			set_work_bit_irqsave(ctx);
    563		s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
    564		s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_INIT_BUFFERS_RET,
    565					  0);
    566	} else {
    567		mfc_err("Buffers have already been requested\n");
    568		ret = -EINVAL;
    569	}
    570out:
    571	s5p_mfc_clock_off();
    572	if (ret)
    573		mfc_err("Failed allocating buffers for CAPTURE queue\n");
    574	return ret;
    575}
    576
    577/* Request buffers */
    578static int vidioc_reqbufs(struct file *file, void *priv,
    579					  struct v4l2_requestbuffers *reqbufs)
    580{
    581	struct s5p_mfc_dev *dev = video_drvdata(file);
    582	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    583
    584	if (reqbufs->memory != V4L2_MEMORY_MMAP) {
    585		mfc_debug(2, "Only V4L2_MEMORY_MMAP is supported\n");
    586		return -EINVAL;
    587	}
    588
    589	if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
    590		return reqbufs_output(dev, ctx, reqbufs);
    591	} else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    592		return reqbufs_capture(dev, ctx, reqbufs);
    593	} else {
    594		mfc_err("Invalid type requested\n");
    595		return -EINVAL;
    596	}
    597}
    598
    599/* Query buffer */
    600static int vidioc_querybuf(struct file *file, void *priv,
    601						   struct v4l2_buffer *buf)
    602{
    603	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    604	int ret;
    605	int i;
    606
    607	if (buf->memory != V4L2_MEMORY_MMAP) {
    608		mfc_err("Only mmapped buffers can be used\n");
    609		return -EINVAL;
    610	}
    611	mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type);
    612	if (ctx->state == MFCINST_GOT_INST &&
    613			buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
    614		ret = vb2_querybuf(&ctx->vq_src, buf);
    615	} else if (ctx->state == MFCINST_RUNNING &&
    616			buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    617		ret = vb2_querybuf(&ctx->vq_dst, buf);
    618		for (i = 0; i < buf->length; i++)
    619			buf->m.planes[i].m.mem_offset += DST_QUEUE_OFF_BASE;
    620	} else {
    621		mfc_err("vidioc_querybuf called in an inappropriate state\n");
    622		ret = -EINVAL;
    623	}
    624	mfc_debug_leave();
    625	return ret;
    626}
    627
    628/* Queue a buffer */
    629static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
    630{
    631	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    632
    633	if (ctx->state == MFCINST_ERROR) {
    634		mfc_err("Call on QBUF after unrecoverable error\n");
    635		return -EIO;
    636	}
    637	if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
    638		return vb2_qbuf(&ctx->vq_src, NULL, buf);
    639	else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
    640		return vb2_qbuf(&ctx->vq_dst, NULL, buf);
    641	return -EINVAL;
    642}
    643
    644/* Dequeue a buffer */
    645static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
    646{
    647	const struct v4l2_event ev = {
    648		.type = V4L2_EVENT_EOS
    649	};
    650	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    651	int ret;
    652
    653	if (ctx->state == MFCINST_ERROR) {
    654		mfc_err_limited("Call on DQBUF after unrecoverable error\n");
    655		return -EIO;
    656	}
    657
    658	switch (buf->type) {
    659	case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
    660		return vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
    661	case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
    662		ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
    663		if (ret)
    664			return ret;
    665
    666		if (ctx->state == MFCINST_FINISHED &&
    667		    (ctx->dst_bufs[buf->index].flags & MFC_BUF_FLAG_EOS))
    668			v4l2_event_queue_fh(&ctx->fh, &ev);
    669		return 0;
    670	default:
    671		return -EINVAL;
    672	}
    673}
    674
    675/* Export DMA buffer */
    676static int vidioc_expbuf(struct file *file, void *priv,
    677	struct v4l2_exportbuffer *eb)
    678{
    679	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    680
    681	if (eb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
    682		return vb2_expbuf(&ctx->vq_src, eb);
    683	if (eb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
    684		return vb2_expbuf(&ctx->vq_dst, eb);
    685	return -EINVAL;
    686}
    687
    688/* Stream on */
    689static int vidioc_streamon(struct file *file, void *priv,
    690			   enum v4l2_buf_type type)
    691{
    692	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    693	int ret = -EINVAL;
    694
    695	mfc_debug_enter();
    696	if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
    697		ret = vb2_streamon(&ctx->vq_src, type);
    698	else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
    699		ret = vb2_streamon(&ctx->vq_dst, type);
    700	mfc_debug_leave();
    701	return ret;
    702}
    703
    704/* Stream off, which equals to a pause */
    705static int vidioc_streamoff(struct file *file, void *priv,
    706			    enum v4l2_buf_type type)
    707{
    708	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    709
    710	if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
    711		return vb2_streamoff(&ctx->vq_src, type);
    712	else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
    713		return vb2_streamoff(&ctx->vq_dst, type);
    714	return -EINVAL;
    715}
    716
    717/* Set controls - v4l2 control framework */
    718static int s5p_mfc_dec_s_ctrl(struct v4l2_ctrl *ctrl)
    719{
    720	struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
    721
    722	switch (ctrl->id) {
    723	case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY:
    724	case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY:
    725		ctx->display_delay = ctrl->val;
    726		break;
    727	case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE:
    728	case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE:
    729		ctx->display_delay_enable = ctrl->val;
    730		break;
    731	case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER:
    732		ctx->loop_filter_mpeg4 = ctrl->val;
    733		break;
    734	case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE:
    735		ctx->slice_interface = ctrl->val;
    736		break;
    737	default:
    738		mfc_err("Invalid control 0x%08x\n", ctrl->id);
    739		return -EINVAL;
    740	}
    741	return 0;
    742}
    743
    744static int s5p_mfc_dec_g_v_ctrl(struct v4l2_ctrl *ctrl)
    745{
    746	struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
    747	struct s5p_mfc_dev *dev = ctx->dev;
    748
    749	switch (ctrl->id) {
    750	case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
    751		if (ctx->state >= MFCINST_HEAD_PARSED &&
    752		    ctx->state < MFCINST_ABORT) {
    753			ctrl->val = ctx->pb_count;
    754			break;
    755		} else if (ctx->state != MFCINST_INIT &&
    756				ctx->state != MFCINST_RES_CHANGE_END) {
    757			v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n");
    758			return -EINVAL;
    759		}
    760		/* Should wait for the header to be parsed */
    761		s5p_mfc_wait_for_done_ctx(ctx,
    762				S5P_MFC_R2H_CMD_SEQ_DONE_RET, 0);
    763		if (ctx->state >= MFCINST_HEAD_PARSED &&
    764		    ctx->state < MFCINST_ABORT) {
    765			ctrl->val = ctx->pb_count;
    766		} else {
    767			v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n");
    768			return -EINVAL;
    769		}
    770		break;
    771	}
    772	return 0;
    773}
    774
    775
    776static const struct v4l2_ctrl_ops s5p_mfc_dec_ctrl_ops = {
    777	.s_ctrl = s5p_mfc_dec_s_ctrl,
    778	.g_volatile_ctrl = s5p_mfc_dec_g_v_ctrl,
    779};
    780
    781/* Get compose information */
    782static int vidioc_g_selection(struct file *file, void *priv,
    783			      struct v4l2_selection *s)
    784{
    785	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    786	struct s5p_mfc_dev *dev = ctx->dev;
    787	u32 left, right, top, bottom;
    788	u32 width, height;
    789
    790	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
    791		return -EINVAL;
    792
    793	if (ctx->state != MFCINST_HEAD_PARSED &&
    794	    ctx->state != MFCINST_RUNNING &&
    795	    ctx->state != MFCINST_FINISHING &&
    796	    ctx->state != MFCINST_FINISHED) {
    797		mfc_err("Can not get compose information\n");
    798		return -EINVAL;
    799	}
    800	if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_H264) {
    801		left = s5p_mfc_hw_call(dev->mfc_ops, get_crop_info_h, ctx);
    802		right = left >> S5P_FIMV_SHARED_CROP_RIGHT_SHIFT;
    803		left = left & S5P_FIMV_SHARED_CROP_LEFT_MASK;
    804		top = s5p_mfc_hw_call(dev->mfc_ops, get_crop_info_v, ctx);
    805		bottom = top >> S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT;
    806		top = top & S5P_FIMV_SHARED_CROP_TOP_MASK;
    807		width = ctx->img_width - left - right;
    808		height = ctx->img_height - top - bottom;
    809		mfc_debug(2, "Composing info [h264]: l=%d t=%d w=%d h=%d (r=%d b=%d fw=%d fh=%d\n",
    810			  left, top, s->r.width, s->r.height, right, bottom,
    811			  ctx->buf_width, ctx->buf_height);
    812	} else {
    813		left = 0;
    814		top = 0;
    815		width = ctx->img_width;
    816		height = ctx->img_height;
    817		mfc_debug(2, "Composing info: w=%d h=%d fw=%d fh=%d\n",
    818			  s->r.width, s->r.height, ctx->buf_width,
    819			  ctx->buf_height);
    820	}
    821
    822	switch (s->target) {
    823	case V4L2_SEL_TGT_COMPOSE:
    824	case V4L2_SEL_TGT_COMPOSE_DEFAULT:
    825	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
    826		s->r.left = left;
    827		s->r.top = top;
    828		s->r.width = width;
    829		s->r.height = height;
    830		break;
    831	default:
    832		return -EINVAL;
    833	}
    834	return 0;
    835}
    836
    837static int vidioc_decoder_cmd(struct file *file, void *priv,
    838			      struct v4l2_decoder_cmd *cmd)
    839{
    840	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
    841	struct s5p_mfc_dev *dev = ctx->dev;
    842	struct s5p_mfc_buf *buf;
    843	unsigned long flags;
    844
    845	switch (cmd->cmd) {
    846	case V4L2_DEC_CMD_STOP:
    847		if (cmd->flags != 0)
    848			return -EINVAL;
    849
    850		if (!vb2_is_streaming(&ctx->vq_src))
    851			return -EINVAL;
    852
    853		spin_lock_irqsave(&dev->irqlock, flags);
    854		if (list_empty(&ctx->src_queue)) {
    855			mfc_err("EOS: empty src queue, entering finishing state");
    856			ctx->state = MFCINST_FINISHING;
    857			if (s5p_mfc_ctx_ready(ctx))
    858				set_work_bit_irqsave(ctx);
    859			spin_unlock_irqrestore(&dev->irqlock, flags);
    860			s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
    861		} else {
    862			mfc_err("EOS: marking last buffer of stream");
    863			buf = list_entry(ctx->src_queue.prev,
    864						struct s5p_mfc_buf, list);
    865			if (buf->flags & MFC_BUF_FLAG_USED)
    866				ctx->state = MFCINST_FINISHING;
    867			else
    868				buf->flags |= MFC_BUF_FLAG_EOS;
    869			spin_unlock_irqrestore(&dev->irqlock, flags);
    870		}
    871		break;
    872	default:
    873		return -EINVAL;
    874	}
    875	return 0;
    876}
    877
    878static int vidioc_subscribe_event(struct v4l2_fh *fh,
    879				const struct  v4l2_event_subscription *sub)
    880{
    881	switch (sub->type) {
    882	case V4L2_EVENT_EOS:
    883		return v4l2_event_subscribe(fh, sub, 2, NULL);
    884	case V4L2_EVENT_SOURCE_CHANGE:
    885		return v4l2_src_change_event_subscribe(fh, sub);
    886	default:
    887		return -EINVAL;
    888	}
    889}
    890
    891
    892/* v4l2_ioctl_ops */
    893static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = {
    894	.vidioc_querycap = vidioc_querycap,
    895	.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
    896	.vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
    897	.vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
    898	.vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
    899	.vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
    900	.vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
    901	.vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
    902	.vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
    903	.vidioc_reqbufs = vidioc_reqbufs,
    904	.vidioc_querybuf = vidioc_querybuf,
    905	.vidioc_qbuf = vidioc_qbuf,
    906	.vidioc_dqbuf = vidioc_dqbuf,
    907	.vidioc_expbuf = vidioc_expbuf,
    908	.vidioc_streamon = vidioc_streamon,
    909	.vidioc_streamoff = vidioc_streamoff,
    910	.vidioc_g_selection = vidioc_g_selection,
    911	.vidioc_decoder_cmd = vidioc_decoder_cmd,
    912	.vidioc_subscribe_event = vidioc_subscribe_event,
    913	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
    914};
    915
    916static int s5p_mfc_queue_setup(struct vb2_queue *vq,
    917			unsigned int *buf_count,
    918			unsigned int *plane_count, unsigned int psize[],
    919			struct device *alloc_devs[])
    920{
    921	struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
    922	struct s5p_mfc_dev *dev = ctx->dev;
    923
    924	/* Video output for decoding (source)
    925	 * this can be set after getting an instance */
    926	if (ctx->state == MFCINST_INIT &&
    927	    vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
    928		/* A single plane is required for input */
    929		*plane_count = 1;
    930		if (*buf_count < 1)
    931			*buf_count = 1;
    932		if (*buf_count > MFC_MAX_BUFFERS)
    933			*buf_count = MFC_MAX_BUFFERS;
    934	/* Video capture for decoding (destination)
    935	 * this can be set after the header was parsed */
    936	} else if (ctx->state == MFCINST_HEAD_PARSED &&
    937		   vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    938		/* Output plane count is 2 - one for Y and one for CbCr */
    939		*plane_count = 2;
    940		/* Setup buffer count */
    941		if (*buf_count < ctx->pb_count)
    942			*buf_count = ctx->pb_count;
    943		if (*buf_count > ctx->pb_count + MFC_MAX_EXTRA_DPB)
    944			*buf_count = ctx->pb_count + MFC_MAX_EXTRA_DPB;
    945		if (*buf_count > MFC_MAX_BUFFERS)
    946			*buf_count = MFC_MAX_BUFFERS;
    947	} else {
    948		mfc_err("State seems invalid. State = %d, vq->type = %d\n",
    949							ctx->state, vq->type);
    950		return -EINVAL;
    951	}
    952	mfc_debug(2, "Buffer count=%d, plane count=%d\n",
    953						*buf_count, *plane_count);
    954	if (ctx->state == MFCINST_HEAD_PARSED &&
    955	    vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    956		psize[0] = ctx->luma_size;
    957		psize[1] = ctx->chroma_size;
    958
    959		if (IS_MFCV6_PLUS(dev))
    960			alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
    961		else
    962			alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX];
    963		alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX];
    964	} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE &&
    965		   ctx->state == MFCINST_INIT) {
    966		psize[0] = ctx->dec_src_buf_size;
    967		alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
    968	} else {
    969		mfc_err("This video node is dedicated to decoding. Decoding not initialized\n");
    970		return -EINVAL;
    971	}
    972	return 0;
    973}
    974
    975static int s5p_mfc_buf_init(struct vb2_buffer *vb)
    976{
    977	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
    978	struct vb2_queue *vq = vb->vb2_queue;
    979	struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
    980	unsigned int i;
    981
    982	if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
    983		if (ctx->capture_state == QUEUE_BUFS_MMAPED)
    984			return 0;
    985		for (i = 0; i < ctx->dst_fmt->num_planes; i++) {
    986			if (IS_ERR_OR_NULL(ERR_PTR(
    987					vb2_dma_contig_plane_dma_addr(vb, i)))) {
    988				mfc_err("Plane mem not allocated\n");
    989				return -EINVAL;
    990			}
    991		}
    992		if (vb2_plane_size(vb, 0) < ctx->luma_size ||
    993			vb2_plane_size(vb, 1) < ctx->chroma_size) {
    994			mfc_err("Plane buffer (CAPTURE) is too small\n");
    995			return -EINVAL;
    996		}
    997		i = vb->index;
    998		ctx->dst_bufs[i].b = vbuf;
    999		ctx->dst_bufs[i].cookie.raw.luma =
   1000					vb2_dma_contig_plane_dma_addr(vb, 0);
   1001		ctx->dst_bufs[i].cookie.raw.chroma =
   1002					vb2_dma_contig_plane_dma_addr(vb, 1);
   1003		ctx->dst_bufs_cnt++;
   1004	} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
   1005		if (IS_ERR_OR_NULL(ERR_PTR(
   1006					vb2_dma_contig_plane_dma_addr(vb, 0)))) {
   1007			mfc_err("Plane memory not allocated\n");
   1008			return -EINVAL;
   1009		}
   1010		if (vb2_plane_size(vb, 0) < ctx->dec_src_buf_size) {
   1011			mfc_err("Plane buffer (OUTPUT) is too small\n");
   1012			return -EINVAL;
   1013		}
   1014
   1015		i = vb->index;
   1016		ctx->src_bufs[i].b = vbuf;
   1017		ctx->src_bufs[i].cookie.stream =
   1018					vb2_dma_contig_plane_dma_addr(vb, 0);
   1019		ctx->src_bufs_cnt++;
   1020	} else {
   1021		mfc_err("s5p_mfc_buf_init: unknown queue type\n");
   1022		return -EINVAL;
   1023	}
   1024	return 0;
   1025}
   1026
   1027static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
   1028{
   1029	struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
   1030	struct s5p_mfc_dev *dev = ctx->dev;
   1031
   1032	v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
   1033	if (ctx->state == MFCINST_FINISHING ||
   1034		ctx->state == MFCINST_FINISHED)
   1035		ctx->state = MFCINST_RUNNING;
   1036	/* If context is ready then dev = work->data;schedule it to run */
   1037	if (s5p_mfc_ctx_ready(ctx))
   1038		set_work_bit_irqsave(ctx);
   1039	s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
   1040	return 0;
   1041}
   1042
   1043static void s5p_mfc_stop_streaming(struct vb2_queue *q)
   1044{
   1045	unsigned long flags;
   1046	struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
   1047	struct s5p_mfc_dev *dev = ctx->dev;
   1048	int aborted = 0;
   1049
   1050	spin_lock_irqsave(&dev->irqlock, flags);
   1051	if ((ctx->state == MFCINST_FINISHING ||
   1052		ctx->state ==  MFCINST_RUNNING) &&
   1053		dev->curr_ctx == ctx->num && dev->hw_lock) {
   1054		ctx->state = MFCINST_ABORT;
   1055		spin_unlock_irqrestore(&dev->irqlock, flags);
   1056		s5p_mfc_wait_for_done_ctx(ctx,
   1057					S5P_MFC_R2H_CMD_FRAME_DONE_RET, 0);
   1058		aborted = 1;
   1059		spin_lock_irqsave(&dev->irqlock, flags);
   1060	}
   1061	if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
   1062		s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst);
   1063		INIT_LIST_HEAD(&ctx->dst_queue);
   1064		ctx->dst_queue_cnt = 0;
   1065		ctx->dpb_flush_flag = 1;
   1066		ctx->dec_dst_flag = 0;
   1067		if (IS_MFCV6_PLUS(dev) && (ctx->state == MFCINST_RUNNING)) {
   1068			ctx->state = MFCINST_FLUSH;
   1069			set_work_bit_irqsave(ctx);
   1070			s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
   1071			spin_unlock_irqrestore(&dev->irqlock, flags);
   1072			if (s5p_mfc_wait_for_done_ctx(ctx,
   1073				S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0))
   1074				mfc_err("Err flushing buffers\n");
   1075			spin_lock_irqsave(&dev->irqlock, flags);
   1076		}
   1077	} else if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
   1078		s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src);
   1079		INIT_LIST_HEAD(&ctx->src_queue);
   1080		ctx->src_queue_cnt = 0;
   1081	}
   1082	if (aborted)
   1083		ctx->state = MFCINST_RUNNING;
   1084	spin_unlock_irqrestore(&dev->irqlock, flags);
   1085}
   1086
   1087
   1088static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
   1089{
   1090	struct vb2_queue *vq = vb->vb2_queue;
   1091	struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
   1092	struct s5p_mfc_dev *dev = ctx->dev;
   1093	unsigned long flags;
   1094	struct s5p_mfc_buf *mfc_buf;
   1095
   1096	if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
   1097		mfc_buf = &ctx->src_bufs[vb->index];
   1098		mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
   1099		spin_lock_irqsave(&dev->irqlock, flags);
   1100		list_add_tail(&mfc_buf->list, &ctx->src_queue);
   1101		ctx->src_queue_cnt++;
   1102		spin_unlock_irqrestore(&dev->irqlock, flags);
   1103	} else if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
   1104		mfc_buf = &ctx->dst_bufs[vb->index];
   1105		mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
   1106		/* Mark destination as available for use by MFC */
   1107		spin_lock_irqsave(&dev->irqlock, flags);
   1108		set_bit(vb->index, &ctx->dec_dst_flag);
   1109		list_add_tail(&mfc_buf->list, &ctx->dst_queue);
   1110		ctx->dst_queue_cnt++;
   1111		spin_unlock_irqrestore(&dev->irqlock, flags);
   1112	} else {
   1113		mfc_err("Unsupported buffer type (%d)\n", vq->type);
   1114	}
   1115	if (s5p_mfc_ctx_ready(ctx))
   1116		set_work_bit_irqsave(ctx);
   1117	s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
   1118}
   1119
   1120static struct vb2_ops s5p_mfc_dec_qops = {
   1121	.queue_setup		= s5p_mfc_queue_setup,
   1122	.wait_prepare		= vb2_ops_wait_prepare,
   1123	.wait_finish		= vb2_ops_wait_finish,
   1124	.buf_init		= s5p_mfc_buf_init,
   1125	.start_streaming	= s5p_mfc_start_streaming,
   1126	.stop_streaming		= s5p_mfc_stop_streaming,
   1127	.buf_queue		= s5p_mfc_buf_queue,
   1128};
   1129
   1130const struct s5p_mfc_codec_ops *get_dec_codec_ops(void)
   1131{
   1132	return &decoder_codec_ops;
   1133}
   1134
   1135struct vb2_ops *get_dec_queue_ops(void)
   1136{
   1137	return &s5p_mfc_dec_qops;
   1138}
   1139
   1140const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void)
   1141{
   1142	return &s5p_mfc_dec_ioctl_ops;
   1143}
   1144
   1145#define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_CODEC) \
   1146						&& V4L2_CTRL_DRIVER_PRIV(x))
   1147
   1148int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx)
   1149{
   1150	struct v4l2_ctrl_config cfg;
   1151	int i;
   1152
   1153	v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
   1154	if (ctx->ctrl_handler.error) {
   1155		mfc_err("v4l2_ctrl_handler_init failed\n");
   1156		return ctx->ctrl_handler.error;
   1157	}
   1158
   1159	for (i = 0; i < NUM_CTRLS; i++) {
   1160		if (IS_MFC51_PRIV(controls[i].id)) {
   1161			memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
   1162			cfg.ops = &s5p_mfc_dec_ctrl_ops;
   1163			cfg.id = controls[i].id;
   1164			cfg.min = controls[i].minimum;
   1165			cfg.max = controls[i].maximum;
   1166			cfg.def = controls[i].default_value;
   1167			cfg.name = controls[i].name;
   1168			cfg.type = controls[i].type;
   1169
   1170			cfg.step = controls[i].step;
   1171			cfg.menu_skip_mask = 0;
   1172
   1173			ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
   1174					&cfg, NULL);
   1175		} else {
   1176			ctx->ctrls[i] = v4l2_ctrl_new_std(&ctx->ctrl_handler,
   1177					&s5p_mfc_dec_ctrl_ops,
   1178					controls[i].id, controls[i].minimum,
   1179					controls[i].maximum, controls[i].step,
   1180					controls[i].default_value);
   1181		}
   1182		if (ctx->ctrl_handler.error) {
   1183			mfc_err("Adding control (%d) failed\n", i);
   1184			return ctx->ctrl_handler.error;
   1185		}
   1186		if (controls[i].is_volatile && ctx->ctrls[i])
   1187			ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
   1188	}
   1189	return 0;
   1190}
   1191
   1192void s5p_mfc_dec_ctrls_delete(struct s5p_mfc_ctx *ctx)
   1193{
   1194	int i;
   1195
   1196	v4l2_ctrl_handler_free(&ctx->ctrl_handler);
   1197	for (i = 0; i < NUM_CTRLS; i++)
   1198		ctx->ctrls[i] = NULL;
   1199}
   1200
   1201void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
   1202{
   1203	struct v4l2_format f;
   1204	f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
   1205	ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
   1206	if (IS_MFCV8_PLUS(ctx->dev))
   1207		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
   1208	else if (IS_MFCV6_PLUS(ctx->dev))
   1209		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
   1210	else
   1211		f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT;
   1212	ctx->dst_fmt = find_format(&f, MFC_FMT_RAW);
   1213	mfc_debug(2, "Default src_fmt is %p, dest_fmt is %p\n",
   1214			ctx->src_fmt, ctx->dst_fmt);
   1215}
   1216