cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ispccdc.h (4811B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * ispccdc.h
      4 *
      5 * TI OMAP3 ISP - CCDC module
      6 *
      7 * Copyright (C) 2009-2010 Nokia Corporation
      8 * Copyright (C) 2009 Texas Instruments, Inc.
      9 *
     10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
     11 *	     Sakari Ailus <sakari.ailus@iki.fi>
     12 */
     13
     14#ifndef OMAP3_ISP_CCDC_H
     15#define OMAP3_ISP_CCDC_H
     16
     17#include <linux/omap3isp.h>
     18#include <linux/workqueue.h>
     19
     20#include "ispvideo.h"
     21
     22enum ccdc_input_entity {
     23	CCDC_INPUT_NONE,
     24	CCDC_INPUT_PARALLEL,
     25	CCDC_INPUT_CSI2A,
     26	CCDC_INPUT_CCP2B,
     27	CCDC_INPUT_CSI2C
     28};
     29
     30#define CCDC_OUTPUT_MEMORY	(1 << 0)
     31#define CCDC_OUTPUT_PREVIEW	(1 << 1)
     32#define CCDC_OUTPUT_RESIZER	(1 << 2)
     33
     34#define	OMAP3ISP_CCDC_NEVENTS	16
     35
     36struct ispccdc_fpc {
     37	void *addr;
     38	dma_addr_t dma;
     39	unsigned int fpnum;
     40};
     41
     42enum ispccdc_lsc_state {
     43	LSC_STATE_STOPPED = 0,
     44	LSC_STATE_STOPPING = 1,
     45	LSC_STATE_RUNNING = 2,
     46	LSC_STATE_RECONFIG = 3,
     47};
     48
     49struct ispccdc_lsc_config_req {
     50	struct list_head list;
     51	struct omap3isp_ccdc_lsc_config config;
     52	unsigned char enable;
     53
     54	struct {
     55		void *addr;
     56		dma_addr_t dma;
     57		struct sg_table sgt;
     58	} table;
     59};
     60
     61/*
     62 * ispccdc_lsc - CCDC LSC parameters
     63 */
     64struct ispccdc_lsc {
     65	enum ispccdc_lsc_state state;
     66	struct work_struct table_work;
     67
     68	/* LSC queue of configurations */
     69	spinlock_t req_lock;
     70	struct ispccdc_lsc_config_req *request;	/* requested configuration */
     71	struct ispccdc_lsc_config_req *active;	/* active configuration */
     72	struct list_head free_queue;	/* configurations for freeing */
     73};
     74
     75#define CCDC_STOP_NOT_REQUESTED		0x00
     76#define CCDC_STOP_REQUEST		0x01
     77#define CCDC_STOP_EXECUTED		(0x02 | CCDC_STOP_REQUEST)
     78#define CCDC_STOP_CCDC_FINISHED		0x04
     79#define CCDC_STOP_LSC_FINISHED		0x08
     80#define CCDC_STOP_FINISHED		\
     81	(CCDC_STOP_EXECUTED | CCDC_STOP_CCDC_FINISHED | CCDC_STOP_LSC_FINISHED)
     82
     83#define CCDC_EVENT_VD1			0x10
     84#define CCDC_EVENT_VD0			0x20
     85#define CCDC_EVENT_LSC_DONE		0x40
     86
     87/* Sink and source CCDC pads */
     88#define CCDC_PAD_SINK			0
     89#define CCDC_PAD_SOURCE_OF		1
     90#define CCDC_PAD_SOURCE_VP		2
     91#define CCDC_PADS_NUM			3
     92
     93#define CCDC_FIELD_TOP			1
     94#define CCDC_FIELD_BOTTOM		2
     95#define CCDC_FIELD_BOTH			3
     96
     97/*
     98 * struct isp_ccdc_device - Structure for the CCDC module to store its own
     99 *			    information
    100 * @subdev: V4L2 subdevice
    101 * @pads: Sink and source media entity pads
    102 * @formats: Active video formats
    103 * @crop: Active crop rectangle on the OF source pad
    104 * @input: Active input
    105 * @output: Active outputs
    106 * @video_out: Output video node
    107 * @alaw: A-law compression enabled (1) or disabled (0)
    108 * @lpf: Low pass filter enabled (1) or disabled (0)
    109 * @obclamp: Optical-black clamp enabled (1) or disabled (0)
    110 * @fpc_en: Faulty pixels correction enabled (1) or disabled (0)
    111 * @blcomp: Black level compensation configuration
    112 * @clamp: Optical-black or digital clamp configuration
    113 * @fpc: Faulty pixels correction configuration
    114 * @lsc: Lens shading compensation configuration
    115 * @update: Bitmask of controls to update during the next interrupt
    116 * @shadow_update: Controls update in progress by userspace
    117 * @bt656: Whether the input interface uses BT.656 synchronization
    118 * @fields: The fields (CCDC_FIELD_*) stored in the current buffer
    119 * @underrun: A buffer underrun occurred and a new buffer has been queued
    120 * @state: Streaming state
    121 * @lock: Serializes shadow_update with interrupt handler
    122 * @wait: Wait queue used to stop the module
    123 * @stopping: Stopping state
    124 * @running: Is the CCDC hardware running
    125 * @ioctl_lock: Serializes ioctl calls and LSC requests freeing
    126 */
    127struct isp_ccdc_device {
    128	struct v4l2_subdev subdev;
    129	struct media_pad pads[CCDC_PADS_NUM];
    130	struct v4l2_mbus_framefmt formats[CCDC_PADS_NUM];
    131	struct v4l2_rect crop;
    132
    133	enum ccdc_input_entity input;
    134	unsigned int output;
    135	struct isp_video video_out;
    136
    137	unsigned int alaw:1,
    138		     lpf:1,
    139		     obclamp:1,
    140		     fpc_en:1;
    141	struct omap3isp_ccdc_blcomp blcomp;
    142	struct omap3isp_ccdc_bclamp clamp;
    143	struct ispccdc_fpc fpc;
    144	struct ispccdc_lsc lsc;
    145	unsigned int update;
    146	unsigned int shadow_update;
    147
    148	bool bt656;
    149	unsigned int fields;
    150
    151	unsigned int underrun:1;
    152	enum isp_pipeline_stream_state state;
    153	spinlock_t lock;
    154	wait_queue_head_t wait;
    155	unsigned int stopping;
    156	bool running;
    157	struct mutex ioctl_lock;
    158};
    159
    160struct isp_device;
    161
    162int omap3isp_ccdc_init(struct isp_device *isp);
    163void omap3isp_ccdc_cleanup(struct isp_device *isp);
    164int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
    165	struct v4l2_device *vdev);
    166void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc);
    167
    168int omap3isp_ccdc_busy(struct isp_ccdc_device *isp_ccdc);
    169int omap3isp_ccdc_isr(struct isp_ccdc_device *isp_ccdc, u32 events);
    170void omap3isp_ccdc_restore_context(struct isp_device *isp);
    171void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
    172	unsigned int *max_rate);
    173
    174#endif	/* OMAP3_ISP_CCDC_H */