cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mc44s803_priv.h (5086B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 *  Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner
      4 *
      5 *  Copyright (c) 2009 Jochen Friedrich <jochen@scram.de>
      6 */
      7
      8#ifndef MC44S803_PRIV_H
      9#define MC44S803_PRIV_H
     10
     11/* This driver is based on the information available in the datasheet
     12   http://www.freescale.com/files/rf_if/doc/data_sheet/MC44S803.pdf
     13
     14   SPI or I2C Address : 0xc0-0xc6
     15
     16   Reg.No | Function
     17   -------------------------------------------
     18       00 | Power Down
     19       01 | Reference Oszillator
     20       02 | Reference Dividers
     21       03 | Mixer and Reference Buffer
     22       04 | Reset/Serial Out
     23       05 | LO 1
     24       06 | LO 2
     25       07 | Circuit Adjust
     26       08 | Test
     27       09 | Digital Tune
     28       0A | LNA AGC
     29       0B | Data Register Address
     30       0C | Regulator Test
     31       0D | VCO Test
     32       0E | LNA Gain/Input Power
     33       0F | ID Bits
     34
     35*/
     36
     37#define MC44S803_OSC 26000000	/* 26 MHz */
     38#define MC44S803_IF1 1086000000 /* 1086 MHz */
     39#define MC44S803_IF2 36125000	/* 36.125 MHz */
     40
     41#define MC44S803_REG_POWER	0
     42#define MC44S803_REG_REFOSC	1
     43#define MC44S803_REG_REFDIV	2
     44#define MC44S803_REG_MIXER	3
     45#define MC44S803_REG_RESET	4
     46#define MC44S803_REG_LO1	5
     47#define MC44S803_REG_LO2	6
     48#define MC44S803_REG_CIRCADJ	7
     49#define MC44S803_REG_TEST	8
     50#define MC44S803_REG_DIGTUNE	9
     51#define MC44S803_REG_LNAAGC	0x0A
     52#define MC44S803_REG_DATAREG	0x0B
     53#define MC44S803_REG_REGTEST	0x0C
     54#define MC44S803_REG_VCOTEST	0x0D
     55#define MC44S803_REG_LNAGAIN	0x0E
     56#define MC44S803_REG_ID		0x0F
     57
     58/* Register definitions */
     59#define MC44S803_ADDR		0x0F
     60#define MC44S803_ADDR_S		0
     61/* REG_POWER */
     62#define MC44S803_POWER		0xFFFFF0
     63#define MC44S803_POWER_S	4
     64/* REG_REFOSC */
     65#define MC44S803_REFOSC		0x1FF0
     66#define MC44S803_REFOSC_S	4
     67#define MC44S803_OSCSEL		0x2000
     68#define MC44S803_OSCSEL_S	13
     69/* REG_REFDIV */
     70#define MC44S803_R2		0x1FF0
     71#define MC44S803_R2_S		4
     72#define MC44S803_REFBUF_EN	0x2000
     73#define MC44S803_REFBUF_EN_S	13
     74#define MC44S803_R1		0x7C000
     75#define MC44S803_R1_S		14
     76/* REG_MIXER */
     77#define MC44S803_R3		0x70
     78#define MC44S803_R3_S		4
     79#define MC44S803_MUX3		0x80
     80#define MC44S803_MUX3_S		7
     81#define MC44S803_MUX4		0x100
     82#define MC44S803_MUX4_S		8
     83#define MC44S803_OSC_SCR	0x200
     84#define MC44S803_OSC_SCR_S	9
     85#define MC44S803_TRI_STATE	0x400
     86#define MC44S803_TRI_STATE_S	10
     87#define MC44S803_BUF_GAIN	0x800
     88#define MC44S803_BUF_GAIN_S	11
     89#define MC44S803_BUF_IO		0x1000
     90#define MC44S803_BUF_IO_S	12
     91#define MC44S803_MIXER_RES	0xFE000
     92#define MC44S803_MIXER_RES_S	13
     93/* REG_RESET */
     94#define MC44S803_RS		0x10
     95#define MC44S803_RS_S		4
     96#define MC44S803_SO		0x20
     97#define MC44S803_SO_S		5
     98/* REG_LO1 */
     99#define MC44S803_LO1		0xFFF0
    100#define MC44S803_LO1_S		4
    101/* REG_LO2 */
    102#define MC44S803_LO2		0x7FFF0
    103#define MC44S803_LO2_S		4
    104/* REG_CIRCADJ */
    105#define MC44S803_G1		0x20
    106#define MC44S803_G1_S		5
    107#define MC44S803_G3		0x80
    108#define MC44S803_G3_S		7
    109#define MC44S803_CIRCADJ_RES	0x300
    110#define MC44S803_CIRCADJ_RES_S	8
    111#define MC44S803_G6		0x400
    112#define MC44S803_G6_S		10
    113#define MC44S803_G7		0x800
    114#define MC44S803_G7_S		11
    115#define MC44S803_S1		0x1000
    116#define MC44S803_S1_S		12
    117#define MC44S803_LP		0x7E000
    118#define MC44S803_LP_S		13
    119#define MC44S803_CLRF		0x80000
    120#define MC44S803_CLRF_S		19
    121#define MC44S803_CLIF		0x100000
    122#define MC44S803_CLIF_S		20
    123/* REG_TEST */
    124/* REG_DIGTUNE */
    125#define MC44S803_DA		0xF0
    126#define MC44S803_DA_S		4
    127#define MC44S803_XOD		0x300
    128#define MC44S803_XOD_S		8
    129#define MC44S803_RST		0x10000
    130#define MC44S803_RST_S		16
    131#define MC44S803_LO_REF		0x1FFF00
    132#define MC44S803_LO_REF_S	8
    133#define MC44S803_AT		0x200000
    134#define MC44S803_AT_S		21
    135#define MC44S803_MT		0x400000
    136#define MC44S803_MT_S		22
    137/* REG_LNAAGC */
    138#define MC44S803_G		0x3F0
    139#define MC44S803_G_S		4
    140#define MC44S803_AT1		0x400
    141#define MC44S803_AT1_S		10
    142#define MC44S803_AT2		0x800
    143#define MC44S803_AT2_S		11
    144#define MC44S803_HL_GR_EN	0x8000
    145#define MC44S803_HL_GR_EN_S	15
    146#define MC44S803_AGC_AN_DIG	0x10000
    147#define MC44S803_AGC_AN_DIG_S	16
    148#define MC44S803_ATTEN_EN	0x20000
    149#define MC44S803_ATTEN_EN_S	17
    150#define MC44S803_AGC_READ_EN	0x40000
    151#define MC44S803_AGC_READ_EN_S	18
    152#define MC44S803_LNA0		0x80000
    153#define MC44S803_LNA0_S		19
    154#define MC44S803_AGC_SEL	0x100000
    155#define MC44S803_AGC_SEL_S	20
    156#define MC44S803_AT0		0x200000
    157#define MC44S803_AT0_S		21
    158#define MC44S803_B		0xC00000
    159#define MC44S803_B_S		22
    160/* REG_DATAREG */
    161#define MC44S803_D		0xF0
    162#define MC44S803_D_S		4
    163/* REG_REGTEST */
    164/* REG_VCOTEST */
    165/* REG_LNAGAIN */
    166#define MC44S803_IF_PWR		0x700
    167#define MC44S803_IF_PWR_S	8
    168#define MC44S803_RF_PWR		0x3800
    169#define MC44S803_RF_PWR_S	11
    170#define MC44S803_LNA_GAIN	0xFC000
    171#define MC44S803_LNA_GAIN_S	14
    172/* REG_ID */
    173#define MC44S803_ID		0x3E00
    174#define MC44S803_ID_S		9
    175
    176/* Some macros to read/write fields */
    177
    178/* First shift, then mask */
    179#define MC44S803_REG_SM(_val, _reg)					\
    180	(((_val) << _reg##_S) & (_reg))
    181
    182/* First mask, then shift */
    183#define MC44S803_REG_MS(_val, _reg)					\
    184	(((_val) & (_reg)) >> _reg##_S)
    185
    186struct mc44s803_priv {
    187	struct mc44s803_config *cfg;
    188	struct i2c_adapter *i2c;
    189	struct dvb_frontend *fe;
    190
    191	u32 frequency;
    192};
    193
    194#endif