cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qt1010_priv.h (1805B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 *  Driver for Quantek QT1010 silicon tuner
      4 *
      5 *  Copyright (C) 2006 Antti Palosaari <crope@iki.fi>
      6 *                     Aapo Tahkola <aet@rasterburn.org>
      7 */
      8
      9#ifndef QT1010_PRIV_H
     10#define QT1010_PRIV_H
     11
     12/*
     13reg def meaning
     14=== === =======
     1500  00  ?
     1601  a0  ? operation start/stop; start=80, stop=00
     1702  00  ?
     1803  19  ?
     1904  00  ?
     2005  00  ? maybe band selection
     2106  00  ?
     2207  2b  set frequency: 32 MHz scale, n*32 MHz
     2308  0b  ?
     2409  10  ? changes every 8/24 MHz; values 1d/1c
     250a  08  set frequency: 4 MHz scale, n*4 MHz
     260b  41  ? changes every 2/2 MHz; values 45/45
     270c  e1  ?
     280d  94  ?
     290e  b6  ?
     300f  2c  ?
     3110  10  ?
     3211  f1  ? maybe device specified adjustment
     3312  11  ? maybe device specified adjustment
     3413  3f  ?
     3514  1f  ?
     3615  3f  ?
     3716  ff  ?
     3817  ff  ?
     3918  f7  ?
     4019  80  ?
     411a  d0  set frequency: 125 kHz scale, n*125 kHz
     421b  00  ?
     431c  89  ?
     441d  00  ?
     451e  00  ? looks like operation register; write cmd here, read result from 1f-26
     461f  20  ? chip initialization
     4720  e0  ? chip initialization
     4821  20  ?
     4922  d0  ?
     5023  d0  ?
     5124  d0  ?
     5225  40  ? chip initialization
     5326  08  ?
     5427  29  ?
     5528  55  ?
     5629  39  ?
     572a  13  ?
     582b  01  ?
     592c  ea  ?
     602d  00  ?
     612e  00  ? not used?
     622f  00  ? not used?
     63*/
     64
     65#define QT1010_STEP         (125 * kHz) /*
     66					 * used by Windows drivers,
     67				         * hw could be more precise but we don't
     68				         * know how to use
     69					 */
     70#define QT1010_MIN_FREQ   (48 * MHz)
     71#define QT1010_MAX_FREQ  (860 * MHz)
     72#define QT1010_OFFSET   (1246 * MHz)
     73
     74#define QT1010_WR 0
     75#define QT1010_RD 1
     76#define QT1010_M1 3
     77
     78typedef struct {
     79	u8 oper, reg, val;
     80} qt1010_i2c_oper_t;
     81
     82struct qt1010_priv {
     83	struct qt1010_config *cfg;
     84	struct i2c_adapter   *i2c;
     85
     86	u8 reg1f_init_val;
     87	u8 reg20_init_val;
     88	u8 reg25_init_val;
     89
     90	u32 frequency;
     91};
     92
     93#endif