cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cx231xx-pcb-cfg.h (5764B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3   cx231xx-pcb-cfg.h - driver for Conexant
      4		Cx23100/101/102 USB video capture devices
      5
      6   Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
      7
      8 */
      9
     10#ifndef _PCB_CONFIG_H_
     11#define _PCB_CONFIG_H_
     12
     13#include <linux/init.h>
     14#include <linux/module.h>
     15
     16/***************************************************************************
     17				* Class Information *
     18***************************************************************************/
     19#define CLASS_DEFAULT       0xFF
     20
     21enum VENDOR_REQUEST_TYPE {
     22	/* Set/Get I2C */
     23	VRT_SET_I2C0 = 0x0,
     24	VRT_SET_I2C1 = 0x1,
     25	VRT_SET_I2C2 = 0x2,
     26	VRT_GET_I2C0 = 0x4,
     27	VRT_GET_I2C1 = 0x5,
     28	VRT_GET_I2C2 = 0x6,
     29
     30	/* Set/Get GPIO */
     31	VRT_SET_GPIO = 0x8,
     32	VRT_GET_GPIO = 0x9,
     33
     34	/* Set/Get GPIE */
     35	VRT_SET_GPIE = 0xA,
     36	VRT_GET_GPIE = 0xB,
     37
     38	/* Set/Get Register Control/Status */
     39	VRT_SET_REGISTER = 0xC,
     40	VRT_GET_REGISTER = 0xD,
     41
     42	/* Get Extended Compat ID Descriptor */
     43	VRT_GET_EXTCID_DESC = 0xFF,
     44};
     45
     46enum BYTE_ENABLE_MASK {
     47	ENABLE_ONE_BYTE = 0x1,
     48	ENABLE_TWE_BYTE = 0x3,
     49	ENABLE_THREE_BYTE = 0x7,
     50	ENABLE_FOUR_BYTE = 0xF,
     51};
     52
     53#define SPEED_MASK      0x1
     54enum USB_SPEED{
     55	FULL_SPEED = 0x0,	/* 0: full speed */
     56	HIGH_SPEED = 0x1	/* 1: high speed */
     57};
     58
     59#define TS_MASK         0x6
     60enum TS_PORT{
     61	NO_TS_PORT = 0x0,	/* 2'b00: Neither port used. PCB not a Hybrid,
     62				   only offers Analog TV or Video */
     63	TS1_PORT = 0x4,		/* 2'b10: TS1 Input (Hybrid mode :
     64				Digital or External Analog/Compressed source) */
     65	TS1_TS2_PORT = 0x6,	/* 2'b11: TS1 & TS2 Inputs
     66				(Dual inputs from Digital and/or
     67				External Analog/Compressed sources) */
     68	TS1_EXT_CLOCK = 0x6,	/* 2'b11: TS1 & TS2 as selector
     69						to external clock */
     70	TS1VIP_TS2_PORT = 0x2	/* 2'b01: TS1 used as 656/VIP Output,
     71				   TS2 Input (from Compressor) */
     72};
     73
     74#define EAVP_MASK       0x8
     75enum EAV_PRESENT{
     76	NO_EXTERNAL_AV = 0x0,	/* 0: No External A/V inputs
     77						(no need for i2s block),
     78						Analog Tuner must be present */
     79	EXTERNAL_AV = 0x8	/* 1: External A/V inputs
     80						present (requires i2s blk) */
     81};
     82
     83#define ATM_MASK        0x30
     84enum AT_MODE{
     85	DIF_TUNER = 0x30,	/* 2'b11: IF Tuner (requires use of DIF) */
     86	BASEBAND_SOUND = 0x20,	/* 2'b10: Baseband Composite &
     87						Sound-IF Signals present */
     88	NO_TUNER = 0x10		/* 2'b0x: No Analog Tuner present */
     89};
     90
     91#define PWR_SEL_MASK    0x40
     92enum POWE_TYPE{
     93	SELF_POWER = 0x0,	/* 0: self power */
     94	BUS_POWER = 0x40	/* 1: bus power */
     95};
     96
     97enum USB_POWE_TYPE{
     98	USB_SELF_POWER = 0,
     99	USB_BUS_POWER
    100};
    101
    102#define BO_0_MASK       0x80
    103enum AVDEC_STATUS{
    104	AVDEC_DISABLE = 0x0,	/* 0: A/V Decoder Disabled */
    105	AVDEC_ENABLE = 0x80	/* 1: A/V Decoder Enabled */
    106};
    107
    108#define BO_1_MASK       0x100
    109
    110#define BUSPOWER_MASK   0xC4	/* for Polaris spec 0.8 */
    111#define SELFPOWER_MASK  0x86
    112
    113/***************************************************************************/
    114#define NOT_DECIDE_YET  0xFE
    115#define NOT_SUPPORTED   0xFF
    116
    117/***************************************************************************
    118				* for mod field use *
    119***************************************************************************/
    120#define MOD_DIGITAL     0x1
    121#define MOD_ANALOG      0x2
    122#define MOD_DIF         0x4
    123#define MOD_EXTERNAL    0x8
    124#define CAP_ALL_MOD     0x0f
    125
    126/***************************************************************************
    127				* source define *
    128***************************************************************************/
    129#define SOURCE_DIGITAL          0x1
    130#define SOURCE_ANALOG           0x2
    131#define SOURCE_DIF              0x4
    132#define SOURCE_EXTERNAL         0x8
    133#define SOURCE_TS_BDA			0x10
    134#define SOURCE_TS_ENCODE		0x20
    135#define SOURCE_TS_EXTERNAL	0x40
    136
    137/***************************************************************************
    138				* interface information define *
    139***************************************************************************/
    140struct INTERFACE_INFO {
    141	u8 interrupt_index;
    142	u8 ts1_index;
    143	u8 ts2_index;
    144	u8 audio_index;
    145	u8 video_index;
    146	u8 vanc_index;		/* VBI */
    147	u8 hanc_index;		/* Sliced CC */
    148	u8 ir_index;
    149};
    150
    151enum INDEX_INTERFACE_INFO{
    152	INDEX_INTERRUPT = 0x0,
    153	INDEX_TS1,
    154	INDEX_TS2,
    155	INDEX_AUDIO,
    156	INDEX_VIDEO,
    157	INDEX_VANC,
    158	INDEX_HANC,
    159	INDEX_IR,
    160};
    161
    162/***************************************************************************
    163				* configuration information define *
    164***************************************************************************/
    165struct CONFIG_INFO {
    166	u8 config_index;
    167	struct INTERFACE_INFO interface_info;
    168};
    169
    170struct pcb_config {
    171	u8 index;
    172	u8 type;		/* bus power or self power,
    173					   self power--0, bus_power--1 */
    174	u8 speed;		/* usb speed, 2.0--1, 1.1--0 */
    175	u8 mode;		/* digital , anlog, dif or external A/V */
    176	u32 ts1_source;		/* three source -- BDA,External,encode */
    177	u32 ts2_source;
    178	u32 analog_source;
    179	u8 digital_index;	/* bus-power used */
    180	u8 analog_index;	/* bus-power used */
    181	u8 dif_index;		/* bus-power used */
    182	u8 external_index;	/* bus-power used */
    183	u8 config_num;		/* current config num, 0,1,2,
    184						   for self-power, always 0 */
    185	struct CONFIG_INFO hs_config_info[3];
    186	struct CONFIG_INFO fs_config_info[3];
    187};
    188
    189enum INDEX_PCB_CONFIG{
    190	INDEX_SELFPOWER_DIGITAL_ONLY = 0x0,
    191	INDEX_SELFPOWER_DUAL_DIGITAL,
    192	INDEX_SELFPOWER_ANALOG_ONLY,
    193	INDEX_SELFPOWER_DUAL,
    194	INDEX_SELFPOWER_TRIPLE,
    195	INDEX_SELFPOWER_COMPRESSOR,
    196	INDEX_BUSPOWER_DIGITAL_ONLY,
    197	INDEX_BUSPOWER_ANALOG_ONLY,
    198	INDEX_BUSPOWER_DIF_ONLY,
    199	INDEX_BUSPOWER_EXTERNAL_ONLY,
    200	INDEX_BUSPOWER_EXTERNAL_ANALOG,
    201	INDEX_BUSPOWER_EXTERNAL_DIF,
    202	INDEX_BUSPOWER_EXTERNAL_DIGITAL,
    203	INDEX_BUSPOWER_DIGITAL_ANALOG,
    204	INDEX_BUSPOWER_DIGITAL_DIF,
    205	INDEX_BUSPOWER_DIGITAL_ANALOG_EXTERNAL,
    206	INDEX_BUSPOWER_DIGITAL_DIF_EXTERNAL,
    207};
    208
    209/***************************************************************************/
    210struct cx231xx;
    211
    212int initialize_cx231xx(struct cx231xx *p_dev);
    213
    214#endif