cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

stk1135.h (1646B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * STK1135 registers
      4 *
      5 * Copyright (c) 2013 Ondrej Zary
      6 */
      7
      8#define STK1135_REG_GCTRL	0x000	/* GPIO control */
      9#define STK1135_REG_ICTRL	0x004	/* Interrupt control */
     10#define STK1135_REG_IDATA	0x008	/* Interrupt data */
     11#define STK1135_REG_RMCTL	0x00c	/* Remote wakeup control */
     12#define STK1135_REG_POSVA	0x010	/* Power-on strapping data */
     13
     14#define STK1135_REG_SENSO	0x018	/* Sensor select options */
     15#define STK1135_REG_PLLFD	0x01c	/* PLL frequency divider */
     16
     17#define STK1135_REG_SCTRL	0x100	/* Sensor control register */
     18#define STK1135_REG_DCTRL	0x104	/* Decimation control register */
     19#define STK1135_REG_CISPO	0x110	/* Capture image starting position */
     20#define STK1135_REG_CIEPO	0x114	/* Capture image ending position */
     21#define STK1135_REG_TCTRL	0x120	/* Test data control */
     22
     23#define STK1135_REG_SICTL	0x200	/* Serial interface control register */
     24#define STK1135_REG_SBUSW	0x204	/* Serial bus write */
     25#define STK1135_REG_SBUSR	0x208	/* Serial bus read */
     26#define STK1135_REG_SCSI	0x20c	/* Software control serial interface */
     27#define STK1135_REG_GSBWP	0x210	/* General serial bus write port */
     28#define STK1135_REG_GSBRP	0x214	/* General serial bus read port */
     29#define STK1135_REG_ASIC	0x2fc	/* Alternate serial interface control */
     30
     31#define STK1135_REG_TMGEN	0x300	/* Timing generator */
     32#define STK1135_REG_TCP1	0x350	/* Timing control parameter 1 */
     33
     34struct stk1135_pkt_header {
     35	u8 flags;
     36	u8 seq;
     37	__le16 gpio;
     38} __packed;
     39
     40#define STK1135_HDR_FRAME_START	(1 << 7)
     41#define STK1135_HDR_ODD		(1 << 6)
     42#define STK1135_HDR_I2C_VBLANK	(1 << 5)
     43
     44#define STK1135_HDR_SEQ_MASK	0x3f