cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tv8532.c (9374B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Quickcam cameras initialization data
      4 *
      5 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
      6 */
      7#define MODULE_NAME "tv8532"
      8
      9#include "gspca.h"
     10
     11MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
     12MODULE_DESCRIPTION("TV8532 USB Camera Driver");
     13MODULE_LICENSE("GPL");
     14
     15/* specific webcam descriptor */
     16struct sd {
     17	struct gspca_dev gspca_dev;	/* !! must be the first item */
     18
     19	__u8 packet;
     20};
     21
     22static const struct v4l2_pix_format sif_mode[] = {
     23	{176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
     24		.bytesperline = 176,
     25		.sizeimage = 176 * 144,
     26		.colorspace = V4L2_COLORSPACE_SRGB,
     27		.priv = 1},
     28	{352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
     29		.bytesperline = 352,
     30		.sizeimage = 352 * 288,
     31		.colorspace = V4L2_COLORSPACE_SRGB,
     32		.priv = 0},
     33};
     34
     35/* TV-8532A (ICM532A) registers (LE) */
     36#define R00_PART_CONTROL 0x00
     37#define		LATENT_CHANGE	0x80
     38#define		EXPO_CHANGE	0x04
     39#define R01_TIMING_CONTROL_LOW 0x01
     40#define		CMD_EEprom_Open 0x30
     41#define		CMD_EEprom_Close 0x29
     42#define R03_TABLE_ADDR 0x03
     43#define R04_WTRAM_DATA_L 0x04
     44#define R05_WTRAM_DATA_M 0x05
     45#define R06_WTRAM_DATA_H 0x06
     46#define R07_TABLE_LEN	0x07
     47#define R08_RAM_WRITE_ACTION 0x08
     48#define R0C_AD_WIDTHL	0x0c
     49#define R0D_AD_WIDTHH	0x0d
     50#define R0E_AD_HEIGHTL	0x0e
     51#define R0F_AD_HEIGHTH	0x0f
     52#define R10_AD_COL_BEGINL 0x10
     53#define R11_AD_COL_BEGINH 0x11
     54#define		MIRROR		0x04	/* [10] */
     55#define R14_AD_ROW_BEGINL 0x14
     56#define R15_AD_ROWBEGINH  0x15
     57#define R1C_AD_EXPOSE_TIMEL 0x1c
     58#define R20_GAIN_G1L	0x20
     59#define R21_GAIN_G1H	0x21
     60#define R22_GAIN_RL	0x22
     61#define R23_GAIN_RH	0x23
     62#define R24_GAIN_BL	0x24
     63#define R25_GAIN_BH	0x25
     64#define R26_GAIN_G2L	0x26
     65#define R27_GAIN_G2H	0x27
     66#define R28_QUANT	0x28
     67#define R29_LINE	0x29
     68#define R2C_POLARITY	0x2c
     69#define R2D_POINT	0x2d
     70#define R2E_POINTH	0x2e
     71#define R2F_POINTB	0x2f
     72#define R30_POINTBH	0x30
     73#define R31_UPD		0x31
     74#define R2A_HIGH_BUDGET 0x2a
     75#define R2B_LOW_BUDGET	0x2b
     76#define R34_VID		0x34
     77#define R35_VIDH	0x35
     78#define R36_PID		0x36
     79#define R37_PIDH	0x37
     80#define R39_Test1	0x39		/* GPIO */
     81#define R3B_Test3	0x3b		/* GPIO */
     82#define R83_AD_IDH	0x83
     83#define R91_AD_SLOPEREG 0x91
     84#define R94_AD_BITCONTROL 0x94
     85
     86static const u8 eeprom_data[][3] = {
     87/*	dataH dataM dataL */
     88	{0x01, 0x00, 0x01},
     89	{0x01, 0x80, 0x11},
     90	{0x05, 0x00, 0x14},
     91	{0x05, 0x00, 0x1c},
     92	{0x0d, 0x00, 0x1e},
     93	{0x05, 0x00, 0x1f},
     94	{0x05, 0x05, 0x19},
     95	{0x05, 0x01, 0x1b},
     96	{0x05, 0x09, 0x1e},
     97	{0x0d, 0x89, 0x2e},
     98	{0x05, 0x89, 0x2f},
     99	{0x05, 0x0d, 0xd9},
    100	{0x05, 0x09, 0xf1},
    101};
    102
    103
    104/* write 1 byte */
    105static void reg_w1(struct gspca_dev *gspca_dev,
    106		  __u16 index, __u8 value)
    107{
    108	gspca_dev->usb_buf[0] = value;
    109	usb_control_msg(gspca_dev->dev,
    110			usb_sndctrlpipe(gspca_dev->dev, 0),
    111			0x02,
    112			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
    113			0,	/* value */
    114			index, gspca_dev->usb_buf, 1, 500);
    115}
    116
    117/* write 2 bytes */
    118static void reg_w2(struct gspca_dev *gspca_dev,
    119		  u16 index, u16 value)
    120{
    121	gspca_dev->usb_buf[0] = value;
    122	gspca_dev->usb_buf[1] = value >> 8;
    123	usb_control_msg(gspca_dev->dev,
    124			usb_sndctrlpipe(gspca_dev->dev, 0),
    125			0x02,
    126			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
    127			0,	/* value */
    128			index, gspca_dev->usb_buf, 2, 500);
    129}
    130
    131static void tv_8532WriteEEprom(struct gspca_dev *gspca_dev)
    132{
    133	int i;
    134
    135	reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Open);
    136	for (i = 0; i < ARRAY_SIZE(eeprom_data); i++) {
    137		reg_w1(gspca_dev, R03_TABLE_ADDR, i);
    138		reg_w1(gspca_dev, R04_WTRAM_DATA_L, eeprom_data[i][2]);
    139		reg_w1(gspca_dev, R05_WTRAM_DATA_M, eeprom_data[i][1]);
    140		reg_w1(gspca_dev, R06_WTRAM_DATA_H, eeprom_data[i][0]);
    141		reg_w1(gspca_dev, R08_RAM_WRITE_ACTION, 0);
    142	}
    143	reg_w1(gspca_dev, R07_TABLE_LEN, i);
    144	reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Close);
    145}
    146
    147/* this function is called at probe time */
    148static int sd_config(struct gspca_dev *gspca_dev,
    149		     const struct usb_device_id *id)
    150{
    151	struct cam *cam;
    152
    153	cam = &gspca_dev->cam;
    154	cam->cam_mode = sif_mode;
    155	cam->nmodes = ARRAY_SIZE(sif_mode);
    156
    157	return 0;
    158}
    159
    160static void tv_8532_setReg(struct gspca_dev *gspca_dev)
    161{
    162	reg_w1(gspca_dev, R3B_Test3, 0x0a);	/* Test0Sel = 10 */
    163	/******************************************************/
    164	reg_w1(gspca_dev, R0E_AD_HEIGHTL, 0x90);
    165	reg_w1(gspca_dev, R0F_AD_HEIGHTH, 0x01);
    166	reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, 0x018f);
    167	reg_w1(gspca_dev, R10_AD_COL_BEGINL, 0x44);
    168						/* begin active line */
    169	reg_w1(gspca_dev, R11_AD_COL_BEGINH, 0x00);
    170						/* mirror and digital gain */
    171	reg_w1(gspca_dev, R14_AD_ROW_BEGINL, 0x0a);
    172
    173	reg_w1(gspca_dev, R94_AD_BITCONTROL, 0x02);
    174	reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x00);
    175	reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
    176						/* = 0x84 */
    177}
    178
    179/* this function is called at probe and resume time */
    180static int sd_init(struct gspca_dev *gspca_dev)
    181{
    182	tv_8532WriteEEprom(gspca_dev);
    183
    184	return 0;
    185}
    186
    187static void setexposure(struct gspca_dev *gspca_dev, s32 val)
    188{
    189	reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, val);
    190	reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
    191						/* 0x84 */
    192}
    193
    194static void setgain(struct gspca_dev *gspca_dev, s32 val)
    195{
    196	reg_w2(gspca_dev, R20_GAIN_G1L, val);
    197	reg_w2(gspca_dev, R22_GAIN_RL, val);
    198	reg_w2(gspca_dev, R24_GAIN_BL, val);
    199	reg_w2(gspca_dev, R26_GAIN_G2L, val);
    200}
    201
    202/* -- start the camera -- */
    203static int sd_start(struct gspca_dev *gspca_dev)
    204{
    205	struct sd *sd = (struct sd *) gspca_dev;
    206
    207	reg_w1(gspca_dev, R0C_AD_WIDTHL, 0xe8);		/* 0x20; 0x0c */
    208	reg_w1(gspca_dev, R0D_AD_WIDTHH, 0x03);
    209
    210	/************************************************/
    211	reg_w1(gspca_dev, R28_QUANT, 0x90);
    212					/* 0x72 compressed mode 0x28 */
    213	if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
    214		/* 176x144 */
    215		reg_w1(gspca_dev, R29_LINE, 0x41);
    216					/* CIF - 2 lines/packet */
    217	} else {
    218		/* 352x288 */
    219		reg_w1(gspca_dev, R29_LINE, 0x81);
    220					/* CIF - 2 lines/packet */
    221	}
    222	/************************************************/
    223	reg_w1(gspca_dev, R2C_POLARITY, 0x10);		/* slow clock */
    224	reg_w1(gspca_dev, R2D_POINT, 0x14);
    225	reg_w1(gspca_dev, R2E_POINTH, 0x01);
    226	reg_w1(gspca_dev, R2F_POINTB, 0x12);
    227	reg_w1(gspca_dev, R30_POINTBH, 0x01);
    228
    229	tv_8532_setReg(gspca_dev);
    230
    231	/************************************************/
    232	reg_w1(gspca_dev, R31_UPD, 0x01);	/* update registers */
    233	msleep(200);
    234	reg_w1(gspca_dev, R31_UPD, 0x00);	/* end update */
    235
    236	gspca_dev->empty_packet = 0;		/* check the empty packets */
    237	sd->packet = 0;				/* ignore the first packets */
    238
    239	return 0;
    240}
    241
    242static void sd_stopN(struct gspca_dev *gspca_dev)
    243{
    244	reg_w1(gspca_dev, R3B_Test3, 0x0b);	/* Test0Sel = 11 = GPIO */
    245}
    246
    247static void sd_pkt_scan(struct gspca_dev *gspca_dev,
    248			u8 *data,			/* isoc packet */
    249			int len)			/* iso packet length */
    250{
    251	struct sd *sd = (struct sd *) gspca_dev;
    252	int packet_type0, packet_type1;
    253
    254	packet_type0 = packet_type1 = INTER_PACKET;
    255	if (gspca_dev->empty_packet) {
    256		gspca_dev->empty_packet = 0;
    257		sd->packet = gspca_dev->pixfmt.height / 2;
    258		packet_type0 = FIRST_PACKET;
    259	} else if (sd->packet == 0)
    260		return;			/* 2 more lines in 352x288 ! */
    261	sd->packet--;
    262	if (sd->packet == 0)
    263		packet_type1 = LAST_PACKET;
    264
    265	/* each packet contains:
    266	 * - header 2 bytes
    267	 * - RGRG line
    268	 * - 4 bytes
    269	 * - GBGB line
    270	 * - 4 bytes
    271	 */
    272	gspca_frame_add(gspca_dev, packet_type0,
    273			data + 2, gspca_dev->pixfmt.width);
    274	gspca_frame_add(gspca_dev, packet_type1,
    275			data + gspca_dev->pixfmt.width + 5,
    276			gspca_dev->pixfmt.width);
    277}
    278
    279static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
    280{
    281	struct gspca_dev *gspca_dev =
    282		container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
    283
    284	gspca_dev->usb_err = 0;
    285
    286	if (!gspca_dev->streaming)
    287		return 0;
    288
    289	switch (ctrl->id) {
    290	case V4L2_CID_EXPOSURE:
    291		setexposure(gspca_dev, ctrl->val);
    292		break;
    293	case V4L2_CID_GAIN:
    294		setgain(gspca_dev, ctrl->val);
    295		break;
    296	}
    297	return gspca_dev->usb_err;
    298}
    299
    300static const struct v4l2_ctrl_ops sd_ctrl_ops = {
    301	.s_ctrl = sd_s_ctrl,
    302};
    303
    304static int sd_init_controls(struct gspca_dev *gspca_dev)
    305{
    306	struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
    307
    308	gspca_dev->vdev.ctrl_handler = hdl;
    309	v4l2_ctrl_handler_init(hdl, 2);
    310	v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
    311			V4L2_CID_EXPOSURE, 0, 0x18f, 1, 0x18f);
    312	v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
    313			V4L2_CID_GAIN, 0, 0x7ff, 1, 0x100);
    314
    315	if (hdl->error) {
    316		pr_err("Could not initialize controls\n");
    317		return hdl->error;
    318	}
    319	return 0;
    320}
    321
    322/* sub-driver description */
    323static const struct sd_desc sd_desc = {
    324	.name = MODULE_NAME,
    325	.config = sd_config,
    326	.init = sd_init,
    327	.init_controls = sd_init_controls,
    328	.start = sd_start,
    329	.stopN = sd_stopN,
    330	.pkt_scan = sd_pkt_scan,
    331};
    332
    333/* -- module initialisation -- */
    334static const struct usb_device_id device_table[] = {
    335	{USB_DEVICE(0x046d, 0x0920)},
    336	{USB_DEVICE(0x046d, 0x0921)},
    337	{USB_DEVICE(0x0545, 0x808b)},
    338	{USB_DEVICE(0x0545, 0x8333)},
    339	{USB_DEVICE(0x0923, 0x010f)},
    340	{}
    341};
    342
    343MODULE_DEVICE_TABLE(usb, device_table);
    344
    345/* -- device connect -- */
    346static int sd_probe(struct usb_interface *intf,
    347		    const struct usb_device_id *id)
    348{
    349	return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
    350			       THIS_MODULE);
    351}
    352
    353static struct usb_driver sd_driver = {
    354	.name = MODULE_NAME,
    355	.id_table = device_table,
    356	.probe = sd_probe,
    357	.disconnect = gspca_disconnect,
    358#ifdef CONFIG_PM
    359	.suspend = gspca_suspend,
    360	.resume = gspca_resume,
    361	.reset_resume = gspca_resume,
    362#endif
    363};
    364
    365module_usb_driver(sd_driver);