cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tps65912-core.c (4805B)


      1/*
      2 * Core functions for TI TPS65912x PMICs
      3 *
      4 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
      5 *	Andrew F. Davis <afd@ti.com>
      6 *
      7 * This program is free software; you can redistribute it and/or
      8 * modify it under the terms of the GNU General Public License version 2 as
      9 * published by the Free Software Foundation.
     10 *
     11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     12 * kind, whether expressed or implied; without even the implied warranty
     13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14 * GNU General Public License version 2 for more details.
     15 *
     16 * Based on the TPS65218 driver and the previous TPS65912 driver by
     17 * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
     18 */
     19
     20#include <linux/interrupt.h>
     21#include <linux/mfd/core.h>
     22#include <linux/module.h>
     23
     24#include <linux/mfd/tps65912.h>
     25
     26static const struct mfd_cell tps65912_cells[] = {
     27	{ .name = "tps65912-regulator", },
     28	{ .name = "tps65912-gpio", },
     29};
     30
     31static const struct regmap_irq tps65912_irqs[] = {
     32	/* INT_STS IRQs */
     33	REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_F, 0, TPS65912_INT_STS_PWRHOLD_F),
     34	REGMAP_IRQ_REG(TPS65912_IRQ_VMON, 0, TPS65912_INT_STS_VMON),
     35	REGMAP_IRQ_REG(TPS65912_IRQ_PWRON, 0, TPS65912_INT_STS_PWRON),
     36	REGMAP_IRQ_REG(TPS65912_IRQ_PWRON_LP, 0, TPS65912_INT_STS_PWRON_LP),
     37	REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_R, 0, TPS65912_INT_STS_PWRHOLD_R),
     38	REGMAP_IRQ_REG(TPS65912_IRQ_HOTDIE, 0, TPS65912_INT_STS_HOTDIE),
     39	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_R, 0, TPS65912_INT_STS_GPIO1_R),
     40	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_F, 0, TPS65912_INT_STS_GPIO1_F),
     41	/* INT_STS2 IRQs */
     42	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_R, 1, TPS65912_INT_STS2_GPIO2_R),
     43	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_F, 1, TPS65912_INT_STS2_GPIO2_F),
     44	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_R, 1, TPS65912_INT_STS2_GPIO3_R),
     45	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_F, 1, TPS65912_INT_STS2_GPIO3_F),
     46	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_R, 1, TPS65912_INT_STS2_GPIO4_R),
     47	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_F, 1, TPS65912_INT_STS2_GPIO4_F),
     48	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_R, 1, TPS65912_INT_STS2_GPIO5_R),
     49	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_F, 1, TPS65912_INT_STS2_GPIO5_F),
     50	/* INT_STS3 IRQs */
     51	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC1, 2, TPS65912_INT_STS3_PGOOD_DCDC1),
     52	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC2, 2, TPS65912_INT_STS3_PGOOD_DCDC2),
     53	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC3, 2, TPS65912_INT_STS3_PGOOD_DCDC3),
     54	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC4, 2, TPS65912_INT_STS3_PGOOD_DCDC4),
     55	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO1, 2, TPS65912_INT_STS3_PGOOD_LDO1),
     56	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO2, 2, TPS65912_INT_STS3_PGOOD_LDO2),
     57	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO3, 2, TPS65912_INT_STS3_PGOOD_LDO3),
     58	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO4, 2, TPS65912_INT_STS3_PGOOD_LDO4),
     59	/* INT_STS4 IRQs */
     60	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO5, 3, TPS65912_INT_STS4_PGOOD_LDO5),
     61	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO6, 3, TPS65912_INT_STS4_PGOOD_LDO6),
     62	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO7, 3, TPS65912_INT_STS4_PGOOD_LDO7),
     63	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO8, 3, TPS65912_INT_STS4_PGOOD_LDO8),
     64	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO9, 3, TPS65912_INT_STS4_PGOOD_LDO9),
     65	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10),
     66};
     67
     68static struct regmap_irq_chip tps65912_irq_chip = {
     69	.name = "tps65912",
     70	.irqs = tps65912_irqs,
     71	.num_irqs = ARRAY_SIZE(tps65912_irqs),
     72	.num_regs = 4,
     73	.irq_reg_stride = 2,
     74	.mask_base = TPS65912_INT_MSK,
     75	.status_base = TPS65912_INT_STS,
     76	.ack_base = TPS65912_INT_STS,
     77	.init_ack_masked = true,
     78};
     79
     80static const struct regmap_range tps65912_yes_ranges[] = {
     81	regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5),
     82};
     83
     84static const struct regmap_access_table tps65912_volatile_table = {
     85	.yes_ranges = tps65912_yes_ranges,
     86	.n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges),
     87};
     88
     89const struct regmap_config tps65912_regmap_config = {
     90	.reg_bits = 8,
     91	.val_bits = 8,
     92	.cache_type = REGCACHE_RBTREE,
     93	.volatile_table = &tps65912_volatile_table,
     94};
     95EXPORT_SYMBOL_GPL(tps65912_regmap_config);
     96
     97int tps65912_device_init(struct tps65912 *tps)
     98{
     99	int ret;
    100
    101	ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0,
    102				  &tps65912_irq_chip, &tps->irq_data);
    103	if (ret)
    104		return ret;
    105
    106	ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells,
    107			      ARRAY_SIZE(tps65912_cells), NULL, 0,
    108			      regmap_irq_get_domain(tps->irq_data));
    109	if (ret) {
    110		regmap_del_irq_chip(tps->irq, tps->irq_data);
    111		return ret;
    112	}
    113
    114	return 0;
    115}
    116EXPORT_SYMBOL_GPL(tps65912_device_init);
    117
    118void tps65912_device_exit(struct tps65912 *tps)
    119{
    120	regmap_del_irq_chip(tps->irq, tps->irq_data);
    121}
    122EXPORT_SYMBOL_GPL(tps65912_device_exit);
    123
    124MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
    125MODULE_DESCRIPTION("TPS65912x MFD Driver");
    126MODULE_LICENSE("GPL v2");