cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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digsy_mtc_eeprom.c (2670B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * EEPROMs access control driver for display configuration EEPROMs
      4 * on DigsyMTC board.
      5 *
      6 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
      7 *
      8 * FIXME: this driver is used on a device-tree probed platform: it
      9 * should be defined as a bit-banged SPI device and probed from the device
     10 * tree and not like this with static grabbing of a few numbered GPIO
     11 * lines at random.
     12 *
     13 * Add proper SPI and EEPROM in arch/powerpc/boot/dts/digsy_mtc.dts
     14 * and delete this driver.
     15 */
     16
     17#include <linux/gpio.h>
     18#include <linux/gpio/machine.h>
     19#include <linux/init.h>
     20#include <linux/platform_device.h>
     21#include <linux/spi/spi.h>
     22#include <linux/spi/spi_gpio.h>
     23#include <linux/eeprom_93xx46.h>
     24
     25#define GPIO_EEPROM_CLK		216
     26#define GPIO_EEPROM_CS		210
     27#define GPIO_EEPROM_DI		217
     28#define GPIO_EEPROM_DO		249
     29#define GPIO_EEPROM_OE		255
     30#define EE_SPI_BUS_NUM	1
     31
     32static void digsy_mtc_op_prepare(void *p)
     33{
     34	/* enable */
     35	gpio_set_value(GPIO_EEPROM_OE, 0);
     36}
     37
     38static void digsy_mtc_op_finish(void *p)
     39{
     40	/* disable */
     41	gpio_set_value(GPIO_EEPROM_OE, 1);
     42}
     43
     44struct eeprom_93xx46_platform_data digsy_mtc_eeprom_data = {
     45	.flags		= EE_ADDR8,
     46	.prepare	= digsy_mtc_op_prepare,
     47	.finish		= digsy_mtc_op_finish,
     48};
     49
     50static struct spi_gpio_platform_data eeprom_spi_gpio_data = {
     51	.num_chipselect	= 1,
     52};
     53
     54static struct platform_device digsy_mtc_eeprom = {
     55	.name	= "spi_gpio",
     56	.id	= EE_SPI_BUS_NUM,
     57	.dev	= {
     58		.platform_data	= &eeprom_spi_gpio_data,
     59	},
     60};
     61
     62static struct gpiod_lookup_table eeprom_spi_gpiod_table = {
     63	.dev_id         = "spi_gpio",
     64	.table          = {
     65		GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_CLK,
     66			    "sck", GPIO_ACTIVE_HIGH),
     67		GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_DI,
     68			    "mosi", GPIO_ACTIVE_HIGH),
     69		GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_DO,
     70			    "miso", GPIO_ACTIVE_HIGH),
     71		GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_CS,
     72			    "cs", GPIO_ACTIVE_HIGH),
     73		{ },
     74	},
     75};
     76
     77static struct spi_board_info digsy_mtc_eeprom_info[] __initdata = {
     78	{
     79		.modalias		= "93xx46",
     80		.max_speed_hz		= 1000000,
     81		.bus_num		= EE_SPI_BUS_NUM,
     82		.chip_select		= 0,
     83		.mode			= SPI_MODE_0,
     84		.platform_data		= &digsy_mtc_eeprom_data,
     85	},
     86};
     87
     88static int __init digsy_mtc_eeprom_devices_init(void)
     89{
     90	int ret;
     91
     92	ret = gpio_request_one(GPIO_EEPROM_OE, GPIOF_OUT_INIT_HIGH,
     93				"93xx46 EEPROMs OE");
     94	if (ret) {
     95		pr_err("can't request gpio %d\n", GPIO_EEPROM_OE);
     96		return ret;
     97	}
     98	gpiod_add_lookup_table(&eeprom_spi_gpiod_table);
     99	spi_register_board_info(digsy_mtc_eeprom_info,
    100				ARRAY_SIZE(digsy_mtc_eeprom_info));
    101	return platform_device_register(&digsy_mtc_eeprom);
    102}
    103device_initcall(digsy_mtc_eeprom_devices_init);