cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gaudi_packets.h (4304B)


      1/* SPDX-License-Identifier: GPL-2.0
      2 *
      3 * Copyright 2017-2020 HabanaLabs, Ltd.
      4 * All Rights Reserved.
      5 *
      6 */
      7
      8#ifndef GAUDI_PACKETS_H
      9#define GAUDI_PACKETS_H
     10
     11#include <linux/types.h>
     12
     13#define PACKET_HEADER_PACKET_ID_SHIFT		56
     14#define PACKET_HEADER_PACKET_ID_MASK		0x1F00000000000000ull
     15
     16enum packet_id {
     17	PACKET_WREG_32 = 0x1,
     18	PACKET_WREG_BULK = 0x2,
     19	PACKET_MSG_LONG = 0x3,
     20	PACKET_MSG_SHORT = 0x4,
     21	PACKET_CP_DMA = 0x5,
     22	PACKET_REPEAT = 0x6,
     23	PACKET_MSG_PROT = 0x7,
     24	PACKET_FENCE = 0x8,
     25	PACKET_LIN_DMA = 0x9,
     26	PACKET_NOP = 0xA,
     27	PACKET_STOP = 0xB,
     28	PACKET_ARB_POINT = 0xC,
     29	PACKET_WAIT = 0xD,
     30	PACKET_LOAD_AND_EXE = 0xF,
     31	MAX_PACKET_ID = (PACKET_HEADER_PACKET_ID_MASK >>
     32				PACKET_HEADER_PACKET_ID_SHIFT) + 1
     33};
     34
     35#define GAUDI_PKT_CTL_OPCODE_SHIFT	24
     36#define GAUDI_PKT_CTL_OPCODE_MASK	0x1F000000
     37
     38#define GAUDI_PKT_CTL_EB_SHIFT		29
     39#define GAUDI_PKT_CTL_EB_MASK		0x20000000
     40
     41#define GAUDI_PKT_CTL_RB_SHIFT		30
     42#define GAUDI_PKT_CTL_RB_MASK		0x40000000
     43
     44#define GAUDI_PKT_CTL_MB_SHIFT		31
     45#define GAUDI_PKT_CTL_MB_MASK		0x80000000
     46
     47/* All packets have, at least, an 8-byte header, which contains
     48 * the packet type. The kernel driver uses the packet header for packet
     49 * validation and to perform any necessary required preparation before
     50 * sending them off to the hardware.
     51 */
     52struct gaudi_packet {
     53	__le64 header;
     54	/* The rest of the packet data follows. Use the corresponding
     55	 * packet_XXX struct to deference the data, based on packet type
     56	 */
     57	u8 contents[];
     58};
     59
     60struct packet_nop {
     61	__le32 reserved;
     62	__le32 ctl;
     63};
     64
     65struct packet_stop {
     66	__le32 reserved;
     67	__le32 ctl;
     68};
     69
     70struct packet_wreg32 {
     71	__le32 value;
     72	__le32 ctl;
     73};
     74
     75struct packet_wreg_bulk {
     76	__le32 size64;
     77	__le32 ctl;
     78	__le64 values[]; /* data starts here */
     79};
     80
     81#define GAUDI_PKT_LONG_CTL_OP_SHIFT		20
     82#define GAUDI_PKT_LONG_CTL_OP_MASK		0x00300000
     83
     84struct packet_msg_long {
     85	__le32 value;
     86	__le32 ctl;
     87	__le64 addr;
     88};
     89
     90#define GAUDI_PKT_SHORT_VAL_SOB_SYNC_VAL_SHIFT	0
     91#define GAUDI_PKT_SHORT_VAL_SOB_SYNC_VAL_MASK	0x00007FFF
     92
     93#define GAUDI_PKT_SHORT_VAL_SOB_MOD_SHIFT	31
     94#define GAUDI_PKT_SHORT_VAL_SOB_MOD_MASK	0x80000000
     95
     96#define GAUDI_PKT_SHORT_VAL_MON_SYNC_GID_SHIFT	0
     97#define GAUDI_PKT_SHORT_VAL_MON_SYNC_GID_MASK	0x000000FF
     98
     99#define GAUDI_PKT_SHORT_VAL_MON_MASK_SHIFT	8
    100#define GAUDI_PKT_SHORT_VAL_MON_MASK_MASK	0x0000FF00
    101
    102#define GAUDI_PKT_SHORT_VAL_MON_MODE_SHIFT	16
    103#define GAUDI_PKT_SHORT_VAL_MON_MODE_MASK	0x00010000
    104
    105#define GAUDI_PKT_SHORT_VAL_MON_SYNC_VAL_SHIFT	17
    106#define GAUDI_PKT_SHORT_VAL_MON_SYNC_VAL_MASK	0xFFFE0000
    107
    108#define GAUDI_PKT_SHORT_CTL_ADDR_SHIFT		0
    109#define GAUDI_PKT_SHORT_CTL_ADDR_MASK		0x0000FFFF
    110
    111#define GAUDI_PKT_SHORT_CTL_OP_SHIFT		20
    112#define GAUDI_PKT_SHORT_CTL_OP_MASK		0x00300000
    113
    114#define GAUDI_PKT_SHORT_CTL_BASE_SHIFT		22
    115#define GAUDI_PKT_SHORT_CTL_BASE_MASK		0x00C00000
    116
    117struct packet_msg_short {
    118	__le32 value;
    119	__le32 ctl;
    120};
    121
    122struct packet_msg_prot {
    123	__le32 value;
    124	__le32 ctl;
    125	__le64 addr;
    126};
    127
    128#define GAUDI_PKT_FENCE_CFG_DEC_VAL_SHIFT	0
    129#define GAUDI_PKT_FENCE_CFG_DEC_VAL_MASK	0x0000000F
    130
    131#define GAUDI_PKT_FENCE_CFG_TARGET_VAL_SHIFT	16
    132#define GAUDI_PKT_FENCE_CFG_TARGET_VAL_MASK	0x00FF0000
    133
    134#define GAUDI_PKT_FENCE_CFG_ID_SHIFT		30
    135#define GAUDI_PKT_FENCE_CFG_ID_MASK		0xC0000000
    136
    137#define GAUDI_PKT_FENCE_CTL_PRED_SHIFT		0
    138#define GAUDI_PKT_FENCE_CTL_PRED_MASK		0x0000001F
    139
    140struct packet_fence {
    141	__le32 cfg;
    142	__le32 ctl;
    143};
    144
    145#define GAUDI_PKT_LIN_DMA_CTL_WRCOMP_EN_SHIFT	0
    146#define GAUDI_PKT_LIN_DMA_CTL_WRCOMP_EN_MASK	0x00000001
    147
    148#define GAUDI_PKT_LIN_DMA_CTL_LIN_SHIFT		3
    149#define GAUDI_PKT_LIN_DMA_CTL_LIN_MASK		0x00000008
    150
    151#define GAUDI_PKT_LIN_DMA_CTL_MEMSET_SHIFT	4
    152#define GAUDI_PKT_LIN_DMA_CTL_MEMSET_MASK	0x00000010
    153
    154#define GAUDI_PKT_LIN_DMA_DST_ADDR_SHIFT	0
    155#define GAUDI_PKT_LIN_DMA_DST_ADDR_MASK		0x00FFFFFFFFFFFFFFull
    156
    157struct packet_lin_dma {
    158	__le32 tsize;
    159	__le32 ctl;
    160	__le64 src_addr;
    161	__le64 dst_addr;
    162};
    163
    164struct packet_arb_point {
    165	__le32 cfg;
    166	__le32 ctl;
    167};
    168
    169struct packet_repeat {
    170	__le32 cfg;
    171	__le32 ctl;
    172};
    173
    174struct packet_wait {
    175	__le32 cfg;
    176	__le32 ctl;
    177};
    178
    179#define GAUDI_PKT_LOAD_AND_EXE_CFG_DST_SHIFT	0
    180#define GAUDI_PKT_LOAD_AND_EXE_CFG_DST_MASK	0x00000001
    181
    182struct packet_load_and_exe {
    183	__le32 cfg;
    184	__le32 ctl;
    185	__le64 src_addr;
    186};
    187
    188struct packet_cp_dma {
    189	__le32 tsize;
    190	__le32 ctl;
    191	__le64 src_addr;
    192};
    193
    194#endif /* GAUDI_PACKETS_H */