cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mmu_regs.h (1663B)


      1/* SPDX-License-Identifier: GPL-2.0
      2 *
      3 * Copyright 2016-2018 HabanaLabs, Ltd.
      4 * All Rights Reserved.
      5 *
      6 */
      7
      8/************************************
      9 ** This is an auto-generated file **
     10 **       DO NOT EDIT BELOW        **
     11 ************************************/
     12
     13#ifndef ASIC_REG_MMU_REGS_H_
     14#define ASIC_REG_MMU_REGS_H_
     15
     16/*
     17 *****************************************
     18 *   MMU (Prototype: MMU)
     19 *****************************************
     20 */
     21
     22#define mmMMU_INPUT_FIFO_THRESHOLD                                   0x480000
     23
     24#define mmMMU_MMU_ENABLE                                             0x48000C
     25
     26#define mmMMU_FORCE_ORDERING                                         0x480010
     27
     28#define mmMMU_FEATURE_ENABLE                                         0x480014
     29
     30#define mmMMU_VA_ORDERING_MASK_31_7                                  0x480018
     31
     32#define mmMMU_VA_ORDERING_MASK_49_32                                 0x48001C
     33
     34#define mmMMU_LOG2_DDR_SIZE                                          0x480020
     35
     36#define mmMMU_SCRAMBLER                                              0x480024
     37
     38#define mmMMU_MEM_INIT_BUSY                                          0x480028
     39
     40#define mmMMU_SPI_MASK                                               0x48002C
     41
     42#define mmMMU_SPI_CAUSE                                              0x480030
     43
     44#define mmMMU_PAGE_ERROR_CAPTURE                                     0x480034
     45
     46#define mmMMU_PAGE_ERROR_CAPTURE_VA                                  0x480038
     47
     48#define mmMMU_ACCESS_ERROR_CAPTURE                                   0x48003C
     49
     50#define mmMMU_ACCESS_ERROR_CAPTURE_VA                                0x480040
     51
     52#endif /* ASIC_REG_MMU_REGS_H_ */