cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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psoc_timestamp_regs.h (1871B)


      1/* SPDX-License-Identifier: GPL-2.0
      2 *
      3 * Copyright 2016-2018 HabanaLabs, Ltd.
      4 * All Rights Reserved.
      5 *
      6 */
      7
      8/************************************
      9 ** This is an auto-generated file **
     10 **       DO NOT EDIT BELOW        **
     11 ************************************/
     12
     13#ifndef ASIC_REG_PSOC_TIMESTAMP_REGS_H_
     14#define ASIC_REG_PSOC_TIMESTAMP_REGS_H_
     15
     16/*
     17 *****************************************
     18 *   PSOC_TIMESTAMP (Prototype: TIMESTAMP)
     19 *****************************************
     20 */
     21
     22#define mmPSOC_TIMESTAMP_CNTCR                                       0xC49000
     23
     24#define mmPSOC_TIMESTAMP_CNTSR                                       0xC49004
     25
     26#define mmPSOC_TIMESTAMP_CNTCVL                                      0xC49008
     27
     28#define mmPSOC_TIMESTAMP_CNTCVU                                      0xC4900C
     29
     30#define mmPSOC_TIMESTAMP_CNTFID0                                     0xC49020
     31
     32#define mmPSOC_TIMESTAMP_PIDR4                                       0xC49FD0
     33
     34#define mmPSOC_TIMESTAMP_PIDR5                                       0xC49FD4
     35
     36#define mmPSOC_TIMESTAMP_PIDR6                                       0xC49FD8
     37
     38#define mmPSOC_TIMESTAMP_PIDR7                                       0xC49FDC
     39
     40#define mmPSOC_TIMESTAMP_PIDR0                                       0xC49FE0
     41
     42#define mmPSOC_TIMESTAMP_PIDR1                                       0xC49FE4
     43
     44#define mmPSOC_TIMESTAMP_PIDR2                                       0xC49FE8
     45
     46#define mmPSOC_TIMESTAMP_PIDR3                                       0xC49FEC
     47
     48#define mmPSOC_TIMESTAMP_CIDR0                                       0xC49FF0
     49
     50#define mmPSOC_TIMESTAMP_CIDR1                                       0xC49FF4
     51
     52#define mmPSOC_TIMESTAMP_CIDR2                                       0xC49FF8
     53
     54#define mmPSOC_TIMESTAMP_CIDR3                                       0xC49FFC
     55
     56#endif /* ASIC_REG_PSOC_TIMESTAMP_REGS_H_ */