tpc_pll_regs.h (3733B)
1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8/************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13#ifndef ASIC_REG_TPC_PLL_REGS_H_ 14#define ASIC_REG_TPC_PLL_REGS_H_ 15 16/* 17 ***************************************** 18 * TPC_PLL (Prototype: PLL) 19 ***************************************** 20 */ 21 22#define mmTPC_PLL_NR 0xE01100 23 24#define mmTPC_PLL_NF 0xE01104 25 26#define mmTPC_PLL_OD 0xE01108 27 28#define mmTPC_PLL_NB 0xE0110C 29 30#define mmTPC_PLL_CFG 0xE01110 31 32#define mmTPC_PLL_LOSE_MASK 0xE01120 33 34#define mmTPC_PLL_LOCK_INTR 0xE01128 35 36#define mmTPC_PLL_LOCK_BYPASS 0xE0112C 37 38#define mmTPC_PLL_DATA_CHNG 0xE01130 39 40#define mmTPC_PLL_RST 0xE01134 41 42#define mmTPC_PLL_SLIP_WD_CNTR 0xE01150 43 44#define mmTPC_PLL_DIV_FACTOR_0 0xE01200 45 46#define mmTPC_PLL_DIV_FACTOR_1 0xE01204 47 48#define mmTPC_PLL_DIV_FACTOR_2 0xE01208 49 50#define mmTPC_PLL_DIV_FACTOR_3 0xE0120C 51 52#define mmTPC_PLL_DIV_FACTOR_CMD_0 0xE01220 53 54#define mmTPC_PLL_DIV_FACTOR_CMD_1 0xE01224 55 56#define mmTPC_PLL_DIV_FACTOR_CMD_2 0xE01228 57 58#define mmTPC_PLL_DIV_FACTOR_CMD_3 0xE0122C 59 60#define mmTPC_PLL_DIV_SEL_0 0xE01280 61 62#define mmTPC_PLL_DIV_SEL_1 0xE01284 63 64#define mmTPC_PLL_DIV_SEL_2 0xE01288 65 66#define mmTPC_PLL_DIV_SEL_3 0xE0128C 67 68#define mmTPC_PLL_DIV_EN_0 0xE012A0 69 70#define mmTPC_PLL_DIV_EN_1 0xE012A4 71 72#define mmTPC_PLL_DIV_EN_2 0xE012A8 73 74#define mmTPC_PLL_DIV_EN_3 0xE012AC 75 76#define mmTPC_PLL_DIV_FACTOR_BUSY_0 0xE012C0 77 78#define mmTPC_PLL_DIV_FACTOR_BUSY_1 0xE012C4 79 80#define mmTPC_PLL_DIV_FACTOR_BUSY_2 0xE012C8 81 82#define mmTPC_PLL_DIV_FACTOR_BUSY_3 0xE012CC 83 84#define mmTPC_PLL_CLK_GATER 0xE01300 85 86#define mmTPC_PLL_CLK_RLX_0 0xE01310 87 88#define mmTPC_PLL_CLK_RLX_1 0xE01314 89 90#define mmTPC_PLL_CLK_RLX_2 0xE01318 91 92#define mmTPC_PLL_CLK_RLX_3 0xE0131C 93 94#define mmTPC_PLL_REF_CNTR_PERIOD 0xE01400 95 96#define mmTPC_PLL_REF_LOW_THRESHOLD 0xE01410 97 98#define mmTPC_PLL_REF_HIGH_THRESHOLD 0xE01420 99 100#define mmTPC_PLL_PLL_NOT_STABLE 0xE01430 101 102#define mmTPC_PLL_FREQ_CALC_EN 0xE01440 103 104#endif /* ASIC_REG_TPC_PLL_REGS_H_ */