cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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goya_packets.h (2864B)

      1/* SPDX-License-Identifier: GPL-2.0
      2 *
      3 * Copyright 2017-2018 HabanaLabs, Ltd.
      4 * All Rights Reserved.
      5 *
      6 */
      7
      8#ifndef GOYA_PACKETS_H
      9#define GOYA_PACKETS_H
     10
     11#include <linux/types.h>
     12
     13#define PACKET_HEADER_PACKET_ID_SHIFT		56
     14#define PACKET_HEADER_PACKET_ID_MASK		0x1F00000000000000ull
     15
     16enum packet_id {
     17	PACKET_WREG_32 = 0x1,
     18	PACKET_WREG_BULK = 0x2,
     19	PACKET_MSG_LONG = 0x3,
     20	PACKET_MSG_SHORT = 0x4,
     21	PACKET_CP_DMA = 0x5,
     22	PACKET_MSG_PROT = 0x7,
     23	PACKET_FENCE = 0x8,
     24	PACKET_LIN_DMA = 0x9,
     25	PACKET_NOP = 0xA,
     26	PACKET_STOP = 0xB,
     27	MAX_PACKET_ID = (PACKET_HEADER_PACKET_ID_MASK >>
     28				PACKET_HEADER_PACKET_ID_SHIFT) + 1
     29};
     30
     31enum goya_dma_direction {
     32	DMA_HOST_TO_DRAM,
     33	DMA_HOST_TO_SRAM,
     34	DMA_DRAM_TO_SRAM,
     35	DMA_SRAM_TO_DRAM,
     36	DMA_SRAM_TO_HOST,
     37	DMA_DRAM_TO_HOST,
     38	DMA_DRAM_TO_DRAM,
     39	DMA_SRAM_TO_SRAM,
     40	DMA_ENUM_MAX
     41};
     42
     43#define GOYA_PKT_CTL_OPCODE_SHIFT	24
     44#define GOYA_PKT_CTL_OPCODE_MASK	0x1F000000
     45
     46#define GOYA_PKT_CTL_EB_SHIFT		29
     47#define GOYA_PKT_CTL_EB_MASK		0x20000000
     48
     49#define GOYA_PKT_CTL_RB_SHIFT		30
     50#define GOYA_PKT_CTL_RB_MASK		0x40000000
     51
     52#define GOYA_PKT_CTL_MB_SHIFT		31
     53#define GOYA_PKT_CTL_MB_MASK		0x80000000
     54
     55/* All packets have, at least, an 8-byte header, which contains
     56 * the packet type. The kernel driver uses the packet header for packet
     57 * validation and to perform any necessary required preparation before
     58 * sending them off to the hardware.
     59 */
     60struct goya_packet {
     61	__le64 header;
     62	/* The rest of the packet data follows. Use the corresponding
     63	 * packet_XXX struct to deference the data, based on packet type
     64	 */
     65	u8 contents[];
     66};
     67
     68struct packet_nop {
     69	__le32 reserved;
     70	__le32 ctl;
     71};
     72
     73struct packet_stop {
     74	__le32 reserved;
     75	__le32 ctl;
     76};
     77
     78#define GOYA_PKT_WREG32_CTL_REG_OFFSET_SHIFT	0
     79#define GOYA_PKT_WREG32_CTL_REG_OFFSET_MASK	0x0000FFFF
     80
     81struct packet_wreg32 {
     82	__le32 value;
     83	__le32 ctl;
     84};
     85
     86struct packet_wreg_bulk {
     87	__le32 size64;
     88	__le32 ctl;
     89	__le64 values[]; /* data starts here */
     90};
     91
     92struct packet_msg_long {
     93	__le32 value;
     94	__le32 ctl;
     95	__le64 addr;
     96};
     97
     98struct packet_msg_short {
     99	__le32 value;
    100	__le32 ctl;
    101};
    102
    103struct packet_msg_prot {
    104	__le32 value;
    105	__le32 ctl;
    106	__le64 addr;
    107};
    108
    109struct packet_fence {
    110	__le32 cfg;
    111	__le32 ctl;
    112};
    113
    114#define GOYA_PKT_LIN_DMA_CTL_WO_SHIFT		0
    115#define GOYA_PKT_LIN_DMA_CTL_WO_MASK		0x00000001
    116
    117#define GOYA_PKT_LIN_DMA_CTL_RDCOMP_SHIFT	1
    118#define GOYA_PKT_LIN_DMA_CTL_RDCOMP_MASK	0x00000002
    119
    120#define GOYA_PKT_LIN_DMA_CTL_WRCOMP_SHIFT	2
    121#define GOYA_PKT_LIN_DMA_CTL_WRCOMP_MASK	0x00000004
    122
    123#define GOYA_PKT_LIN_DMA_CTL_MEMSET_SHIFT	6
    124#define GOYA_PKT_LIN_DMA_CTL_MEMSET_MASK	0x00000040
    125
    126#define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_SHIFT	20
    127#define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_MASK	0x00700000
    128
    129struct packet_lin_dma {
    130	__le32 tsize;
    131	__le32 ctl;
    132	__le64 src_addr;
    133	__le64 dst_addr;
    134};
    135
    136struct packet_cp_dma {
    137	__le32 tsize;
    138	__le32 ctl;
    139	__le64 src_addr;
    140};
    141
    142#endif /* GOYA_PACKETS_H */