cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ocxl_internal.h (4025B)


      1/* SPDX-License-Identifier: GPL-2.0+ */
      2// Copyright 2017 IBM Corp.
      3#ifndef _OCXL_INTERNAL_H_
      4#define _OCXL_INTERNAL_H_
      5
      6#include <linux/pci.h>
      7#include <linux/cdev.h>
      8#include <linux/list.h>
      9#include <misc/ocxl.h>
     10
     11#define MAX_IRQ_PER_LINK	2000
     12#define MAX_IRQ_PER_CONTEXT	MAX_IRQ_PER_LINK
     13
     14extern struct pci_driver ocxl_pci_driver;
     15
     16struct ocxl_fn {
     17	struct device dev;
     18	int bar_used[3];
     19	struct ocxl_fn_config config;
     20	struct list_head afu_list;
     21	int pasid_base;
     22	int actag_base;
     23	int actag_enabled;
     24	int actag_supported;
     25	struct list_head pasid_list;
     26	struct list_head actag_list;
     27	void *link;
     28};
     29
     30struct ocxl_file_info {
     31	struct ocxl_afu *afu;
     32	struct device dev;
     33	struct cdev cdev;
     34	struct bin_attribute attr_global_mmio;
     35};
     36
     37struct ocxl_afu {
     38	struct kref kref;
     39	struct ocxl_fn *fn;
     40	struct list_head list;
     41	struct ocxl_afu_config config;
     42	int pasid_base;
     43	int pasid_count; /* opened contexts */
     44	int pasid_max; /* maximum number of contexts */
     45	int actag_base;
     46	int actag_enabled;
     47	struct mutex contexts_lock;
     48	struct idr contexts_idr;
     49	struct mutex afu_control_lock;
     50	u64 global_mmio_start;
     51	u64 irq_base_offset;
     52	void __iomem *global_mmio_ptr;
     53	u64 pp_mmio_start;
     54	void *private;
     55};
     56
     57enum ocxl_context_status {
     58	CLOSED,
     59	OPENED,
     60	ATTACHED,
     61};
     62
     63// Contains metadata about a translation fault
     64struct ocxl_xsl_error {
     65	u64 addr; // The address that triggered the fault
     66	u64 dsisr; // the value of the dsisr register
     67	u64 count; // The number of times this fault has been triggered
     68};
     69
     70struct ocxl_context {
     71	struct ocxl_afu *afu;
     72	int pasid;
     73	struct mutex status_mutex;
     74	enum ocxl_context_status status;
     75	struct address_space *mapping;
     76	struct mutex mapping_lock;
     77	wait_queue_head_t events_wq;
     78	struct mutex xsl_error_lock;
     79	struct ocxl_xsl_error xsl_error;
     80	struct mutex irq_lock;
     81	struct idr irq_idr;
     82	u16 tidr; // Thread ID used for P9 wait implementation
     83};
     84
     85struct ocxl_process_element {
     86	__be64 config_state;
     87	__be32 pasid;
     88	__be16 bdf;
     89	__be16 reserved1;
     90	__be32 reserved2[9];
     91	__be32 lpid;
     92	__be32 tid;
     93	__be32 pid;
     94	__be32 reserved3[10];
     95	__be64 amr;
     96	__be32 reserved4[3];
     97	__be32 software_state;
     98};
     99
    100int ocxl_create_cdev(struct ocxl_afu *afu);
    101void ocxl_destroy_cdev(struct ocxl_afu *afu);
    102int ocxl_file_register_afu(struct ocxl_afu *afu);
    103void ocxl_file_unregister_afu(struct ocxl_afu *afu);
    104
    105int ocxl_file_init(void);
    106void ocxl_file_exit(void);
    107
    108int ocxl_pasid_afu_alloc(struct ocxl_fn *fn, u32 size);
    109void ocxl_pasid_afu_free(struct ocxl_fn *fn, u32 start, u32 size);
    110int ocxl_actag_afu_alloc(struct ocxl_fn *fn, u32 size);
    111void ocxl_actag_afu_free(struct ocxl_fn *fn, u32 start, u32 size);
    112
    113/*
    114 * Get the max PASID value that can be used by the function
    115 */
    116int ocxl_config_get_pasid_info(struct pci_dev *dev, int *count);
    117
    118/*
    119 * Control whether the FPGA is reloaded on a link reset
    120 */
    121int ocxl_config_get_reset_reload(struct pci_dev *dev, int *val);
    122int ocxl_config_set_reset_reload(struct pci_dev *dev, int val);
    123
    124/*
    125 * Check if an AFU index is valid for the given function.
    126 *
    127 * AFU indexes can be sparse, so a driver should check all indexes up
    128 * to the maximum found in the function description
    129 */
    130int ocxl_config_check_afu_index(struct pci_dev *dev,
    131				struct ocxl_fn_config *fn, int afu_idx);
    132
    133/**
    134 * ocxl_link_update_pe() - Update values within a Process Element
    135 * @link_handle: the link handle associated with the process element
    136 * @pasid: the PASID for the AFU context
    137 * @tid: the new thread id for the process element
    138 *
    139 * Returns 0 on success
    140 */
    141int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid);
    142
    143int ocxl_context_mmap(struct ocxl_context *ctx,
    144			struct vm_area_struct *vma);
    145void ocxl_context_detach_all(struct ocxl_afu *afu);
    146
    147int ocxl_sysfs_register_afu(struct ocxl_file_info *info);
    148void ocxl_sysfs_unregister_afu(struct ocxl_file_info *info);
    149
    150int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset);
    151u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id);
    152void ocxl_afu_irq_free_all(struct ocxl_context *ctx);
    153
    154#endif /* _OCXL_INTERNAL_H_ */