cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cb710-mmc.h (3167B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *  cb710/cb710-mmc.h
      4 *
      5 *  Copyright by Michał Mirosław, 2008-2009
      6 */
      7#ifndef LINUX_CB710_MMC_H
      8#define LINUX_CB710_MMC_H
      9
     10#include <linux/cb710.h>
     11
     12/* per-MMC-reader structure */
     13struct cb710_mmc_reader {
     14	struct tasklet_struct finish_req_tasklet;
     15	struct mmc_request *mrq;
     16	spinlock_t irq_lock;
     17	unsigned char last_power_mode;
     18};
     19
     20/* some device struct walking */
     21
     22static inline struct mmc_host *cb710_slot_to_mmc(struct cb710_slot *slot)
     23{
     24	return platform_get_drvdata(&slot->pdev);
     25}
     26
     27static inline struct cb710_slot *cb710_mmc_to_slot(struct mmc_host *mmc)
     28{
     29	struct platform_device *pdev = to_platform_device(mmc_dev(mmc));
     30	return cb710_pdev_to_slot(pdev);
     31}
     32
     33/* registers (this might be all wrong ;) */
     34
     35#define CB710_MMC_DATA_PORT		0x00
     36
     37#define CB710_MMC_CONFIG_PORT		0x04
     38#define CB710_MMC_CONFIG0_PORT		0x04
     39#define CB710_MMC_CONFIG1_PORT		0x05
     40#define   CB710_MMC_C1_4BIT_DATA_BUS		0x40
     41#define CB710_MMC_CONFIG2_PORT		0x06
     42#define   CB710_MMC_C2_READ_PIO_SIZE_MASK	0x0F	/* N-1 */
     43#define CB710_MMC_CONFIG3_PORT		0x07
     44
     45#define CB710_MMC_CONFIGB_PORT		0x08
     46
     47#define CB710_MMC_IRQ_ENABLE_PORT	0x0C
     48#define   CB710_MMC_IE_TEST_MASK		0x00BF
     49#define   CB710_MMC_IE_CARD_INSERTION_STATUS	0x1000
     50#define   CB710_MMC_IE_IRQ_ENABLE		0x8000
     51#define   CB710_MMC_IE_CISTATUS_MASK		\
     52		(CB710_MMC_IE_CARD_INSERTION_STATUS|CB710_MMC_IE_IRQ_ENABLE)
     53
     54#define CB710_MMC_STATUS_PORT		0x10
     55#define   CB710_MMC_STATUS_ERROR_EVENTS		0x60FF
     56#define CB710_MMC_STATUS0_PORT		0x10
     57#define   CB710_MMC_S0_FIFO_UNDERFLOW		0x40
     58#define CB710_MMC_STATUS1_PORT		0x11
     59#define   CB710_MMC_S1_COMMAND_SENT		0x01
     60#define   CB710_MMC_S1_DATA_TRANSFER_DONE	0x02
     61#define   CB710_MMC_S1_PIO_TRANSFER_DONE	0x04
     62#define   CB710_MMC_S1_CARD_CHANGED		0x10
     63#define   CB710_MMC_S1_RESET			0x20
     64#define CB710_MMC_STATUS2_PORT		0x12
     65#define   CB710_MMC_S2_FIFO_READY		0x01
     66#define   CB710_MMC_S2_FIFO_EMPTY		0x02
     67#define   CB710_MMC_S2_BUSY_10			0x10
     68#define   CB710_MMC_S2_BUSY_20			0x20
     69#define CB710_MMC_STATUS3_PORT		0x13
     70#define   CB710_MMC_S3_CARD_DETECTED		0x02
     71#define   CB710_MMC_S3_WRITE_PROTECTED		0x04
     72
     73#define CB710_MMC_CMD_TYPE_PORT		0x14
     74#define   CB710_MMC_RSP_TYPE_MASK		0x0007
     75#define     CB710_MMC_RSP_R1			(0)
     76#define     CB710_MMC_RSP_136			(5)
     77#define     CB710_MMC_RSP_NO_CRC		(2)
     78#define   CB710_MMC_RSP_PRESENT_MASK		0x0018
     79#define     CB710_MMC_RSP_NONE			(0 << 3)
     80#define     CB710_MMC_RSP_PRESENT		(1 << 3)
     81#define     CB710_MMC_RSP_PRESENT_X		(2 << 3)
     82#define   CB710_MMC_CMD_TYPE_MASK		0x0060
     83#define     CB710_MMC_CMD_BC			(0 << 5)
     84#define     CB710_MMC_CMD_BCR			(1 << 5)
     85#define     CB710_MMC_CMD_AC			(2 << 5)
     86#define     CB710_MMC_CMD_ADTC			(3 << 5)
     87#define   CB710_MMC_DATA_READ			0x0080
     88#define   CB710_MMC_CMD_CODE_MASK		0x3F00
     89#define   CB710_MMC_CMD_CODE_SHIFT		8
     90#define   CB710_MMC_IS_APP_CMD			0x4000
     91#define   CB710_MMC_RSP_BUSY			0x8000
     92
     93#define CB710_MMC_CMD_PARAM_PORT	0x18
     94#define CB710_MMC_TRANSFER_SIZE_PORT	0x1C
     95#define CB710_MMC_RESPONSE0_PORT	0x20
     96#define CB710_MMC_RESPONSE1_PORT	0x24
     97#define CB710_MMC_RESPONSE2_PORT	0x28
     98#define CB710_MMC_RESPONSE3_PORT	0x2C
     99
    100#endif /* LINUX_CB710_MMC_H */