cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sdhci_f_sdh30.c (5861B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * linux/drivers/mmc/host/sdhci_f_sdh30.c
      4 *
      5 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
      6 *              Vincent Yang <vincent.yang@tw.fujitsu.com>
      7 * Copyright (C) 2015 Linaro Ltd  Andy Green <andy.green@linaro.org>
      8 */
      9
     10#include <linux/acpi.h>
     11#include <linux/err.h>
     12#include <linux/delay.h>
     13#include <linux/module.h>
     14#include <linux/of.h>
     15#include <linux/property.h>
     16#include <linux/clk.h>
     17
     18#include "sdhci-pltfm.h"
     19#include "sdhci_f_sdh30.h"
     20
     21struct f_sdhost_priv {
     22	struct clk *clk_iface;
     23	struct clk *clk;
     24	u32 vendor_hs200;
     25	struct device *dev;
     26	bool enable_cmd_dat_delay;
     27};
     28
     29static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
     30{
     31	struct f_sdhost_priv *priv = sdhci_priv(host);
     32	u32 ctrl = 0;
     33
     34	usleep_range(2500, 3000);
     35	ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
     36	ctrl |= F_SDH30_CRES_O_DN;
     37	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
     38	ctrl |= F_SDH30_MSEL_O_1_8;
     39	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
     40
     41	ctrl &= ~F_SDH30_CRES_O_DN;
     42	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
     43	usleep_range(2500, 3000);
     44
     45	if (priv->vendor_hs200) {
     46		dev_info(priv->dev, "%s: setting hs200\n", __func__);
     47		ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
     48		ctrl |= priv->vendor_hs200;
     49		sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
     50	}
     51
     52	ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
     53	ctrl |= F_SDH30_CMD_CHK_DIS;
     54	sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
     55}
     56
     57static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
     58{
     59	return F_SDH30_MIN_CLOCK;
     60}
     61
     62static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
     63{
     64	struct f_sdhost_priv *priv = sdhci_priv(host);
     65	u32 ctl;
     66
     67	if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
     68		sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
     69
     70	sdhci_reset(host, mask);
     71
     72	if (priv->enable_cmd_dat_delay) {
     73		ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
     74		ctl |= F_SDH30_CMD_DAT_DELAY;
     75		sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
     76	}
     77}
     78
     79static const struct sdhci_ops sdhci_f_sdh30_ops = {
     80	.voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
     81	.get_min_clock = sdhci_f_sdh30_get_min_clock,
     82	.reset = sdhci_f_sdh30_reset,
     83	.set_clock = sdhci_set_clock,
     84	.set_bus_width = sdhci_set_bus_width,
     85	.set_uhs_signaling = sdhci_set_uhs_signaling,
     86};
     87
     88static int sdhci_f_sdh30_probe(struct platform_device *pdev)
     89{
     90	struct sdhci_host *host;
     91	struct device *dev = &pdev->dev;
     92	int irq, ctrl = 0, ret = 0;
     93	struct f_sdhost_priv *priv;
     94	u32 reg = 0;
     95
     96	irq = platform_get_irq(pdev, 0);
     97	if (irq < 0)
     98		return irq;
     99
    100	host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
    101	if (IS_ERR(host))
    102		return PTR_ERR(host);
    103
    104	priv = sdhci_priv(host);
    105	priv->dev = dev;
    106
    107	host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
    108		       SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
    109	host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
    110			SDHCI_QUIRK2_TUNING_WORK_AROUND;
    111
    112	priv->enable_cmd_dat_delay = device_property_read_bool(dev,
    113						"fujitsu,cmd-dat-delay-select");
    114
    115	ret = mmc_of_parse(host->mmc);
    116	if (ret)
    117		goto err;
    118
    119	platform_set_drvdata(pdev, host);
    120
    121	host->hw_name = "f_sdh30";
    122	host->ops = &sdhci_f_sdh30_ops;
    123	host->irq = irq;
    124
    125	host->ioaddr = devm_platform_ioremap_resource(pdev, 0);
    126	if (IS_ERR(host->ioaddr)) {
    127		ret = PTR_ERR(host->ioaddr);
    128		goto err;
    129	}
    130
    131	if (dev_of_node(dev)) {
    132		sdhci_get_of_property(pdev);
    133
    134		priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
    135		if (IS_ERR(priv->clk_iface)) {
    136			ret = PTR_ERR(priv->clk_iface);
    137			goto err;
    138		}
    139
    140		ret = clk_prepare_enable(priv->clk_iface);
    141		if (ret)
    142			goto err;
    143
    144		priv->clk = devm_clk_get(&pdev->dev, "core");
    145		if (IS_ERR(priv->clk)) {
    146			ret = PTR_ERR(priv->clk);
    147			goto err_clk;
    148		}
    149
    150		ret = clk_prepare_enable(priv->clk);
    151		if (ret)
    152			goto err_clk;
    153	}
    154
    155	/* init vendor specific regs */
    156	ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
    157	ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
    158		F_SDH30_AHB_INCR_4;
    159	ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
    160	sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
    161
    162	reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
    163	sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
    164	msleep(20);
    165	sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
    166
    167	reg = sdhci_readl(host, SDHCI_CAPABILITIES);
    168	if (reg & SDHCI_CAN_DO_8BIT)
    169		priv->vendor_hs200 = F_SDH30_EMMC_HS200;
    170
    171	ret = sdhci_add_host(host);
    172	if (ret)
    173		goto err_add_host;
    174
    175	return 0;
    176
    177err_add_host:
    178	clk_disable_unprepare(priv->clk);
    179err_clk:
    180	clk_disable_unprepare(priv->clk_iface);
    181err:
    182	sdhci_free_host(host);
    183	return ret;
    184}
    185
    186static int sdhci_f_sdh30_remove(struct platform_device *pdev)
    187{
    188	struct sdhci_host *host = platform_get_drvdata(pdev);
    189	struct f_sdhost_priv *priv = sdhci_priv(host);
    190
    191	sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
    192			  0xffffffff);
    193
    194	clk_disable_unprepare(priv->clk_iface);
    195	clk_disable_unprepare(priv->clk);
    196
    197	sdhci_free_host(host);
    198	platform_set_drvdata(pdev, NULL);
    199
    200	return 0;
    201}
    202
    203#ifdef CONFIG_OF
    204static const struct of_device_id f_sdh30_dt_ids[] = {
    205	{ .compatible = "fujitsu,mb86s70-sdhci-3.0" },
    206	{ /* sentinel */ }
    207};
    208MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
    209#endif
    210
    211#ifdef CONFIG_ACPI
    212static const struct acpi_device_id f_sdh30_acpi_ids[] = {
    213	{ "SCX0002" },
    214	{ /* sentinel */ }
    215};
    216MODULE_DEVICE_TABLE(acpi, f_sdh30_acpi_ids);
    217#endif
    218
    219static struct platform_driver sdhci_f_sdh30_driver = {
    220	.driver = {
    221		.name = "f_sdh30",
    222		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
    223		.of_match_table = of_match_ptr(f_sdh30_dt_ids),
    224		.acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids),
    225		.pm	= &sdhci_pltfm_pmops,
    226	},
    227	.probe	= sdhci_f_sdh30_probe,
    228	.remove	= sdhci_f_sdh30_remove,
    229};
    230
    231module_platform_driver(sdhci_f_sdh30_driver);
    232
    233MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
    234MODULE_LICENSE("GPL v2");
    235MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
    236MODULE_ALIAS("platform:f_sdh30");