cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tmio_mmc_core.c (33351B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Driver for the MMC / SD / SDIO IP found in:
      4 *
      5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
      6 *
      7 * Copyright (C) 2015-19 Renesas Electronics Corporation
      8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
      9 * Copyright (C) 2017 Horms Solutions, Simon Horman
     10 * Copyright (C) 2011 Guennadi Liakhovetski
     11 * Copyright (C) 2007 Ian Molton
     12 * Copyright (C) 2004 Ian Molton
     13 *
     14 * This driver draws mainly on scattered spec sheets, Reverse engineering
     15 * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
     16 * support). (Further 4 bit support from a later datasheet).
     17 *
     18 * TODO:
     19 *   Investigate using a workqueue for PIO transfers
     20 *   Eliminate FIXMEs
     21 *   Better Power management
     22 *   Handle MMC errors better
     23 *   double buffer support
     24 *
     25 */
     26
     27#include <linux/delay.h>
     28#include <linux/device.h>
     29#include <linux/dma-mapping.h>
     30#include <linux/highmem.h>
     31#include <linux/interrupt.h>
     32#include <linux/io.h>
     33#include <linux/irq.h>
     34#include <linux/mfd/tmio.h>
     35#include <linux/mmc/card.h>
     36#include <linux/mmc/host.h>
     37#include <linux/mmc/mmc.h>
     38#include <linux/mmc/slot-gpio.h>
     39#include <linux/module.h>
     40#include <linux/pagemap.h>
     41#include <linux/platform_device.h>
     42#include <linux/pm_qos.h>
     43#include <linux/pm_runtime.h>
     44#include <linux/regulator/consumer.h>
     45#include <linux/mmc/sdio.h>
     46#include <linux/scatterlist.h>
     47#include <linux/sizes.h>
     48#include <linux/spinlock.h>
     49#include <linux/workqueue.h>
     50
     51#include "tmio_mmc.h"
     52
     53static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
     54				      struct mmc_data *data)
     55{
     56	if (host->dma_ops)
     57		host->dma_ops->start(host, data);
     58}
     59
     60static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
     61{
     62	if (host->dma_ops && host->dma_ops->end)
     63		host->dma_ops->end(host);
     64}
     65
     66static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
     67{
     68	if (host->dma_ops)
     69		host->dma_ops->enable(host, enable);
     70}
     71
     72static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
     73					struct tmio_mmc_data *pdata)
     74{
     75	if (host->dma_ops) {
     76		host->dma_ops->request(host, pdata);
     77	} else {
     78		host->chan_tx = NULL;
     79		host->chan_rx = NULL;
     80	}
     81}
     82
     83static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
     84{
     85	if (host->dma_ops)
     86		host->dma_ops->release(host);
     87}
     88
     89static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
     90{
     91	if (host->dma_ops)
     92		host->dma_ops->abort(host);
     93}
     94
     95static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
     96{
     97	if (host->dma_ops)
     98		host->dma_ops->dataend(host);
     99}
    100
    101void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
    102{
    103	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
    104	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
    105}
    106EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
    107
    108void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
    109{
    110	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
    111	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
    112}
    113EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
    114
    115static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
    116{
    117	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
    118}
    119
    120static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
    121{
    122	host->sg_len = data->sg_len;
    123	host->sg_ptr = data->sg;
    124	host->sg_orig = data->sg;
    125	host->sg_off = 0;
    126}
    127
    128static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
    129{
    130	host->sg_ptr = sg_next(host->sg_ptr);
    131	host->sg_off = 0;
    132	return --host->sg_len;
    133}
    134
    135#define CMDREQ_TIMEOUT	5000
    136
    137static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
    138{
    139	struct tmio_mmc_host *host = mmc_priv(mmc);
    140
    141	if (enable && !host->sdio_irq_enabled) {
    142		u16 sdio_status;
    143
    144		/* Keep device active while SDIO irq is enabled */
    145		pm_runtime_get_sync(mmc_dev(mmc));
    146
    147		host->sdio_irq_enabled = true;
    148		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
    149
    150		/* Clear obsolete interrupts before enabling */
    151		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
    152		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
    153			sdio_status |= TMIO_SDIO_SETBITS_MASK;
    154		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
    155
    156		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
    157	} else if (!enable && host->sdio_irq_enabled) {
    158		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
    159		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
    160
    161		host->sdio_irq_enabled = false;
    162		pm_runtime_mark_last_busy(mmc_dev(mmc));
    163		pm_runtime_put_autosuspend(mmc_dev(mmc));
    164	}
    165}
    166
    167static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
    168				   unsigned char bus_width)
    169{
    170	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
    171				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
    172
    173	/* reg now applies to MMC_BUS_WIDTH_4 */
    174	if (bus_width == MMC_BUS_WIDTH_1)
    175		reg |= CARD_OPT_WIDTH;
    176	else if (bus_width == MMC_BUS_WIDTH_8)
    177		reg |= CARD_OPT_WIDTH8;
    178
    179	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
    180}
    181
    182static void tmio_mmc_reset(struct tmio_mmc_host *host)
    183{
    184	/* FIXME - should we set stop clock reg here */
    185	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
    186	usleep_range(10000, 11000);
    187	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
    188	usleep_range(10000, 11000);
    189
    190	tmio_mmc_abort_dma(host);
    191
    192	if (host->reset)
    193		host->reset(host);
    194
    195	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
    196	host->sdcard_irq_mask = host->sdcard_irq_mask_all;
    197
    198	if (host->native_hotplug)
    199		tmio_mmc_enable_mmc_irqs(host,
    200				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
    201
    202	tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
    203
    204	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
    205		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
    206		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
    207	}
    208
    209	if (host->mmc->card)
    210		mmc_retune_needed(host->mmc);
    211}
    212
    213static void tmio_mmc_reset_work(struct work_struct *work)
    214{
    215	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
    216						  delayed_reset_work.work);
    217	struct mmc_request *mrq;
    218	unsigned long flags;
    219
    220	spin_lock_irqsave(&host->lock, flags);
    221	mrq = host->mrq;
    222
    223	/*
    224	 * is request already finished? Since we use a non-blocking
    225	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
    226	 * us, so, have to check for IS_ERR(host->mrq)
    227	 */
    228	if (IS_ERR_OR_NULL(mrq) ||
    229	    time_is_after_jiffies(host->last_req_ts +
    230				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
    231		spin_unlock_irqrestore(&host->lock, flags);
    232		return;
    233	}
    234
    235	dev_warn(&host->pdev->dev,
    236		 "timeout waiting for hardware interrupt (CMD%u)\n",
    237		 mrq->cmd->opcode);
    238
    239	if (host->data)
    240		host->data->error = -ETIMEDOUT;
    241	else if (host->cmd)
    242		host->cmd->error = -ETIMEDOUT;
    243	else
    244		mrq->cmd->error = -ETIMEDOUT;
    245
    246	host->cmd = NULL;
    247	host->data = NULL;
    248
    249	spin_unlock_irqrestore(&host->lock, flags);
    250
    251	tmio_mmc_reset(host);
    252
    253	/* Ready for new calls */
    254	host->mrq = NULL;
    255	mmc_request_done(host->mmc, mrq);
    256}
    257
    258/* These are the bitmasks the tmio chip requires to implement the MMC response
    259 * types. Note that R1 and R6 are the same in this scheme. */
    260#define APP_CMD        0x0040
    261#define RESP_NONE      0x0300
    262#define RESP_R1        0x0400
    263#define RESP_R1B       0x0500
    264#define RESP_R2        0x0600
    265#define RESP_R3        0x0700
    266#define DATA_PRESENT   0x0800
    267#define TRANSFER_READ  0x1000
    268#define TRANSFER_MULTI 0x2000
    269#define SECURITY_CMD   0x4000
    270#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
    271
    272static int tmio_mmc_start_command(struct tmio_mmc_host *host,
    273				  struct mmc_command *cmd)
    274{
    275	struct mmc_data *data = host->data;
    276	int c = cmd->opcode;
    277
    278	switch (mmc_resp_type(cmd)) {
    279	case MMC_RSP_NONE: c |= RESP_NONE; break;
    280	case MMC_RSP_R1:
    281	case MMC_RSP_R1_NO_CRC:
    282			   c |= RESP_R1;   break;
    283	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
    284	case MMC_RSP_R2:   c |= RESP_R2;   break;
    285	case MMC_RSP_R3:   c |= RESP_R3;   break;
    286	default:
    287		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
    288		return -EINVAL;
    289	}
    290
    291	host->cmd = cmd;
    292
    293/* FIXME - this seems to be ok commented out but the spec suggest this bit
    294 *         should be set when issuing app commands.
    295 *	if(cmd->flags & MMC_FLAG_ACMD)
    296 *		c |= APP_CMD;
    297 */
    298	if (data) {
    299		c |= DATA_PRESENT;
    300		if (data->blocks > 1) {
    301			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
    302			c |= TRANSFER_MULTI;
    303
    304			/*
    305			 * Disable auto CMD12 at IO_RW_EXTENDED and
    306			 * SET_BLOCK_COUNT when doing multiple block transfer
    307			 */
    308			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
    309			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
    310				c |= NO_CMD12_ISSUE;
    311		}
    312		if (data->flags & MMC_DATA_READ)
    313			c |= TRANSFER_READ;
    314	}
    315
    316	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
    317
    318	/* Fire off the command */
    319	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
    320	sd_ctrl_write16(host, CTL_SD_CMD, c);
    321
    322	return 0;
    323}
    324
    325static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
    326				   unsigned short *buf,
    327				   unsigned int count)
    328{
    329	int is_read = host->data->flags & MMC_DATA_READ;
    330	u8  *buf8;
    331
    332	/*
    333	 * Transfer the data
    334	 */
    335	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
    336		u32 data = 0;
    337		u32 *buf32 = (u32 *)buf;
    338
    339		if (is_read)
    340			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
    341					   count >> 2);
    342		else
    343			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
    344					    count >> 2);
    345
    346		/* if count was multiple of 4 */
    347		if (!(count & 0x3))
    348			return;
    349
    350		buf32 += count >> 2;
    351		count %= 4;
    352
    353		if (is_read) {
    354			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
    355			memcpy(buf32, &data, count);
    356		} else {
    357			memcpy(&data, buf32, count);
    358			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
    359		}
    360
    361		return;
    362	}
    363
    364	if (is_read)
    365		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
    366	else
    367		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
    368
    369	/* if count was even number */
    370	if (!(count & 0x1))
    371		return;
    372
    373	/* if count was odd number */
    374	buf8 = (u8 *)(buf + (count >> 1));
    375
    376	/*
    377	 * FIXME
    378	 *
    379	 * driver and this function are assuming that
    380	 * it is used as little endian
    381	 */
    382	if (is_read)
    383		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
    384	else
    385		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
    386}
    387
    388/*
    389 * This chip always returns (at least?) as much data as you ask for.
    390 * I'm unsure what happens if you ask for less than a block. This should be
    391 * looked into to ensure that a funny length read doesn't hose the controller.
    392 */
    393static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
    394{
    395	struct mmc_data *data = host->data;
    396	void *sg_virt;
    397	unsigned short *buf;
    398	unsigned int count;
    399	unsigned long flags;
    400
    401	if (host->dma_on) {
    402		pr_err("PIO IRQ in DMA mode!\n");
    403		return;
    404	} else if (!data) {
    405		pr_debug("Spurious PIO IRQ\n");
    406		return;
    407	}
    408
    409	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
    410	buf = (unsigned short *)(sg_virt + host->sg_off);
    411
    412	count = host->sg_ptr->length - host->sg_off;
    413	if (count > data->blksz)
    414		count = data->blksz;
    415
    416	pr_debug("count: %08x offset: %08x flags %08x\n",
    417		 count, host->sg_off, data->flags);
    418
    419	/* Transfer the data */
    420	tmio_mmc_transfer_data(host, buf, count);
    421
    422	host->sg_off += count;
    423
    424	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
    425
    426	if (host->sg_off == host->sg_ptr->length)
    427		tmio_mmc_next_sg(host);
    428}
    429
    430static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
    431{
    432	if (host->sg_ptr == &host->bounce_sg) {
    433		unsigned long flags;
    434		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
    435
    436		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
    437		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
    438	}
    439}
    440
    441/* needs to be called with host->lock held */
    442void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
    443{
    444	struct mmc_data *data = host->data;
    445	struct mmc_command *stop;
    446
    447	host->data = NULL;
    448
    449	if (!data) {
    450		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
    451		return;
    452	}
    453	stop = data->stop;
    454
    455	/* FIXME - return correct transfer count on errors */
    456	if (!data->error)
    457		data->bytes_xfered = data->blocks * data->blksz;
    458	else
    459		data->bytes_xfered = 0;
    460
    461	pr_debug("Completed data request\n");
    462
    463	/*
    464	 * FIXME: other drivers allow an optional stop command of any given type
    465	 *        which we dont do, as the chip can auto generate them.
    466	 *        Perhaps we can be smarter about when to use auto CMD12 and
    467	 *        only issue the auto request when we know this is the desired
    468	 *        stop command, allowing fallback to the stop command the
    469	 *        upper layers expect. For now, we do what works.
    470	 */
    471
    472	if (data->flags & MMC_DATA_READ) {
    473		if (host->dma_on)
    474			tmio_mmc_check_bounce_buffer(host);
    475		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
    476			host->mrq);
    477	} else {
    478		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
    479			host->mrq);
    480	}
    481
    482	if (stop && !host->mrq->sbc) {
    483		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
    484			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
    485				stop->opcode, stop->arg);
    486
    487		/* fill in response from auto CMD12 */
    488		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
    489
    490		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
    491	}
    492
    493	schedule_work(&host->done);
    494}
    495EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
    496
    497static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
    498{
    499	struct mmc_data *data;
    500
    501	spin_lock(&host->lock);
    502	data = host->data;
    503
    504	if (!data)
    505		goto out;
    506
    507	if (stat & TMIO_STAT_DATATIMEOUT)
    508		data->error = -ETIMEDOUT;
    509	else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
    510		 stat & TMIO_STAT_TXUNDERRUN)
    511		data->error = -EILSEQ;
    512	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
    513		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
    514		bool done = false;
    515
    516		/*
    517		 * Has all data been written out yet? Testing on SuperH showed,
    518		 * that in most cases the first interrupt comes already with the
    519		 * BUSY status bit clear, but on some operations, like mount or
    520		 * in the beginning of a write / sync / umount, there is one
    521		 * DATAEND interrupt with the BUSY bit set, in this cases
    522		 * waiting for one more interrupt fixes the problem.
    523		 */
    524		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
    525			if (status & TMIO_STAT_SCLKDIVEN)
    526				done = true;
    527		} else {
    528			if (!(status & TMIO_STAT_CMD_BUSY))
    529				done = true;
    530		}
    531
    532		if (done) {
    533			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
    534			tmio_mmc_dataend_dma(host);
    535		}
    536	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
    537		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
    538		tmio_mmc_dataend_dma(host);
    539	} else {
    540		tmio_mmc_do_data_irq(host);
    541		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
    542	}
    543out:
    544	spin_unlock(&host->lock);
    545}
    546
    547static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
    548{
    549	struct mmc_command *cmd = host->cmd;
    550	int i, addr;
    551
    552	spin_lock(&host->lock);
    553
    554	if (!host->cmd) {
    555		pr_debug("Spurious CMD irq\n");
    556		goto out;
    557	}
    558
    559	/* This controller is sicker than the PXA one. Not only do we need to
    560	 * drop the top 8 bits of the first response word, we also need to
    561	 * modify the order of the response for short response command types.
    562	 */
    563
    564	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
    565		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
    566
    567	if (cmd->flags &  MMC_RSP_136) {
    568		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
    569		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
    570		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
    571		cmd->resp[3] <<= 8;
    572	} else if (cmd->flags & MMC_RSP_R3) {
    573		cmd->resp[0] = cmd->resp[3];
    574	}
    575
    576	if (stat & TMIO_STAT_CMDTIMEOUT)
    577		cmd->error = -ETIMEDOUT;
    578	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
    579		 stat & TMIO_STAT_STOPBIT_ERR ||
    580		 stat & TMIO_STAT_CMD_IDX_ERR)
    581		cmd->error = -EILSEQ;
    582
    583	/* If there is data to handle we enable data IRQs here, and
    584	 * we will ultimatley finish the request in the data_end handler.
    585	 * If theres no data or we encountered an error, finish now.
    586	 */
    587	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
    588		if (host->data->flags & MMC_DATA_READ) {
    589			if (!host->dma_on) {
    590				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
    591			} else {
    592				tmio_mmc_disable_mmc_irqs(host,
    593							  TMIO_MASK_READOP);
    594				tasklet_schedule(&host->dma_issue);
    595			}
    596		} else {
    597			if (!host->dma_on) {
    598				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
    599			} else {
    600				tmio_mmc_disable_mmc_irqs(host,
    601							  TMIO_MASK_WRITEOP);
    602				tasklet_schedule(&host->dma_issue);
    603			}
    604		}
    605	} else {
    606		schedule_work(&host->done);
    607	}
    608
    609out:
    610	spin_unlock(&host->lock);
    611}
    612
    613static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
    614				       int ireg, int status)
    615{
    616	struct mmc_host *mmc = host->mmc;
    617
    618	/* Card insert / remove attempts */
    619	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
    620		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
    621			TMIO_STAT_CARD_REMOVE);
    622		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
    623		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
    624		    !work_pending(&mmc->detect.work))
    625			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
    626		return true;
    627	}
    628
    629	return false;
    630}
    631
    632static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
    633				  int status)
    634{
    635	/* Command completion */
    636	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
    637		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
    638				      TMIO_STAT_CMDTIMEOUT);
    639		tmio_mmc_cmd_irq(host, status);
    640		return true;
    641	}
    642
    643	/* Data transfer */
    644	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
    645		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
    646		tmio_mmc_pio_irq(host);
    647		return true;
    648	}
    649
    650	/* Data transfer completion */
    651	if (ireg & TMIO_STAT_DATAEND) {
    652		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
    653		tmio_mmc_data_irq(host, status);
    654		return true;
    655	}
    656
    657	return false;
    658}
    659
    660static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
    661{
    662	struct mmc_host *mmc = host->mmc;
    663	struct tmio_mmc_data *pdata = host->pdata;
    664	unsigned int ireg, status;
    665	unsigned int sdio_status;
    666
    667	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
    668		return false;
    669
    670	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
    671	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
    672
    673	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
    674	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
    675		sdio_status |= TMIO_SDIO_SETBITS_MASK;
    676
    677	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
    678
    679	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
    680		mmc_signal_sdio_irq(mmc);
    681
    682	return ireg;
    683}
    684
    685irqreturn_t tmio_mmc_irq(int irq, void *devid)
    686{
    687	struct tmio_mmc_host *host = devid;
    688	unsigned int ireg, status;
    689
    690	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
    691	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
    692
    693	/* Clear the status except the interrupt status */
    694	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
    695
    696	if (__tmio_mmc_card_detect_irq(host, ireg, status))
    697		return IRQ_HANDLED;
    698	if (__tmio_mmc_sdcard_irq(host, ireg, status))
    699		return IRQ_HANDLED;
    700
    701	if (__tmio_mmc_sdio_irq(host))
    702		return IRQ_HANDLED;
    703
    704	return IRQ_NONE;
    705}
    706EXPORT_SYMBOL_GPL(tmio_mmc_irq);
    707
    708static int tmio_mmc_start_data(struct tmio_mmc_host *host,
    709			       struct mmc_data *data)
    710{
    711	struct tmio_mmc_data *pdata = host->pdata;
    712
    713	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
    714		 data->blksz, data->blocks);
    715
    716	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
    717	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
    718	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
    719		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
    720
    721		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
    722			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
    723			       mmc_hostname(host->mmc), data->blksz);
    724			return -EINVAL;
    725		}
    726	}
    727
    728	tmio_mmc_init_sg(host, data);
    729	host->data = data;
    730	host->dma_on = false;
    731
    732	/* Set transfer length / blocksize */
    733	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
    734	if (host->mmc->max_blk_count >= SZ_64K)
    735		sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
    736	else
    737		sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
    738
    739	tmio_mmc_start_dma(host, data);
    740
    741	return 0;
    742}
    743
    744static void tmio_process_mrq(struct tmio_mmc_host *host,
    745			     struct mmc_request *mrq)
    746{
    747	struct mmc_command *cmd;
    748	int ret;
    749
    750	if (mrq->sbc && host->cmd != mrq->sbc) {
    751		cmd = mrq->sbc;
    752	} else {
    753		cmd = mrq->cmd;
    754		if (mrq->data) {
    755			ret = tmio_mmc_start_data(host, mrq->data);
    756			if (ret)
    757				goto fail;
    758		}
    759	}
    760
    761	ret = tmio_mmc_start_command(host, cmd);
    762	if (ret)
    763		goto fail;
    764
    765	schedule_delayed_work(&host->delayed_reset_work,
    766			      msecs_to_jiffies(CMDREQ_TIMEOUT));
    767	return;
    768
    769fail:
    770	host->mrq = NULL;
    771	mrq->cmd->error = ret;
    772	mmc_request_done(host->mmc, mrq);
    773}
    774
    775/* Process requests from the MMC layer */
    776static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
    777{
    778	struct tmio_mmc_host *host = mmc_priv(mmc);
    779	unsigned long flags;
    780
    781	spin_lock_irqsave(&host->lock, flags);
    782
    783	if (host->mrq) {
    784		pr_debug("request not null\n");
    785		if (IS_ERR(host->mrq)) {
    786			spin_unlock_irqrestore(&host->lock, flags);
    787			mrq->cmd->error = -EAGAIN;
    788			mmc_request_done(mmc, mrq);
    789			return;
    790		}
    791	}
    792
    793	host->last_req_ts = jiffies;
    794	wmb();
    795	host->mrq = mrq;
    796
    797	spin_unlock_irqrestore(&host->lock, flags);
    798
    799	tmio_process_mrq(host, mrq);
    800}
    801
    802static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
    803{
    804	struct mmc_request *mrq;
    805	unsigned long flags;
    806
    807	spin_lock_irqsave(&host->lock, flags);
    808
    809	tmio_mmc_end_dma(host);
    810
    811	mrq = host->mrq;
    812	if (IS_ERR_OR_NULL(mrq)) {
    813		spin_unlock_irqrestore(&host->lock, flags);
    814		return;
    815	}
    816
    817	/* If not SET_BLOCK_COUNT, clear old data */
    818	if (host->cmd != mrq->sbc) {
    819		host->cmd = NULL;
    820		host->data = NULL;
    821		host->mrq = NULL;
    822	}
    823
    824	cancel_delayed_work(&host->delayed_reset_work);
    825
    826	spin_unlock_irqrestore(&host->lock, flags);
    827
    828	if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
    829		tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
    830		tmio_mmc_abort_dma(host);
    831	}
    832
    833	/* Error means retune, but executed command was still successful */
    834	if (host->check_retune && host->check_retune(host, mrq))
    835		mmc_retune_needed(host->mmc);
    836
    837	/* If SET_BLOCK_COUNT, continue with main command */
    838	if (host->mrq && !mrq->cmd->error) {
    839		tmio_process_mrq(host, mrq);
    840		return;
    841	}
    842
    843	if (host->fixup_request)
    844		host->fixup_request(host, mrq);
    845
    846	mmc_request_done(host->mmc, mrq);
    847}
    848
    849static void tmio_mmc_done_work(struct work_struct *work)
    850{
    851	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
    852						  done);
    853	tmio_mmc_finish_request(host);
    854}
    855
    856static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
    857{
    858	struct mmc_host *mmc = host->mmc;
    859	int ret = 0;
    860
    861	/* .set_ios() is returning void, so, no chance to report an error */
    862
    863	if (host->set_pwr)
    864		host->set_pwr(host->pdev, 1);
    865
    866	if (!IS_ERR(mmc->supply.vmmc)) {
    867		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
    868		/*
    869		 * Attention: empiric value. With a b43 WiFi SDIO card this
    870		 * delay proved necessary for reliable card-insertion probing.
    871		 * 100us were not enough. Is this the same 140us delay, as in
    872		 * tmio_mmc_set_ios()?
    873		 */
    874		usleep_range(200, 300);
    875	}
    876	/*
    877	 * It seems, VccQ should be switched on after Vcc, this is also what the
    878	 * omap_hsmmc.c driver does.
    879	 */
    880	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
    881		ret = regulator_enable(mmc->supply.vqmmc);
    882		usleep_range(200, 300);
    883	}
    884
    885	if (ret < 0)
    886		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
    887			ret);
    888}
    889
    890static void tmio_mmc_power_off(struct tmio_mmc_host *host)
    891{
    892	struct mmc_host *mmc = host->mmc;
    893
    894	if (!IS_ERR(mmc->supply.vqmmc))
    895		regulator_disable(mmc->supply.vqmmc);
    896
    897	if (!IS_ERR(mmc->supply.vmmc))
    898		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
    899
    900	if (host->set_pwr)
    901		host->set_pwr(host->pdev, 0);
    902}
    903
    904static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
    905{
    906	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
    907
    908	val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
    909	return 1 << (13 + val);
    910}
    911
    912static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
    913{
    914	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
    915
    916	host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
    917				      (clk_rate / MSEC_PER_SEC);
    918}
    919
    920/* Set MMC clock / power.
    921 * Note: This controller uses a simple divider scheme therefore it cannot
    922 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
    923 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
    924 * slowest setting.
    925 */
    926static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
    927{
    928	struct tmio_mmc_host *host = mmc_priv(mmc);
    929	struct device *dev = &host->pdev->dev;
    930	unsigned long flags;
    931
    932	mutex_lock(&host->ios_lock);
    933
    934	spin_lock_irqsave(&host->lock, flags);
    935	if (host->mrq) {
    936		if (IS_ERR(host->mrq)) {
    937			dev_dbg(dev,
    938				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
    939				current->comm, task_pid_nr(current),
    940				ios->clock, ios->power_mode);
    941			host->mrq = ERR_PTR(-EINTR);
    942		} else {
    943			dev_dbg(dev,
    944				"%s.%d: CMD%u active since %lu, now %lu!\n",
    945				current->comm, task_pid_nr(current),
    946				host->mrq->cmd->opcode, host->last_req_ts,
    947				jiffies);
    948		}
    949		spin_unlock_irqrestore(&host->lock, flags);
    950
    951		mutex_unlock(&host->ios_lock);
    952		return;
    953	}
    954
    955	host->mrq = ERR_PTR(-EBUSY);
    956
    957	spin_unlock_irqrestore(&host->lock, flags);
    958
    959	switch (ios->power_mode) {
    960	case MMC_POWER_OFF:
    961		tmio_mmc_power_off(host);
    962		/* For R-Car Gen2+, we need to reset SDHI specific SCC */
    963		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
    964			tmio_mmc_reset(host);
    965
    966		host->set_clock(host, 0);
    967		break;
    968	case MMC_POWER_UP:
    969		tmio_mmc_power_on(host, ios->vdd);
    970		host->set_clock(host, ios->clock);
    971		tmio_mmc_set_bus_width(host, ios->bus_width);
    972		break;
    973	case MMC_POWER_ON:
    974		host->set_clock(host, ios->clock);
    975		tmio_mmc_set_bus_width(host, ios->bus_width);
    976		break;
    977	}
    978
    979	if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
    980		tmio_mmc_max_busy_timeout(host);
    981
    982	/* Let things settle. delay taken from winCE driver */
    983	usleep_range(140, 200);
    984	if (PTR_ERR(host->mrq) == -EINTR)
    985		dev_dbg(&host->pdev->dev,
    986			"%s.%d: IOS interrupted: clk %u, mode %u",
    987			current->comm, task_pid_nr(current),
    988			ios->clock, ios->power_mode);
    989	host->mrq = NULL;
    990
    991	host->clk_cache = ios->clock;
    992
    993	mutex_unlock(&host->ios_lock);
    994}
    995
    996static int tmio_mmc_get_ro(struct mmc_host *mmc)
    997{
    998	struct tmio_mmc_host *host = mmc_priv(mmc);
    999
   1000	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
   1001		 TMIO_STAT_WRPROTECT);
   1002}
   1003
   1004static int tmio_mmc_get_cd(struct mmc_host *mmc)
   1005{
   1006	struct tmio_mmc_host *host = mmc_priv(mmc);
   1007
   1008	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
   1009		  TMIO_STAT_SIGSTATE);
   1010}
   1011
   1012static int tmio_multi_io_quirk(struct mmc_card *card,
   1013			       unsigned int direction, int blk_size)
   1014{
   1015	struct tmio_mmc_host *host = mmc_priv(card->host);
   1016
   1017	if (host->multi_io_quirk)
   1018		return host->multi_io_quirk(card, direction, blk_size);
   1019
   1020	return blk_size;
   1021}
   1022
   1023static struct mmc_host_ops tmio_mmc_ops = {
   1024	.request	= tmio_mmc_request,
   1025	.set_ios	= tmio_mmc_set_ios,
   1026	.get_ro         = tmio_mmc_get_ro,
   1027	.get_cd		= tmio_mmc_get_cd,
   1028	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
   1029	.multi_io_quirk	= tmio_multi_io_quirk,
   1030};
   1031
   1032static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
   1033{
   1034	struct tmio_mmc_data *pdata = host->pdata;
   1035	struct mmc_host *mmc = host->mmc;
   1036	int err;
   1037
   1038	err = mmc_regulator_get_supply(mmc);
   1039	if (err)
   1040		return err;
   1041
   1042	/* use ocr_mask if no regulator */
   1043	if (!mmc->ocr_avail)
   1044		mmc->ocr_avail = pdata->ocr_mask;
   1045
   1046	/*
   1047	 * try again.
   1048	 * There is possibility that regulator has not been probed
   1049	 */
   1050	if (!mmc->ocr_avail)
   1051		return -EPROBE_DEFER;
   1052
   1053	return 0;
   1054}
   1055
   1056static void tmio_mmc_of_parse(struct platform_device *pdev,
   1057			      struct mmc_host *mmc)
   1058{
   1059	const struct device_node *np = pdev->dev.of_node;
   1060
   1061	if (!np)
   1062		return;
   1063
   1064	/*
   1065	 * DEPRECATED:
   1066	 * For new platforms, please use "disable-wp" instead of
   1067	 * "toshiba,mmc-wrprotect-disable"
   1068	 */
   1069	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
   1070		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
   1071}
   1072
   1073struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
   1074					  struct tmio_mmc_data *pdata)
   1075{
   1076	struct tmio_mmc_host *host;
   1077	struct mmc_host *mmc;
   1078	void __iomem *ctl;
   1079	int ret;
   1080
   1081	ctl = devm_platform_ioremap_resource(pdev, 0);
   1082	if (IS_ERR(ctl))
   1083		return ERR_CAST(ctl);
   1084
   1085	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
   1086	if (!mmc)
   1087		return ERR_PTR(-ENOMEM);
   1088
   1089	host = mmc_priv(mmc);
   1090	host->ctl = ctl;
   1091	host->mmc = mmc;
   1092	host->pdev = pdev;
   1093	host->pdata = pdata;
   1094	host->ops = tmio_mmc_ops;
   1095	mmc->ops = &host->ops;
   1096
   1097	ret = mmc_of_parse(host->mmc);
   1098	if (ret) {
   1099		host = ERR_PTR(ret);
   1100		goto free;
   1101	}
   1102
   1103	tmio_mmc_of_parse(pdev, mmc);
   1104
   1105	platform_set_drvdata(pdev, host);
   1106
   1107	return host;
   1108free:
   1109	mmc_free_host(mmc);
   1110
   1111	return host;
   1112}
   1113EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
   1114
   1115void tmio_mmc_host_free(struct tmio_mmc_host *host)
   1116{
   1117	mmc_free_host(host->mmc);
   1118}
   1119EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
   1120
   1121int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
   1122{
   1123	struct platform_device *pdev = _host->pdev;
   1124	struct tmio_mmc_data *pdata = _host->pdata;
   1125	struct mmc_host *mmc = _host->mmc;
   1126	int ret;
   1127
   1128	/*
   1129	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
   1130	 * looping forever...
   1131	 */
   1132	if (mmc->f_min == 0)
   1133		return -EINVAL;
   1134
   1135	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
   1136		_host->write16_hook = NULL;
   1137
   1138	if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
   1139		_host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
   1140
   1141	_host->set_pwr = pdata->set_pwr;
   1142
   1143	ret = tmio_mmc_init_ocr(_host);
   1144	if (ret < 0)
   1145		return ret;
   1146
   1147	/*
   1148	 * Look for a card detect GPIO, if it fails with anything
   1149	 * else than a probe deferral, just live without it.
   1150	 */
   1151	ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
   1152	if (ret == -EPROBE_DEFER)
   1153		return ret;
   1154
   1155	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
   1156	mmc->caps2 |= pdata->capabilities2;
   1157	mmc->max_segs = pdata->max_segs ? : 32;
   1158	mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
   1159	mmc->max_blk_count = pdata->max_blk_count ? :
   1160		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
   1161	mmc->max_req_size = min_t(size_t,
   1162				  mmc->max_blk_size * mmc->max_blk_count,
   1163				  dma_max_mapping_size(&pdev->dev));
   1164	mmc->max_seg_size = mmc->max_req_size;
   1165
   1166	if (mmc_can_gpio_ro(mmc))
   1167		_host->ops.get_ro = mmc_gpio_get_ro;
   1168
   1169	if (mmc_can_gpio_cd(mmc))
   1170		_host->ops.get_cd = mmc_gpio_get_cd;
   1171
   1172	/* must be set before tmio_mmc_reset() */
   1173	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
   1174				  mmc->caps & MMC_CAP_NEEDS_POLL ||
   1175				  !mmc_card_is_removable(mmc));
   1176
   1177	/*
   1178	 * While using internal tmio hardware logic for card detection, we need
   1179	 * to ensure it stays powered for it to work.
   1180	 */
   1181	if (_host->native_hotplug)
   1182		pm_runtime_get_noresume(&pdev->dev);
   1183
   1184	_host->sdio_irq_enabled = false;
   1185	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
   1186		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
   1187
   1188	if (!_host->sdcard_irq_mask_all)
   1189		_host->sdcard_irq_mask_all = TMIO_MASK_ALL;
   1190
   1191	_host->set_clock(_host, 0);
   1192	tmio_mmc_reset(_host);
   1193
   1194	spin_lock_init(&_host->lock);
   1195	mutex_init(&_host->ios_lock);
   1196
   1197	/* Init delayed work for request timeouts */
   1198	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
   1199	INIT_WORK(&_host->done, tmio_mmc_done_work);
   1200
   1201	/* See if we also get DMA */
   1202	tmio_mmc_request_dma(_host, pdata);
   1203
   1204	pm_runtime_get_noresume(&pdev->dev);
   1205	pm_runtime_set_active(&pdev->dev);
   1206	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
   1207	pm_runtime_use_autosuspend(&pdev->dev);
   1208	pm_runtime_enable(&pdev->dev);
   1209
   1210	ret = mmc_add_host(mmc);
   1211	if (ret)
   1212		goto remove_host;
   1213
   1214	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
   1215	pm_runtime_put(&pdev->dev);
   1216
   1217	return 0;
   1218
   1219remove_host:
   1220	pm_runtime_put_noidle(&pdev->dev);
   1221	tmio_mmc_host_remove(_host);
   1222	return ret;
   1223}
   1224EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
   1225
   1226void tmio_mmc_host_remove(struct tmio_mmc_host *host)
   1227{
   1228	struct platform_device *pdev = host->pdev;
   1229	struct mmc_host *mmc = host->mmc;
   1230
   1231	pm_runtime_get_sync(&pdev->dev);
   1232
   1233	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
   1234		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
   1235
   1236	dev_pm_qos_hide_latency_limit(&pdev->dev);
   1237
   1238	mmc_remove_host(mmc);
   1239	cancel_work_sync(&host->done);
   1240	cancel_delayed_work_sync(&host->delayed_reset_work);
   1241	tmio_mmc_release_dma(host);
   1242	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
   1243
   1244	if (host->native_hotplug)
   1245		pm_runtime_put_noidle(&pdev->dev);
   1246
   1247	pm_runtime_disable(&pdev->dev);
   1248	pm_runtime_dont_use_autosuspend(&pdev->dev);
   1249	pm_runtime_put_noidle(&pdev->dev);
   1250}
   1251EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
   1252
   1253#ifdef CONFIG_PM
   1254static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
   1255{
   1256	if (!host->clk_enable)
   1257		return -ENOTSUPP;
   1258
   1259	return host->clk_enable(host);
   1260}
   1261
   1262static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
   1263{
   1264	if (host->clk_disable)
   1265		host->clk_disable(host);
   1266}
   1267
   1268int tmio_mmc_host_runtime_suspend(struct device *dev)
   1269{
   1270	struct tmio_mmc_host *host = dev_get_drvdata(dev);
   1271
   1272	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
   1273
   1274	if (host->clk_cache)
   1275		host->set_clock(host, 0);
   1276
   1277	tmio_mmc_clk_disable(host);
   1278
   1279	return 0;
   1280}
   1281EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
   1282
   1283int tmio_mmc_host_runtime_resume(struct device *dev)
   1284{
   1285	struct tmio_mmc_host *host = dev_get_drvdata(dev);
   1286
   1287	tmio_mmc_clk_enable(host);
   1288	tmio_mmc_reset(host);
   1289
   1290	if (host->clk_cache)
   1291		host->set_clock(host, host->clk_cache);
   1292
   1293	tmio_mmc_enable_dma(host, true);
   1294
   1295	return 0;
   1296}
   1297EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
   1298#endif
   1299
   1300MODULE_LICENSE("GPL v2");