cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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Kconfig (2548B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2menuconfig MTD_ONENAND
      3	tristate "OneNAND Device Support"
      4	depends on HAS_IOMEM
      5	help
      6	  This enables support for accessing all type of OneNAND flash
      7	  devices.
      8
      9if MTD_ONENAND
     10
     11config MTD_ONENAND_VERIFY_WRITE
     12	bool "Verify OneNAND page writes"
     13	help
     14	  This adds an extra check when data is written to the flash. The
     15	  OneNAND flash device internally checks only bits transitioning
     16	  from 1 to 0. There is a rare possibility that even though the
     17	  device thinks the write was successful, a bit could have been
     18	  flipped accidentally due to device wear or something else.
     19
     20config MTD_ONENAND_GENERIC
     21	tristate "OneNAND Flash device via platform device driver"
     22	help
     23	  Support for OneNAND flash via platform device driver.
     24
     25config MTD_ONENAND_OMAP2
     26	tristate "OneNAND on OMAP2/OMAP3 support"
     27	depends on ARCH_OMAP2 || ARCH_OMAP3 || (COMPILE_TEST && ARM)
     28	depends on OF || COMPILE_TEST
     29	help
     30	  Support for a OneNAND flash device connected to an OMAP2/OMAP3 SoC
     31	  via the GPMC memory controller.
     32	  Enable dmaengine and gpiolib for better performance.
     33
     34config MTD_ONENAND_SAMSUNG
     35	tristate "OneNAND on Samsung SOC controller support"
     36	depends on ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST
     37	help
     38	  Support for a OneNAND flash device connected to Samsung S3C64XX
     39	  (using command mapping method) and S5PC110/S5PC210 (using generic
     40	  OneNAND method) SoCs.
     41	  Choose Y here only if you build for such Samsung SoC.
     42
     43config MTD_ONENAND_OTP
     44	bool "OneNAND OTP Support"
     45	help
     46	  One Block of the NAND Flash Array memory is reserved as
     47	  a One-Time Programmable Block memory area.
     48	  Also, 1st Block of NAND Flash Array can be used as OTP.
     49
     50	  The OTP block can be read, programmed and locked using the same
     51	  operations as any other NAND Flash Array memory block.
     52	  OTP block cannot be erased.
     53
     54	  OTP block is fully-guaranteed to be a valid block.
     55
     56config MTD_ONENAND_2X_PROGRAM
     57	bool "OneNAND 2X program support"
     58	help
     59	  The 2X Program is an extension of Program Operation.
     60	  Since the device is equipped with two DataRAMs, and two-plane NAND
     61	  Flash memory array, these two component enables simultaneous program
     62	  of 4KiB. Plane1 has only even blocks such as block0, block2, block4
     63	  while Plane2 has only odd blocks such as block1, block3, block5.
     64	  So MTD regards it as 4KiB page size and 256KiB block size
     65
     66	  Now the following chips support it. (KFXXX16Q2M)
     67	    Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
     68	    Mux:   KFM2G16Q2M, KFN4G16Q2M,
     69
     70	  And more recent chips
     71
     72endif # MTD_ONENAND