cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

internals.h (5819B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (c) 2018 - Bootlin
      4 *
      5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
      6 *
      7 * Header containing internal definitions to be used only by core files.
      8 * NAND controller drivers should not include this file.
      9 */
     10
     11#ifndef __LINUX_RAWNAND_INTERNALS
     12#define __LINUX_RAWNAND_INTERNALS
     13
     14#include <linux/mtd/rawnand.h>
     15
     16/*
     17 * NAND Flash Manufacturer ID Codes
     18 */
     19#define NAND_MFR_AMD		0x01
     20#define NAND_MFR_ATO		0x9b
     21#define NAND_MFR_EON		0x92
     22#define NAND_MFR_ESMT		0xc8
     23#define NAND_MFR_FUJITSU	0x04
     24#define NAND_MFR_HYNIX		0xad
     25#define NAND_MFR_INTEL		0x89
     26#define NAND_MFR_MACRONIX	0xc2
     27#define NAND_MFR_MICRON		0x2c
     28#define NAND_MFR_NATIONAL	0x8f
     29#define NAND_MFR_RENESAS	0x07
     30#define NAND_MFR_SAMSUNG	0xec
     31#define NAND_MFR_SANDISK	0x45
     32#define NAND_MFR_STMICRO	0x20
     33/* Kioxia is new name of Toshiba memory. */
     34#define NAND_MFR_TOSHIBA	0x98
     35#define NAND_MFR_WINBOND	0xef
     36
     37/**
     38 * struct nand_manufacturer_ops - NAND Manufacturer operations
     39 * @detect: detect the NAND memory organization and capabilities
     40 * @init: initialize all vendor specific fields (like the ->read_retry()
     41 *	  implementation) if any.
     42 * @cleanup: the ->init() function may have allocated resources, ->cleanup()
     43 *	     is here to let vendor specific code release those resources.
     44 * @fixup_onfi_param_page: apply vendor specific fixups to the ONFI parameter
     45 *			   page. This is called after the checksum is verified.
     46 */
     47struct nand_manufacturer_ops {
     48	void (*detect)(struct nand_chip *chip);
     49	int (*init)(struct nand_chip *chip);
     50	void (*cleanup)(struct nand_chip *chip);
     51	void (*fixup_onfi_param_page)(struct nand_chip *chip,
     52				      struct nand_onfi_params *p);
     53};
     54
     55/**
     56 * struct nand_manufacturer_desc - NAND Flash Manufacturer descriptor
     57 * @name: Manufacturer name
     58 * @id: manufacturer ID code of device.
     59 * @ops: manufacturer operations
     60 */
     61struct nand_manufacturer_desc {
     62	int id;
     63	char *name;
     64	const struct nand_manufacturer_ops *ops;
     65};
     66
     67
     68extern struct nand_flash_dev nand_flash_ids[];
     69
     70extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
     71extern const struct nand_manufacturer_ops esmt_nand_manuf_ops;
     72extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
     73extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
     74extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
     75extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
     76extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
     77
     78/* MLC pairing schemes */
     79extern const struct mtd_pairing_scheme dist3_pairing_scheme;
     80
     81/* Core functions */
     82const struct nand_manufacturer_desc *nand_get_manufacturer_desc(u8 id);
     83int nand_bbm_get_next_page(struct nand_chip *chip, int page);
     84int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs);
     85int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
     86		    int allowbbt);
     87void onfi_fill_interface_config(struct nand_chip *chip,
     88				struct nand_interface_config *iface,
     89				enum nand_interface_type type,
     90				unsigned int timing_mode);
     91unsigned int
     92onfi_find_closest_sdr_mode(const struct nand_sdr_timings *spec_timings);
     93unsigned int
     94onfi_find_closest_nvddr_mode(const struct nand_nvddr_timings *spec_timings);
     95int nand_choose_best_sdr_timings(struct nand_chip *chip,
     96				 struct nand_interface_config *iface,
     97				 struct nand_sdr_timings *spec_timings);
     98int nand_choose_best_nvddr_timings(struct nand_chip *chip,
     99				   struct nand_interface_config *iface,
    100				   struct nand_nvddr_timings *spec_timings);
    101const struct nand_interface_config *nand_get_reset_interface_config(void);
    102int nand_get_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
    103int nand_set_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
    104int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,
    105			       int oob_required, int page);
    106int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf,
    107				int oob_required, int page);
    108int nand_exit_status_op(struct nand_chip *chip);
    109int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
    110			    unsigned int len);
    111void nand_decode_ext_id(struct nand_chip *chip);
    112void panic_nand_wait(struct nand_chip *chip, unsigned long timeo);
    113void sanitize_string(uint8_t *s, size_t len);
    114
    115static inline bool nand_has_exec_op(struct nand_chip *chip)
    116{
    117	if (!chip->controller || !chip->controller->ops ||
    118	    !chip->controller->ops->exec_op)
    119		return false;
    120
    121	return true;
    122}
    123
    124static inline int nand_check_op(struct nand_chip *chip,
    125				const struct nand_operation *op)
    126{
    127	if (!nand_has_exec_op(chip))
    128		return 0;
    129
    130	return chip->controller->ops->exec_op(chip, op, true);
    131}
    132
    133static inline int nand_exec_op(struct nand_chip *chip,
    134			       const struct nand_operation *op)
    135{
    136	if (!nand_has_exec_op(chip))
    137		return -ENOTSUPP;
    138
    139	if (WARN_ON(op->cs >= nanddev_ntargets(&chip->base)))
    140		return -EINVAL;
    141
    142	return chip->controller->ops->exec_op(chip, op, false);
    143}
    144
    145static inline bool nand_controller_can_setup_interface(struct nand_chip *chip)
    146{
    147	if (!chip->controller || !chip->controller->ops ||
    148	    !chip->controller->ops->setup_interface)
    149		return false;
    150
    151	if (chip->options & NAND_KEEP_TIMINGS)
    152		return false;
    153
    154	return true;
    155}
    156
    157/* BBT functions */
    158int nand_markbad_bbt(struct nand_chip *chip, loff_t offs);
    159int nand_isreserved_bbt(struct nand_chip *chip, loff_t offs);
    160int nand_isbad_bbt(struct nand_chip *chip, loff_t offs, int allowbbt);
    161
    162/* Legacy */
    163void nand_legacy_set_defaults(struct nand_chip *chip);
    164void nand_legacy_adjust_cmdfunc(struct nand_chip *chip);
    165int nand_legacy_check_hooks(struct nand_chip *chip);
    166
    167/* ONFI functions */
    168u16 onfi_crc16(u16 crc, u8 const *p, size_t len);
    169int nand_onfi_detect(struct nand_chip *chip);
    170
    171/* JEDEC functions */
    172int nand_jedec_detect(struct nand_chip *chip);
    173
    174#endif /* __LINUX_RAWNAND_INTERNALS */