cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (2535B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2menuconfig MTD_SPI_NOR
      3	tristate "SPI NOR device support"
      4	depends on MTD
      5	depends on MTD && SPI_MASTER
      6	select SPI_MEM
      7	help
      8	  This is the framework for the SPI NOR which can be used by the SPI
      9	  device drivers and the SPI NOR device driver.
     10
     11if MTD_SPI_NOR
     12
     13config MTD_SPI_NOR_USE_4K_SECTORS
     14	bool "Use small 4096 B erase sectors"
     15	default y
     16	help
     17	  Many flash memories support erasing small (4096 B) sectors. Depending
     18	  on the usage this feature may provide performance gain in comparison
     19	  to erasing whole blocks (32/64 KiB).
     20	  Changing a small part of the flash's contents is usually faster with
     21	  small sectors. On the other hand erasing should be faster when using
     22	  64 KiB block instead of 16 × 4 KiB sectors.
     23
     24	  Please note that some tools/drivers/filesystems may not work with
     25	  4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
     26
     27choice
     28	prompt "Software write protection at boot"
     29	default MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE
     30
     31config MTD_SPI_NOR_SWP_DISABLE
     32	bool "Disable SWP on any flashes (legacy behavior)"
     33	help
     34	  This option disables the software write protection on any SPI
     35	  flashes at boot-up.
     36
     37	  Depending on the flash chip this either clears the block protection
     38	  bits or does a "Global Unprotect" command.
     39
     40	  Don't use this if you intent to use the software write protection
     41	  of your SPI flash. This is only to keep backwards compatibility.
     42
     43config MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE
     44	bool "Disable SWP on flashes w/ volatile protection bits"
     45	help
     46	  Some SPI flashes have volatile block protection bits, ie. after a
     47	  power-up or a reset the flash is software write protected by
     48	  default.
     49
     50	  This option disables the software write protection for these kind
     51	  of flashes while keeping it enabled for any other SPI flashes
     52	  which have non-volatile write protection bits.
     53
     54	  If the software write protection will be disabled depending on
     55	  the flash either the block protection bits are cleared or a
     56	  "Global Unprotect" command is issued.
     57
     58	  If you are unsure, select this option.
     59
     60config MTD_SPI_NOR_SWP_KEEP
     61	bool "Keep software write protection as is"
     62	help
     63	  If you select this option the software write protection of any
     64	  SPI flashes will not be changed. If your flash is software write
     65	  protected or will be automatically software write protected after
     66	  power-up you have to manually unlock it before you are able to
     67	  write to it.
     68
     69endchoice
     70
     71source "drivers/mtd/spi-nor/controllers/Kconfig"
     72
     73endif # MTD_SPI_NOR