stnic.c (7455B)
1/* stnic.c : A SH7750 specific part of driver for NS DP83902A ST-NIC. 2 * 3 * This file is subject to the terms and conditions of the GNU General Public 4 * License. See the file "COPYING" in the main directory of this archive 5 * for more details. 6 * 7 * Copyright (C) 1999 kaz Kojima 8 */ 9 10#include <linux/module.h> 11#include <linux/kernel.h> 12#include <linux/errno.h> 13#include <linux/interrupt.h> 14#include <linux/ioport.h> 15#include <linux/netdevice.h> 16#include <linux/etherdevice.h> 17#include <linux/init.h> 18#include <linux/delay.h> 19 20#include <asm/io.h> 21#include <mach-se/mach/se.h> 22#include <asm/machvec.h> 23#ifdef CONFIG_SH_STANDARD_BIOS 24#include <asm/sh_bios.h> 25#endif 26 27#include "8390.h" 28 29#define DRV_NAME "stnic" 30 31#define byte unsigned char 32#define half unsigned short 33#define word unsigned int 34#define vbyte volatile unsigned char 35#define vhalf volatile unsigned short 36#define vword volatile unsigned int 37 38#define STNIC_RUN 0x01 /* 1 == Run, 0 == reset. */ 39 40#define START_PG 0 /* First page of TX buffer */ 41#define STOP_PG 128 /* Last page +1 of RX ring */ 42 43/* Alias */ 44#define STNIC_CR E8390_CMD 45#define PG0_RSAR0 EN0_RSARLO 46#define PG0_RSAR1 EN0_RSARHI 47#define PG0_RBCR0 EN0_RCNTLO 48#define PG0_RBCR1 EN0_RCNTHI 49 50#define CR_RRD E8390_RREAD 51#define CR_RWR E8390_RWRITE 52#define CR_PG0 E8390_PAGE0 53#define CR_STA E8390_START 54#define CR_RDMA E8390_NODMA 55 56/* FIXME! YOU MUST SET YOUR OWN ETHER ADDRESS. */ 57static byte stnic_eadr[6] = 58{0x00, 0xc0, 0x6e, 0x00, 0x00, 0x07}; 59 60static struct net_device *stnic_dev; 61 62static void stnic_reset (struct net_device *dev); 63static void stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr, 64 int ring_page); 65static void stnic_block_input (struct net_device *dev, int count, 66 struct sk_buff *skb , int ring_offset); 67static void stnic_block_output (struct net_device *dev, int count, 68 const unsigned char *buf, int start_page); 69 70static void stnic_init (struct net_device *dev); 71 72static u32 stnic_msg_enable; 73 74module_param_named(msg_enable, stnic_msg_enable, uint, 0444); 75MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)"); 76 77/* SH7750 specific read/write io. */ 78static inline void 79STNIC_DELAY (void) 80{ 81 vword trash; 82 trash = *(vword *) 0xa0000000; 83 trash = *(vword *) 0xa0000000; 84 trash = *(vword *) 0xa0000000; 85} 86 87static inline byte 88STNIC_READ (int reg) 89{ 90 byte val; 91 92 val = (*(vhalf *) (PA_83902 + ((reg) << 1)) >> 8) & 0xff; 93 STNIC_DELAY (); 94 return val; 95} 96 97static inline void 98STNIC_WRITE (int reg, byte val) 99{ 100 *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8); 101 STNIC_DELAY (); 102} 103 104static int __init stnic_probe(void) 105{ 106 struct net_device *dev; 107 struct ei_device *ei_local; 108 int err; 109 110 /* If we are not running on a SolutionEngine, give up now */ 111 if (! MACH_SE) 112 return -ENODEV; 113 114 /* New style probing API */ 115 dev = alloc_ei_netdev(); 116 if (!dev) 117 return -ENOMEM; 118 119#ifdef CONFIG_SH_STANDARD_BIOS 120 sh_bios_get_node_addr (stnic_eadr); 121#endif 122 eth_hw_addr_set(dev, stnic_eadr); 123 124 /* Set the base address to point to the NIC, not the "real" base! */ 125 dev->base_addr = 0x1000; 126 dev->irq = IRQ_STNIC; 127 dev->netdev_ops = &ei_netdev_ops; 128 129 /* Snarf the interrupt now. There's no point in waiting since we cannot 130 share and the board will usually be enabled. */ 131 err = request_irq (dev->irq, ei_interrupt, 0, DRV_NAME, dev); 132 if (err) { 133 netdev_emerg(dev, " unable to get IRQ %d.\n", dev->irq); 134 free_netdev(dev); 135 return err; 136 } 137 138 ei_status.name = dev->name; 139 ei_status.word16 = 1; 140#ifdef __LITTLE_ENDIAN__ 141 ei_status.bigendian = 0; 142#else 143 ei_status.bigendian = 1; 144#endif 145 ei_status.tx_start_page = START_PG; 146 ei_status.rx_start_page = START_PG + TX_PAGES; 147 ei_status.stop_page = STOP_PG; 148 149 ei_status.reset_8390 = &stnic_reset; 150 ei_status.get_8390_hdr = &stnic_get_hdr; 151 ei_status.block_input = &stnic_block_input; 152 ei_status.block_output = &stnic_block_output; 153 154 stnic_init (dev); 155 ei_local = netdev_priv(dev); 156 ei_local->msg_enable = stnic_msg_enable; 157 158 err = register_netdev(dev); 159 if (err) { 160 free_irq(dev->irq, dev); 161 free_netdev(dev); 162 return err; 163 } 164 stnic_dev = dev; 165 166 netdev_info(dev, "NS ST-NIC 83902A\n"); 167 168 return 0; 169} 170 171static void 172stnic_reset (struct net_device *dev) 173{ 174 struct ei_device *ei_local = netdev_priv(dev); 175 176 *(vhalf *) PA_83902_RST = 0; 177 udelay (5); 178 netif_warn(ei_local, hw, dev, "8390 reset done (%ld).\n", jiffies); 179 *(vhalf *) PA_83902_RST = ~0; 180 udelay (5); 181} 182 183static void 184stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr, 185 int ring_page) 186{ 187 struct ei_device *ei_local = netdev_priv(dev); 188 189 half buf[2]; 190 191 STNIC_WRITE (PG0_RSAR0, 0); 192 STNIC_WRITE (PG0_RSAR1, ring_page); 193 STNIC_WRITE (PG0_RBCR0, 4); 194 STNIC_WRITE (PG0_RBCR1, 0); 195 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA); 196 197 buf[0] = *(vhalf *) PA_83902_IF; 198 STNIC_DELAY (); 199 buf[1] = *(vhalf *) PA_83902_IF; 200 STNIC_DELAY (); 201 hdr->next = buf[0] >> 8; 202 hdr->status = buf[0] & 0xff; 203#ifdef __LITTLE_ENDIAN__ 204 hdr->count = buf[1]; 205#else 206 hdr->count = ((buf[1] >> 8) & 0xff) | (buf[1] << 8); 207#endif 208 209 netif_dbg(ei_local, probe, dev, "ring %x status %02x next %02x count %04x.\n", 210 ring_page, hdr->status, hdr->next, hdr->count); 211 212 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA); 213} 214 215/* Block input and output, similar to the Crynwr packet driver. If you are 216 porting to a new ethercard look at the packet driver source for hints. 217 The HP LAN doesn't use shared memory -- we put the packet 218 out through the "remote DMA" dataport. */ 219 220static void 221stnic_block_input (struct net_device *dev, int length, struct sk_buff *skb, 222 int offset) 223{ 224 char *buf = skb->data; 225 half val; 226 227 STNIC_WRITE (PG0_RSAR0, offset & 0xff); 228 STNIC_WRITE (PG0_RSAR1, offset >> 8); 229 STNIC_WRITE (PG0_RBCR0, length & 0xff); 230 STNIC_WRITE (PG0_RBCR1, length >> 8); 231 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA); 232 233 if (length & 1) 234 length++; 235 236 while (length > 0) 237 { 238 val = *(vhalf *) PA_83902_IF; 239#ifdef __LITTLE_ENDIAN__ 240 *buf++ = val & 0xff; 241 *buf++ = val >> 8; 242#else 243 *buf++ = val >> 8; 244 *buf++ = val & 0xff; 245#endif 246 STNIC_DELAY (); 247 length -= sizeof (half); 248 } 249 250 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA); 251} 252 253static void 254stnic_block_output (struct net_device *dev, int length, 255 const unsigned char *buf, int output_page) 256{ 257 STNIC_WRITE (PG0_RBCR0, 1); /* Write non-zero value */ 258 STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA); 259 STNIC_DELAY (); 260 261 STNIC_WRITE (PG0_RBCR0, length & 0xff); 262 STNIC_WRITE (PG0_RBCR1, length >> 8); 263 STNIC_WRITE (PG0_RSAR0, 0); 264 STNIC_WRITE (PG0_RSAR1, output_page); 265 STNIC_WRITE (STNIC_CR, CR_RWR | CR_PG0 | CR_STA); 266 267 if (length & 1) 268 length++; 269 270 while (length > 0) 271 { 272#ifdef __LITTLE_ENDIAN__ 273 *(vhalf *) PA_83902_IF = ((half) buf[1] << 8) | buf[0]; 274#else 275 *(vhalf *) PA_83902_IF = ((half) buf[0] << 8) | buf[1]; 276#endif 277 STNIC_DELAY (); 278 buf += sizeof (half); 279 length -= sizeof (half); 280 } 281 282 STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA); 283} 284 285/* This function resets the STNIC if something screws up. */ 286static void 287stnic_init (struct net_device *dev) 288{ 289 stnic_reset (dev); 290 NS8390_init (dev, 0); 291} 292 293static void __exit stnic_cleanup(void) 294{ 295 unregister_netdev(stnic_dev); 296 free_irq(stnic_dev->irq, stnic_dev); 297 free_netdev(stnic_dev); 298} 299 300module_init(stnic_probe); 301module_exit(stnic_cleanup); 302MODULE_LICENSE("GPL");