cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hplance.h (1355B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Random defines and structures for the HP Lance driver.
      3 * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
      4 * Based on the Sun Lance driver and the NetBSD HP Lance driver
      5 */
      6
      7/* Registers */
      8#define HPLANCE_ID		0x01		/* DIO register: ID byte */
      9#define HPLANCE_STATUS		0x03		/* DIO register: interrupt enable/status */
     10
     11/* Control and status bits for the status register */
     12#define LE_IE 0x80                                /* interrupt enable */
     13#define LE_IR 0x40                                /* interrupt requested */
     14#define LE_LOCK 0x08                              /* lock status register */
     15#define LE_ACK 0x04                               /* ack of lock */
     16#define LE_JAB 0x02                               /* loss of tx clock (???) */
     17/* We can also extract the IPL from the status register with the standard
     18 * DIO_IPL(hplance) macro, or using dio_scodetoipl()
     19 */
     20
     21/* These are the offsets for the DIO regs (hplance_reg), lance_ioreg,
     22 * memory and NVRAM:
     23 */
     24#define HPLANCE_IDOFF 0                           /* board baseaddr */
     25#define HPLANCE_REGOFF 0x4000                     /* lance registers */
     26#define HPLANCE_MEMOFF 0x8000                     /* struct lance_init_block */
     27#define HPLANCE_NVRAMOFF 0xC008                   /* etheraddress as one *nibble* per byte */