cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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sunlance.c (40363B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
      3 * lance.c: Linux/Sparc/Lance driver
      4 *
      5 *	Written 1995, 1996 by Miguel de Icaza
      6 * Sources:
      7 *	The Linux  depca driver
      8 *	The Linux  lance driver.
      9 *	The Linux  skeleton driver.
     10 *	The NetBSD Sparc/Lance driver.
     11 *	Theo de Raadt (deraadt@openbsd.org)
     12 *	NCR92C990 Lan Controller manual
     13 *
     14 * 1.4:
     15 *	Added support to run with a ledma on the Sun4m
     16 *
     17 * 1.5:
     18 *	Added multiple card detection.
     19 *
     20 *	 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
     21 *		  (ecd@skynet.be)
     22 *
     23 *	 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
     24 *		  (ecd@skynet.be)
     25 *
     26 *	 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
     27 *		  (davem@caip.rutgers.edu)
     28 *
     29 *	 5/29/96: override option 'tpe-link-test?', if it is 'false', as
     30 *		  this disables auto carrier detection on sun4m. Eddie C. Dost
     31 *		  (ecd@skynet.be)
     32 *
     33 * 1.7:
     34 *	 6/26/96: Bug fix for multiple ledmas, miguel.
     35 *
     36 * 1.8:
     37 *		  Stole multicast code from depca.c, fixed lance_tx.
     38 *
     39 * 1.9:
     40 *	 8/21/96: Fixed the multicast code (Pedro Roque)
     41 *
     42 *	 8/28/96: Send fake packet in lance_open() if auto_select is true,
     43 *		  so we can detect the carrier loss condition in time.
     44 *		  Eddie C. Dost (ecd@skynet.be)
     45 *
     46 *	 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
     47 *		  MNA trap during chksum_partial_copy(). (ecd@skynet.be)
     48 *
     49 *	11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
     50 *
     51 *	12/22/96: Don't loop forever in lance_rx() on incomplete packets.
     52 *		  This was the sun4c killer. Shit, stupid bug.
     53 *		  (ecd@skynet.be)
     54 *
     55 * 1.10:
     56 *	 1/26/97: Modularize driver. (ecd@skynet.be)
     57 *
     58 * 1.11:
     59 *	12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
     60 *
     61 * 1.12:
     62 * 	 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
     63 * 	          Anton Blanchard (anton@progsoc.uts.edu.au)
     64 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
     65 *		  David S. Miller (davem@redhat.com)
     66 * 2.01:
     67 *      11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
     68 *
     69 */
     70
     71#undef DEBUG_DRIVER
     72
     73static char lancestr[] = "LANCE";
     74
     75#include <linux/module.h>
     76#include <linux/kernel.h>
     77#include <linux/types.h>
     78#include <linux/fcntl.h>
     79#include <linux/interrupt.h>
     80#include <linux/ioport.h>
     81#include <linux/in.h>
     82#include <linux/string.h>
     83#include <linux/delay.h>
     84#include <linux/crc32.h>
     85#include <linux/errno.h>
     86#include <linux/socket.h> /* Used for the temporal inet entries and routing */
     87#include <linux/route.h>
     88#include <linux/netdevice.h>
     89#include <linux/etherdevice.h>
     90#include <linux/skbuff.h>
     91#include <linux/ethtool.h>
     92#include <linux/bitops.h>
     93#include <linux/dma-mapping.h>
     94#include <linux/of.h>
     95#include <linux/of_device.h>
     96#include <linux/gfp.h>
     97#include <linux/pgtable.h>
     98
     99#include <asm/io.h>
    100#include <asm/dma.h>
    101#include <asm/byteorder.h>	/* Used by the checksum routines */
    102#include <asm/idprom.h>
    103#include <asm/prom.h>
    104#include <asm/auxio.h>		/* For tpe-link-test? setting */
    105#include <asm/irq.h>
    106
    107#define DRV_NAME	"sunlance"
    108#define DRV_RELDATE	"8/24/03"
    109#define DRV_AUTHOR	"Miguel de Icaza (miguel@nuclecu.unam.mx)"
    110
    111MODULE_AUTHOR(DRV_AUTHOR);
    112MODULE_DESCRIPTION("Sun Lance ethernet driver");
    113MODULE_LICENSE("GPL");
    114
    115/* Define: 2^4 Tx buffers and 2^4 Rx buffers */
    116#ifndef LANCE_LOG_TX_BUFFERS
    117#define LANCE_LOG_TX_BUFFERS 4
    118#define LANCE_LOG_RX_BUFFERS 4
    119#endif
    120
    121#define LE_CSR0 0
    122#define LE_CSR1 1
    123#define LE_CSR2 2
    124#define LE_CSR3 3
    125
    126#define LE_MO_PROM      0x8000  /* Enable promiscuous mode */
    127
    128#define	LE_C0_ERR	0x8000	/* Error: set if BAB, SQE, MISS or ME is set */
    129#define	LE_C0_BABL	0x4000	/* BAB:  Babble: tx timeout. */
    130#define	LE_C0_CERR	0x2000	/* SQE:  Signal quality error */
    131#define	LE_C0_MISS	0x1000	/* MISS: Missed a packet */
    132#define	LE_C0_MERR	0x0800	/* ME:   Memory error */
    133#define	LE_C0_RINT	0x0400	/* Received interrupt */
    134#define	LE_C0_TINT	0x0200	/* Transmitter Interrupt */
    135#define	LE_C0_IDON	0x0100	/* IFIN: Init finished. */
    136#define	LE_C0_INTR	0x0080	/* Interrupt or error */
    137#define	LE_C0_INEA	0x0040	/* Interrupt enable */
    138#define	LE_C0_RXON	0x0020	/* Receiver on */
    139#define	LE_C0_TXON	0x0010	/* Transmitter on */
    140#define	LE_C0_TDMD	0x0008	/* Transmitter demand */
    141#define	LE_C0_STOP	0x0004	/* Stop the card */
    142#define	LE_C0_STRT	0x0002	/* Start the card */
    143#define	LE_C0_INIT	0x0001	/* Init the card */
    144
    145#define	LE_C3_BSWP	0x4     /* SWAP */
    146#define	LE_C3_ACON	0x2	/* ALE Control */
    147#define	LE_C3_BCON	0x1	/* Byte control */
    148
    149/* Receive message descriptor 1 */
    150#define LE_R1_OWN       0x80    /* Who owns the entry */
    151#define LE_R1_ERR       0x40    /* Error: if FRA, OFL, CRC or BUF is set */
    152#define LE_R1_FRA       0x20    /* FRA: Frame error */
    153#define LE_R1_OFL       0x10    /* OFL: Frame overflow */
    154#define LE_R1_CRC       0x08    /* CRC error */
    155#define LE_R1_BUF       0x04    /* BUF: Buffer error */
    156#define LE_R1_SOP       0x02    /* Start of packet */
    157#define LE_R1_EOP       0x01    /* End of packet */
    158#define LE_R1_POK       0x03    /* Packet is complete: SOP + EOP */
    159
    160#define LE_T1_OWN       0x80    /* Lance owns the packet */
    161#define LE_T1_ERR       0x40    /* Error summary */
    162#define LE_T1_EMORE     0x10    /* Error: more than one retry needed */
    163#define LE_T1_EONE      0x08    /* Error: one retry needed */
    164#define LE_T1_EDEF      0x04    /* Error: deferred */
    165#define LE_T1_SOP       0x02    /* Start of packet */
    166#define LE_T1_EOP       0x01    /* End of packet */
    167#define LE_T1_POK	0x03	/* Packet is complete: SOP + EOP */
    168
    169#define LE_T3_BUF       0x8000  /* Buffer error */
    170#define LE_T3_UFL       0x4000  /* Error underflow */
    171#define LE_T3_LCOL      0x1000  /* Error late collision */
    172#define LE_T3_CLOS      0x0800  /* Error carrier loss */
    173#define LE_T3_RTY       0x0400  /* Error retry */
    174#define LE_T3_TDR       0x03ff  /* Time Domain Reflectometry counter */
    175
    176#define TX_RING_SIZE			(1 << (LANCE_LOG_TX_BUFFERS))
    177#define TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
    178#define TX_RING_LEN_BITS		((LANCE_LOG_TX_BUFFERS) << 29)
    179#define TX_NEXT(__x)			(((__x)+1) & TX_RING_MOD_MASK)
    180
    181#define RX_RING_SIZE			(1 << (LANCE_LOG_RX_BUFFERS))
    182#define RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
    183#define RX_RING_LEN_BITS		((LANCE_LOG_RX_BUFFERS) << 29)
    184#define RX_NEXT(__x)			(((__x)+1) & RX_RING_MOD_MASK)
    185
    186#define PKT_BUF_SZ		1544
    187#define RX_BUFF_SIZE            PKT_BUF_SZ
    188#define TX_BUFF_SIZE            PKT_BUF_SZ
    189
    190struct lance_rx_desc {
    191	u16	rmd0;		/* low address of packet */
    192	u8	rmd1_bits;	/* descriptor bits */
    193	u8	rmd1_hadr;	/* high address of packet */
    194	s16	length;		/* This length is 2s complement (negative)!
    195				 * Buffer length
    196				 */
    197	u16	mblength;	/* This is the actual number of bytes received */
    198};
    199
    200struct lance_tx_desc {
    201	u16	tmd0;		/* low address of packet */
    202	u8 	tmd1_bits;	/* descriptor bits */
    203	u8 	tmd1_hadr;	/* high address of packet */
    204	s16 	length;		/* Length is 2s complement (negative)! */
    205	u16 	misc;
    206};
    207
    208/* The LANCE initialization block, described in databook. */
    209/* On the Sparc, this block should be on a DMA region     */
    210struct lance_init_block {
    211	u16	mode;		/* Pre-set mode (reg. 15) */
    212	u8	phys_addr[6];	/* Physical ethernet address */
    213	u32	filter[2];	/* Multicast filter. */
    214
    215	/* Receive and transmit ring base, along with extra bits. */
    216	u16	rx_ptr;		/* receive descriptor addr */
    217	u16	rx_len;		/* receive len and high addr */
    218	u16	tx_ptr;		/* transmit descriptor addr */
    219	u16	tx_len;		/* transmit len and high addr */
    220
    221	/* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
    222	struct lance_rx_desc brx_ring[RX_RING_SIZE];
    223	struct lance_tx_desc btx_ring[TX_RING_SIZE];
    224
    225	u8	tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
    226	u8	pad[2];		/* align rx_buf for copy_and_sum(). */
    227	u8	rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
    228};
    229
    230#define libdesc_offset(rt, elem) \
    231((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
    232
    233#define libbuff_offset(rt, elem) \
    234((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
    235
    236struct lance_private {
    237	void __iomem	*lregs;		/* Lance RAP/RDP regs.		*/
    238	void __iomem	*dregs;		/* DMA controller regs.		*/
    239	struct lance_init_block __iomem *init_block_iomem;
    240	struct lance_init_block *init_block_mem;
    241
    242	spinlock_t	lock;
    243
    244	int		rx_new, tx_new;
    245	int		rx_old, tx_old;
    246
    247	struct platform_device *ledma;	/* If set this points to ledma	*/
    248	char		tpe;		/* cable-selection is TPE	*/
    249	char		auto_select;	/* cable-selection by carrier	*/
    250	char		burst_sizes;	/* ledma SBus burst sizes	*/
    251	char		pio_buffer;	/* init block in PIO space?	*/
    252
    253	unsigned short	busmaster_regval;
    254
    255	void (*init_ring)(struct net_device *);
    256	void (*rx)(struct net_device *);
    257	void (*tx)(struct net_device *);
    258
    259	char	       	       *name;
    260	dma_addr_t		init_block_dvma;
    261	struct net_device      *dev;		  /* Backpointer	*/
    262	struct platform_device       *op;
    263	struct platform_device       *lebuffer;
    264	struct timer_list       multicast_timer;
    265};
    266
    267#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
    268			lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
    269			lp->tx_old - lp->tx_new-1)
    270
    271/* Lance registers. */
    272#define RDP		0x00UL		/* register data port		*/
    273#define RAP		0x02UL		/* register address port	*/
    274#define LANCE_REG_SIZE	0x04UL
    275
    276#define STOP_LANCE(__lp) \
    277do {	void __iomem *__base = (__lp)->lregs; \
    278	sbus_writew(LE_CSR0,	__base + RAP); \
    279	sbus_writew(LE_C0_STOP,	__base + RDP); \
    280} while (0)
    281
    282int sparc_lance_debug = 2;
    283
    284/* The Lance uses 24 bit addresses */
    285/* On the Sun4c the DVMA will provide the remaining bytes for us */
    286/* On the Sun4m we have to instruct the ledma to provide them    */
    287/* Even worse, on scsi/ether SBUS cards, the init block and the
    288 * transmit/receive buffers are addresses as offsets from absolute
    289 * zero on the lebuffer PIO area. -DaveM
    290 */
    291
    292#define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
    293
    294/* Load the CSR registers */
    295static void load_csrs(struct lance_private *lp)
    296{
    297	u32 leptr;
    298
    299	if (lp->pio_buffer)
    300		leptr = 0;
    301	else
    302		leptr = LANCE_ADDR(lp->init_block_dvma);
    303
    304	sbus_writew(LE_CSR1,		  lp->lregs + RAP);
    305	sbus_writew(leptr & 0xffff,	  lp->lregs + RDP);
    306	sbus_writew(LE_CSR2,		  lp->lregs + RAP);
    307	sbus_writew(leptr >> 16,	  lp->lregs + RDP);
    308	sbus_writew(LE_CSR3,		  lp->lregs + RAP);
    309	sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
    310
    311	/* Point back to csr0 */
    312	sbus_writew(LE_CSR0, lp->lregs + RAP);
    313}
    314
    315/* Setup the Lance Rx and Tx rings */
    316static void lance_init_ring_dvma(struct net_device *dev)
    317{
    318	struct lance_private *lp = netdev_priv(dev);
    319	struct lance_init_block *ib = lp->init_block_mem;
    320	dma_addr_t aib = lp->init_block_dvma;
    321	__u32 leptr;
    322	int i;
    323
    324	/* Lock out other processes while setting up hardware */
    325	netif_stop_queue(dev);
    326	lp->rx_new = lp->tx_new = 0;
    327	lp->rx_old = lp->tx_old = 0;
    328
    329	/* Copy the ethernet address to the lance init block
    330	 * Note that on the sparc you need to swap the ethernet address.
    331	 */
    332	ib->phys_addr [0] = dev->dev_addr [1];
    333	ib->phys_addr [1] = dev->dev_addr [0];
    334	ib->phys_addr [2] = dev->dev_addr [3];
    335	ib->phys_addr [3] = dev->dev_addr [2];
    336	ib->phys_addr [4] = dev->dev_addr [5];
    337	ib->phys_addr [5] = dev->dev_addr [4];
    338
    339	/* Setup the Tx ring entries */
    340	for (i = 0; i < TX_RING_SIZE; i++) {
    341		leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
    342		ib->btx_ring [i].tmd0      = leptr;
    343		ib->btx_ring [i].tmd1_hadr = leptr >> 16;
    344		ib->btx_ring [i].tmd1_bits = 0;
    345		ib->btx_ring [i].length    = 0xf000; /* The ones required by tmd2 */
    346		ib->btx_ring [i].misc      = 0;
    347	}
    348
    349	/* Setup the Rx ring entries */
    350	for (i = 0; i < RX_RING_SIZE; i++) {
    351		leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
    352
    353		ib->brx_ring [i].rmd0      = leptr;
    354		ib->brx_ring [i].rmd1_hadr = leptr >> 16;
    355		ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
    356		ib->brx_ring [i].length    = -RX_BUFF_SIZE | 0xf000;
    357		ib->brx_ring [i].mblength  = 0;
    358	}
    359
    360	/* Setup the initialization block */
    361
    362	/* Setup rx descriptor pointer */
    363	leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
    364	ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
    365	ib->rx_ptr = leptr;
    366
    367	/* Setup tx descriptor pointer */
    368	leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
    369	ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
    370	ib->tx_ptr = leptr;
    371}
    372
    373static void lance_init_ring_pio(struct net_device *dev)
    374{
    375	struct lance_private *lp = netdev_priv(dev);
    376	struct lance_init_block __iomem *ib = lp->init_block_iomem;
    377	u32 leptr;
    378	int i;
    379
    380	/* Lock out other processes while setting up hardware */
    381	netif_stop_queue(dev);
    382	lp->rx_new = lp->tx_new = 0;
    383	lp->rx_old = lp->tx_old = 0;
    384
    385	/* Copy the ethernet address to the lance init block
    386	 * Note that on the sparc you need to swap the ethernet address.
    387	 */
    388	sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
    389	sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
    390	sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
    391	sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
    392	sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
    393	sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
    394
    395	/* Setup the Tx ring entries */
    396	for (i = 0; i < TX_RING_SIZE; i++) {
    397		leptr = libbuff_offset(tx_buf, i);
    398		sbus_writew(leptr,	&ib->btx_ring [i].tmd0);
    399		sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
    400		sbus_writeb(0,		&ib->btx_ring [i].tmd1_bits);
    401
    402		/* The ones required by tmd2 */
    403		sbus_writew(0xf000,	&ib->btx_ring [i].length);
    404		sbus_writew(0,		&ib->btx_ring [i].misc);
    405	}
    406
    407	/* Setup the Rx ring entries */
    408	for (i = 0; i < RX_RING_SIZE; i++) {
    409		leptr = libbuff_offset(rx_buf, i);
    410
    411		sbus_writew(leptr,	&ib->brx_ring [i].rmd0);
    412		sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
    413		sbus_writeb(LE_R1_OWN,	&ib->brx_ring [i].rmd1_bits);
    414		sbus_writew(-RX_BUFF_SIZE|0xf000,
    415			    &ib->brx_ring [i].length);
    416		sbus_writew(0,		&ib->brx_ring [i].mblength);
    417	}
    418
    419	/* Setup the initialization block */
    420
    421	/* Setup rx descriptor pointer */
    422	leptr = libdesc_offset(brx_ring, 0);
    423	sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
    424		    &ib->rx_len);
    425	sbus_writew(leptr, &ib->rx_ptr);
    426
    427	/* Setup tx descriptor pointer */
    428	leptr = libdesc_offset(btx_ring, 0);
    429	sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
    430		    &ib->tx_len);
    431	sbus_writew(leptr, &ib->tx_ptr);
    432}
    433
    434static void init_restart_ledma(struct lance_private *lp)
    435{
    436	u32 csr = sbus_readl(lp->dregs + DMA_CSR);
    437
    438	if (!(csr & DMA_HNDL_ERROR)) {
    439		/* E-Cache draining */
    440		while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
    441			barrier();
    442	}
    443
    444	csr = sbus_readl(lp->dregs + DMA_CSR);
    445	csr &= ~DMA_E_BURSTS;
    446	if (lp->burst_sizes & DMA_BURST32)
    447		csr |= DMA_E_BURST32;
    448	else
    449		csr |= DMA_E_BURST16;
    450
    451	csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
    452
    453	if (lp->tpe)
    454		csr |= DMA_EN_ENETAUI;
    455	else
    456		csr &= ~DMA_EN_ENETAUI;
    457	udelay(20);
    458	sbus_writel(csr, lp->dregs + DMA_CSR);
    459	udelay(200);
    460}
    461
    462static int init_restart_lance(struct lance_private *lp)
    463{
    464	u16 regval = 0;
    465	int i;
    466
    467	if (lp->dregs)
    468		init_restart_ledma(lp);
    469
    470	sbus_writew(LE_CSR0,	lp->lregs + RAP);
    471	sbus_writew(LE_C0_INIT,	lp->lregs + RDP);
    472
    473	/* Wait for the lance to complete initialization */
    474	for (i = 0; i < 100; i++) {
    475		regval = sbus_readw(lp->lregs + RDP);
    476
    477		if (regval & (LE_C0_ERR | LE_C0_IDON))
    478			break;
    479		barrier();
    480	}
    481	if (i == 100 || (regval & LE_C0_ERR)) {
    482		printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
    483		       i, regval);
    484		if (lp->dregs)
    485			printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
    486		return -1;
    487	}
    488
    489	/* Clear IDON by writing a "1", enable interrupts and start lance */
    490	sbus_writew(LE_C0_IDON,			lp->lregs + RDP);
    491	sbus_writew(LE_C0_INEA | LE_C0_STRT,	lp->lregs + RDP);
    492
    493	if (lp->dregs) {
    494		u32 csr = sbus_readl(lp->dregs + DMA_CSR);
    495
    496		csr |= DMA_INT_ENAB;
    497		sbus_writel(csr, lp->dregs + DMA_CSR);
    498	}
    499
    500	return 0;
    501}
    502
    503static void lance_rx_dvma(struct net_device *dev)
    504{
    505	struct lance_private *lp = netdev_priv(dev);
    506	struct lance_init_block *ib = lp->init_block_mem;
    507	struct lance_rx_desc *rd;
    508	u8 bits;
    509	int len, entry = lp->rx_new;
    510	struct sk_buff *skb;
    511
    512	for (rd = &ib->brx_ring [entry];
    513	     !((bits = rd->rmd1_bits) & LE_R1_OWN);
    514	     rd = &ib->brx_ring [entry]) {
    515
    516		/* We got an incomplete frame? */
    517		if ((bits & LE_R1_POK) != LE_R1_POK) {
    518			dev->stats.rx_over_errors++;
    519			dev->stats.rx_errors++;
    520		} else if (bits & LE_R1_ERR) {
    521			/* Count only the end frame as a rx error,
    522			 * not the beginning
    523			 */
    524			if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
    525			if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
    526			if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
    527			if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
    528			if (bits & LE_R1_EOP) dev->stats.rx_errors++;
    529		} else {
    530			len = (rd->mblength & 0xfff) - 4;
    531			skb = netdev_alloc_skb(dev, len + 2);
    532
    533			if (skb == NULL) {
    534				dev->stats.rx_dropped++;
    535				rd->mblength = 0;
    536				rd->rmd1_bits = LE_R1_OWN;
    537				lp->rx_new = RX_NEXT(entry);
    538				return;
    539			}
    540
    541			dev->stats.rx_bytes += len;
    542
    543			skb_reserve(skb, 2);		/* 16 byte align */
    544			skb_put(skb, len);		/* make room */
    545			skb_copy_to_linear_data(skb,
    546					 (unsigned char *)&(ib->rx_buf [entry][0]),
    547					 len);
    548			skb->protocol = eth_type_trans(skb, dev);
    549			netif_rx(skb);
    550			dev->stats.rx_packets++;
    551		}
    552
    553		/* Return the packet to the pool */
    554		rd->mblength = 0;
    555		rd->rmd1_bits = LE_R1_OWN;
    556		entry = RX_NEXT(entry);
    557	}
    558
    559	lp->rx_new = entry;
    560}
    561
    562static void lance_tx_dvma(struct net_device *dev)
    563{
    564	struct lance_private *lp = netdev_priv(dev);
    565	struct lance_init_block *ib = lp->init_block_mem;
    566	int i, j;
    567
    568	spin_lock(&lp->lock);
    569
    570	j = lp->tx_old;
    571	for (i = j; i != lp->tx_new; i = j) {
    572		struct lance_tx_desc *td = &ib->btx_ring [i];
    573		u8 bits = td->tmd1_bits;
    574
    575		/* If we hit a packet not owned by us, stop */
    576		if (bits & LE_T1_OWN)
    577			break;
    578
    579		if (bits & LE_T1_ERR) {
    580			u16 status = td->misc;
    581
    582			dev->stats.tx_errors++;
    583			if (status & LE_T3_RTY)  dev->stats.tx_aborted_errors++;
    584			if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
    585
    586			if (status & LE_T3_CLOS) {
    587				dev->stats.tx_carrier_errors++;
    588				if (lp->auto_select) {
    589					lp->tpe = 1 - lp->tpe;
    590					printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
    591					       dev->name, lp->tpe?"TPE":"AUI");
    592					STOP_LANCE(lp);
    593					lp->init_ring(dev);
    594					load_csrs(lp);
    595					init_restart_lance(lp);
    596					goto out;
    597				}
    598			}
    599
    600			/* Buffer errors and underflows turn off the
    601			 * transmitter, restart the adapter.
    602			 */
    603			if (status & (LE_T3_BUF|LE_T3_UFL)) {
    604				dev->stats.tx_fifo_errors++;
    605
    606				printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
    607				       dev->name);
    608				STOP_LANCE(lp);
    609				lp->init_ring(dev);
    610				load_csrs(lp);
    611				init_restart_lance(lp);
    612				goto out;
    613			}
    614		} else if ((bits & LE_T1_POK) == LE_T1_POK) {
    615			/*
    616			 * So we don't count the packet more than once.
    617			 */
    618			td->tmd1_bits = bits & ~(LE_T1_POK);
    619
    620			/* One collision before packet was sent. */
    621			if (bits & LE_T1_EONE)
    622				dev->stats.collisions++;
    623
    624			/* More than one collision, be optimistic. */
    625			if (bits & LE_T1_EMORE)
    626				dev->stats.collisions += 2;
    627
    628			dev->stats.tx_packets++;
    629		}
    630
    631		j = TX_NEXT(j);
    632	}
    633	lp->tx_old = j;
    634out:
    635	if (netif_queue_stopped(dev) &&
    636	    TX_BUFFS_AVAIL > 0)
    637		netif_wake_queue(dev);
    638
    639	spin_unlock(&lp->lock);
    640}
    641
    642static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
    643{
    644	u16 *p16 = (u16 *) skb->data;
    645	u32 *p32;
    646	u8 *p8;
    647	void __iomem *pbuf = piobuf;
    648
    649	/* We know here that both src and dest are on a 16bit boundary. */
    650	*p16++ = sbus_readw(pbuf);
    651	p32 = (u32 *) p16;
    652	pbuf += 2;
    653	len -= 2;
    654
    655	while (len >= 4) {
    656		*p32++ = sbus_readl(pbuf);
    657		pbuf += 4;
    658		len -= 4;
    659	}
    660	p8 = (u8 *) p32;
    661	if (len >= 2) {
    662		p16 = (u16 *) p32;
    663		*p16++ = sbus_readw(pbuf);
    664		pbuf += 2;
    665		len -= 2;
    666		p8 = (u8 *) p16;
    667	}
    668	if (len >= 1)
    669		*p8 = sbus_readb(pbuf);
    670}
    671
    672static void lance_rx_pio(struct net_device *dev)
    673{
    674	struct lance_private *lp = netdev_priv(dev);
    675	struct lance_init_block __iomem *ib = lp->init_block_iomem;
    676	struct lance_rx_desc __iomem *rd;
    677	unsigned char bits;
    678	int len, entry;
    679	struct sk_buff *skb;
    680
    681	entry = lp->rx_new;
    682	for (rd = &ib->brx_ring [entry];
    683	     !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
    684	     rd = &ib->brx_ring [entry]) {
    685
    686		/* We got an incomplete frame? */
    687		if ((bits & LE_R1_POK) != LE_R1_POK) {
    688			dev->stats.rx_over_errors++;
    689			dev->stats.rx_errors++;
    690		} else if (bits & LE_R1_ERR) {
    691			/* Count only the end frame as a rx error,
    692			 * not the beginning
    693			 */
    694			if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
    695			if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
    696			if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
    697			if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
    698			if (bits & LE_R1_EOP) dev->stats.rx_errors++;
    699		} else {
    700			len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
    701			skb = netdev_alloc_skb(dev, len + 2);
    702
    703			if (skb == NULL) {
    704				dev->stats.rx_dropped++;
    705				sbus_writew(0, &rd->mblength);
    706				sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
    707				lp->rx_new = RX_NEXT(entry);
    708				return;
    709			}
    710
    711			dev->stats.rx_bytes += len;
    712
    713			skb_reserve (skb, 2);		/* 16 byte align */
    714			skb_put(skb, len);		/* make room */
    715			lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
    716			skb->protocol = eth_type_trans(skb, dev);
    717			netif_rx(skb);
    718			dev->stats.rx_packets++;
    719		}
    720
    721		/* Return the packet to the pool */
    722		sbus_writew(0, &rd->mblength);
    723		sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
    724		entry = RX_NEXT(entry);
    725	}
    726
    727	lp->rx_new = entry;
    728}
    729
    730static void lance_tx_pio(struct net_device *dev)
    731{
    732	struct lance_private *lp = netdev_priv(dev);
    733	struct lance_init_block __iomem *ib = lp->init_block_iomem;
    734	int i, j;
    735
    736	spin_lock(&lp->lock);
    737
    738	j = lp->tx_old;
    739	for (i = j; i != lp->tx_new; i = j) {
    740		struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
    741		u8 bits = sbus_readb(&td->tmd1_bits);
    742
    743		/* If we hit a packet not owned by us, stop */
    744		if (bits & LE_T1_OWN)
    745			break;
    746
    747		if (bits & LE_T1_ERR) {
    748			u16 status = sbus_readw(&td->misc);
    749
    750			dev->stats.tx_errors++;
    751			if (status & LE_T3_RTY)  dev->stats.tx_aborted_errors++;
    752			if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
    753
    754			if (status & LE_T3_CLOS) {
    755				dev->stats.tx_carrier_errors++;
    756				if (lp->auto_select) {
    757					lp->tpe = 1 - lp->tpe;
    758					printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
    759					       dev->name, lp->tpe?"TPE":"AUI");
    760					STOP_LANCE(lp);
    761					lp->init_ring(dev);
    762					load_csrs(lp);
    763					init_restart_lance(lp);
    764					goto out;
    765				}
    766			}
    767
    768			/* Buffer errors and underflows turn off the
    769			 * transmitter, restart the adapter.
    770			 */
    771			if (status & (LE_T3_BUF|LE_T3_UFL)) {
    772				dev->stats.tx_fifo_errors++;
    773
    774				printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
    775				       dev->name);
    776				STOP_LANCE(lp);
    777				lp->init_ring(dev);
    778				load_csrs(lp);
    779				init_restart_lance(lp);
    780				goto out;
    781			}
    782		} else if ((bits & LE_T1_POK) == LE_T1_POK) {
    783			/*
    784			 * So we don't count the packet more than once.
    785			 */
    786			sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
    787
    788			/* One collision before packet was sent. */
    789			if (bits & LE_T1_EONE)
    790				dev->stats.collisions++;
    791
    792			/* More than one collision, be optimistic. */
    793			if (bits & LE_T1_EMORE)
    794				dev->stats.collisions += 2;
    795
    796			dev->stats.tx_packets++;
    797		}
    798
    799		j = TX_NEXT(j);
    800	}
    801	lp->tx_old = j;
    802
    803	if (netif_queue_stopped(dev) &&
    804	    TX_BUFFS_AVAIL > 0)
    805		netif_wake_queue(dev);
    806out:
    807	spin_unlock(&lp->lock);
    808}
    809
    810static irqreturn_t lance_interrupt(int irq, void *dev_id)
    811{
    812	struct net_device *dev = dev_id;
    813	struct lance_private *lp = netdev_priv(dev);
    814	int csr0;
    815
    816	sbus_writew(LE_CSR0, lp->lregs + RAP);
    817	csr0 = sbus_readw(lp->lregs + RDP);
    818
    819	/* Acknowledge all the interrupt sources ASAP */
    820	sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
    821		    lp->lregs + RDP);
    822
    823	if ((csr0 & LE_C0_ERR) != 0) {
    824		/* Clear the error condition */
    825		sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
    826			     LE_C0_CERR | LE_C0_MERR),
    827			    lp->lregs + RDP);
    828	}
    829
    830	if (csr0 & LE_C0_RINT)
    831		lp->rx(dev);
    832
    833	if (csr0 & LE_C0_TINT)
    834		lp->tx(dev);
    835
    836	if (csr0 & LE_C0_BABL)
    837		dev->stats.tx_errors++;
    838
    839	if (csr0 & LE_C0_MISS)
    840		dev->stats.rx_errors++;
    841
    842	if (csr0 & LE_C0_MERR) {
    843		if (lp->dregs) {
    844			u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
    845
    846			printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
    847			       dev->name, csr0, addr & 0xffffff);
    848		} else {
    849			printk(KERN_ERR "%s: Memory error, status %04x\n",
    850			       dev->name, csr0);
    851		}
    852
    853		sbus_writew(LE_C0_STOP, lp->lregs + RDP);
    854
    855		if (lp->dregs) {
    856			u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
    857
    858			dma_csr |= DMA_FIFO_INV;
    859			sbus_writel(dma_csr, lp->dregs + DMA_CSR);
    860		}
    861
    862		lp->init_ring(dev);
    863		load_csrs(lp);
    864		init_restart_lance(lp);
    865		netif_wake_queue(dev);
    866	}
    867
    868	sbus_writew(LE_C0_INEA, lp->lregs + RDP);
    869
    870	return IRQ_HANDLED;
    871}
    872
    873/* Build a fake network packet and send it to ourselves. */
    874static void build_fake_packet(struct lance_private *lp)
    875{
    876	struct net_device *dev = lp->dev;
    877	int i, entry;
    878
    879	entry = lp->tx_new & TX_RING_MOD_MASK;
    880	if (lp->pio_buffer) {
    881		struct lance_init_block __iomem *ib = lp->init_block_iomem;
    882		u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
    883		struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
    884		for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
    885			sbus_writew(0, &packet[i]);
    886		for (i = 0; i < 6; i++) {
    887			sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
    888			sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
    889		}
    890		sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
    891		sbus_writew(0, &ib->btx_ring[entry].misc);
    892		sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
    893	} else {
    894		struct lance_init_block *ib = lp->init_block_mem;
    895		u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
    896		struct ethhdr *eth = (struct ethhdr *) packet;
    897		memset(packet, 0, ETH_ZLEN);
    898		for (i = 0; i < 6; i++) {
    899			eth->h_dest[i] = dev->dev_addr[i];
    900			eth->h_source[i] = dev->dev_addr[i];
    901		}
    902		ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
    903		ib->btx_ring[entry].misc = 0;
    904		ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
    905	}
    906	lp->tx_new = TX_NEXT(entry);
    907}
    908
    909static int lance_open(struct net_device *dev)
    910{
    911	struct lance_private *lp = netdev_priv(dev);
    912	int status = 0;
    913
    914	STOP_LANCE(lp);
    915
    916	if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED,
    917			lancestr, (void *) dev)) {
    918		printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
    919		return -EAGAIN;
    920	}
    921
    922	/* On the 4m, setup the ledma to provide the upper bits for buffers */
    923	if (lp->dregs) {
    924		u32 regval = lp->init_block_dvma & 0xff000000;
    925
    926		sbus_writel(regval, lp->dregs + DMA_TEST);
    927	}
    928
    929	/* Set mode and clear multicast filter only at device open,
    930	 * so that lance_init_ring() called at any error will not
    931	 * forget multicast filters.
    932	 *
    933	 * BTW it is common bug in all lance drivers! --ANK
    934	 */
    935	if (lp->pio_buffer) {
    936		struct lance_init_block __iomem *ib = lp->init_block_iomem;
    937		sbus_writew(0, &ib->mode);
    938		sbus_writel(0, &ib->filter[0]);
    939		sbus_writel(0, &ib->filter[1]);
    940	} else {
    941		struct lance_init_block *ib = lp->init_block_mem;
    942		ib->mode = 0;
    943		ib->filter [0] = 0;
    944		ib->filter [1] = 0;
    945	}
    946
    947	lp->init_ring(dev);
    948	load_csrs(lp);
    949
    950	netif_start_queue(dev);
    951
    952	status = init_restart_lance(lp);
    953	if (!status && lp->auto_select) {
    954		build_fake_packet(lp);
    955		sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
    956	}
    957
    958	return status;
    959}
    960
    961static int lance_close(struct net_device *dev)
    962{
    963	struct lance_private *lp = netdev_priv(dev);
    964
    965	netif_stop_queue(dev);
    966	del_timer_sync(&lp->multicast_timer);
    967
    968	STOP_LANCE(lp);
    969
    970	free_irq(dev->irq, (void *) dev);
    971	return 0;
    972}
    973
    974static int lance_reset(struct net_device *dev)
    975{
    976	struct lance_private *lp = netdev_priv(dev);
    977	int status;
    978
    979	STOP_LANCE(lp);
    980
    981	/* On the 4m, reset the dma too */
    982	if (lp->dregs) {
    983		u32 csr, addr;
    984
    985		printk(KERN_ERR "resetting ledma\n");
    986		csr = sbus_readl(lp->dregs + DMA_CSR);
    987		sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
    988		udelay(200);
    989		sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
    990
    991		addr = lp->init_block_dvma & 0xff000000;
    992		sbus_writel(addr, lp->dregs + DMA_TEST);
    993	}
    994	lp->init_ring(dev);
    995	load_csrs(lp);
    996	netif_trans_update(dev); /* prevent tx timeout */
    997	status = init_restart_lance(lp);
    998	return status;
    999}
   1000
   1001static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
   1002{
   1003	void __iomem *piobuf = dest;
   1004	u32 *p32;
   1005	u16 *p16;
   1006	u8 *p8;
   1007
   1008	switch ((unsigned long)src & 0x3) {
   1009	case 0:
   1010		p32 = (u32 *) src;
   1011		while (len >= 4) {
   1012			sbus_writel(*p32, piobuf);
   1013			p32++;
   1014			piobuf += 4;
   1015			len -= 4;
   1016		}
   1017		src = (char *) p32;
   1018		break;
   1019	case 1:
   1020	case 3:
   1021		p8 = (u8 *) src;
   1022		while (len >= 4) {
   1023			u32 val;
   1024
   1025			val  = p8[0] << 24;
   1026			val |= p8[1] << 16;
   1027			val |= p8[2] << 8;
   1028			val |= p8[3];
   1029			sbus_writel(val, piobuf);
   1030			p8 += 4;
   1031			piobuf += 4;
   1032			len -= 4;
   1033		}
   1034		src = (char *) p8;
   1035		break;
   1036	case 2:
   1037		p16 = (u16 *) src;
   1038		while (len >= 4) {
   1039			u32 val = p16[0]<<16 | p16[1];
   1040			sbus_writel(val, piobuf);
   1041			p16 += 2;
   1042			piobuf += 4;
   1043			len -= 4;
   1044		}
   1045		src = (char *) p16;
   1046		break;
   1047	}
   1048	if (len >= 2) {
   1049		u16 val = src[0] << 8 | src[1];
   1050		sbus_writew(val, piobuf);
   1051		src += 2;
   1052		piobuf += 2;
   1053		len -= 2;
   1054	}
   1055	if (len >= 1)
   1056		sbus_writeb(src[0], piobuf);
   1057}
   1058
   1059static void lance_piozero(void __iomem *dest, int len)
   1060{
   1061	void __iomem *piobuf = dest;
   1062
   1063	if ((unsigned long)piobuf & 1) {
   1064		sbus_writeb(0, piobuf);
   1065		piobuf += 1;
   1066		len -= 1;
   1067		if (len == 0)
   1068			return;
   1069	}
   1070	if (len == 1) {
   1071		sbus_writeb(0, piobuf);
   1072		return;
   1073	}
   1074	if ((unsigned long)piobuf & 2) {
   1075		sbus_writew(0, piobuf);
   1076		piobuf += 2;
   1077		len -= 2;
   1078		if (len == 0)
   1079			return;
   1080	}
   1081	while (len >= 4) {
   1082		sbus_writel(0, piobuf);
   1083		piobuf += 4;
   1084		len -= 4;
   1085	}
   1086	if (len >= 2) {
   1087		sbus_writew(0, piobuf);
   1088		piobuf += 2;
   1089		len -= 2;
   1090	}
   1091	if (len >= 1)
   1092		sbus_writeb(0, piobuf);
   1093}
   1094
   1095static void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)
   1096{
   1097	struct lance_private *lp = netdev_priv(dev);
   1098
   1099	printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
   1100	       dev->name, sbus_readw(lp->lregs + RDP));
   1101	lance_reset(dev);
   1102	netif_wake_queue(dev);
   1103}
   1104
   1105static netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
   1106{
   1107	struct lance_private *lp = netdev_priv(dev);
   1108	int entry, skblen, len;
   1109
   1110	skblen = skb->len;
   1111
   1112	len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
   1113
   1114	spin_lock_irq(&lp->lock);
   1115
   1116	dev->stats.tx_bytes += len;
   1117
   1118	entry = lp->tx_new & TX_RING_MOD_MASK;
   1119	if (lp->pio_buffer) {
   1120		struct lance_init_block __iomem *ib = lp->init_block_iomem;
   1121		sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
   1122		sbus_writew(0, &ib->btx_ring[entry].misc);
   1123		lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
   1124		if (len != skblen)
   1125			lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
   1126		sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
   1127	} else {
   1128		struct lance_init_block *ib = lp->init_block_mem;
   1129		ib->btx_ring [entry].length = (-len) | 0xf000;
   1130		ib->btx_ring [entry].misc = 0;
   1131		skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
   1132		if (len != skblen)
   1133			memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
   1134		ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
   1135	}
   1136
   1137	lp->tx_new = TX_NEXT(entry);
   1138
   1139	if (TX_BUFFS_AVAIL <= 0)
   1140		netif_stop_queue(dev);
   1141
   1142	/* Kick the lance: transmit now */
   1143	sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
   1144
   1145	/* Read back CSR to invalidate the E-Cache.
   1146	 * This is needed, because DMA_DSBL_WR_INV is set.
   1147	 */
   1148	if (lp->dregs)
   1149		sbus_readw(lp->lregs + RDP);
   1150
   1151	spin_unlock_irq(&lp->lock);
   1152
   1153	dev_kfree_skb(skb);
   1154
   1155	return NETDEV_TX_OK;
   1156}
   1157
   1158/* taken from the depca driver */
   1159static void lance_load_multicast(struct net_device *dev)
   1160{
   1161	struct lance_private *lp = netdev_priv(dev);
   1162	struct netdev_hw_addr *ha;
   1163	u32 crc;
   1164	u32 val;
   1165
   1166	/* set all multicast bits */
   1167	if (dev->flags & IFF_ALLMULTI)
   1168		val = ~0;
   1169	else
   1170		val = 0;
   1171
   1172	if (lp->pio_buffer) {
   1173		struct lance_init_block __iomem *ib = lp->init_block_iomem;
   1174		sbus_writel(val, &ib->filter[0]);
   1175		sbus_writel(val, &ib->filter[1]);
   1176	} else {
   1177		struct lance_init_block *ib = lp->init_block_mem;
   1178		ib->filter [0] = val;
   1179		ib->filter [1] = val;
   1180	}
   1181
   1182	if (dev->flags & IFF_ALLMULTI)
   1183		return;
   1184
   1185	/* Add addresses */
   1186	netdev_for_each_mc_addr(ha, dev) {
   1187		crc = ether_crc_le(6, ha->addr);
   1188		crc = crc >> 26;
   1189		if (lp->pio_buffer) {
   1190			struct lance_init_block __iomem *ib = lp->init_block_iomem;
   1191			u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
   1192			u16 tmp = sbus_readw(&mcast_table[crc>>4]);
   1193			tmp |= 1 << (crc & 0xf);
   1194			sbus_writew(tmp, &mcast_table[crc>>4]);
   1195		} else {
   1196			struct lance_init_block *ib = lp->init_block_mem;
   1197			u16 *mcast_table = (u16 *) &ib->filter;
   1198			mcast_table [crc >> 4] |= 1 << (crc & 0xf);
   1199		}
   1200	}
   1201}
   1202
   1203static void lance_set_multicast(struct net_device *dev)
   1204{
   1205	struct lance_private *lp = netdev_priv(dev);
   1206	struct lance_init_block *ib_mem = lp->init_block_mem;
   1207	struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
   1208	u16 mode;
   1209
   1210	if (!netif_running(dev))
   1211		return;
   1212
   1213	if (lp->tx_old != lp->tx_new) {
   1214		mod_timer(&lp->multicast_timer, jiffies + 4);
   1215		netif_wake_queue(dev);
   1216		return;
   1217	}
   1218
   1219	netif_stop_queue(dev);
   1220
   1221	STOP_LANCE(lp);
   1222	lp->init_ring(dev);
   1223
   1224	if (lp->pio_buffer)
   1225		mode = sbus_readw(&ib_iomem->mode);
   1226	else
   1227		mode = ib_mem->mode;
   1228	if (dev->flags & IFF_PROMISC) {
   1229		mode |= LE_MO_PROM;
   1230		if (lp->pio_buffer)
   1231			sbus_writew(mode, &ib_iomem->mode);
   1232		else
   1233			ib_mem->mode = mode;
   1234	} else {
   1235		mode &= ~LE_MO_PROM;
   1236		if (lp->pio_buffer)
   1237			sbus_writew(mode, &ib_iomem->mode);
   1238		else
   1239			ib_mem->mode = mode;
   1240		lance_load_multicast(dev);
   1241	}
   1242	load_csrs(lp);
   1243	init_restart_lance(lp);
   1244	netif_wake_queue(dev);
   1245}
   1246
   1247static void lance_set_multicast_retry(struct timer_list *t)
   1248{
   1249	struct lance_private *lp = from_timer(lp, t, multicast_timer);
   1250	struct net_device *dev = lp->dev;
   1251
   1252	lance_set_multicast(dev);
   1253}
   1254
   1255static void lance_free_hwresources(struct lance_private *lp)
   1256{
   1257	if (lp->lregs)
   1258		of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE);
   1259	if (lp->dregs) {
   1260		struct platform_device *ledma = lp->ledma;
   1261
   1262		of_iounmap(&ledma->resource[0], lp->dregs,
   1263			   resource_size(&ledma->resource[0]));
   1264	}
   1265	if (lp->init_block_iomem) {
   1266		of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem,
   1267			   sizeof(struct lance_init_block));
   1268	} else if (lp->init_block_mem) {
   1269		dma_free_coherent(&lp->op->dev,
   1270				  sizeof(struct lance_init_block),
   1271				  lp->init_block_mem,
   1272				  lp->init_block_dvma);
   1273	}
   1274}
   1275
   1276/* Ethtool support... */
   1277static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
   1278{
   1279	strlcpy(info->driver, "sunlance", sizeof(info->driver));
   1280}
   1281
   1282static const struct ethtool_ops sparc_lance_ethtool_ops = {
   1283	.get_drvinfo		= sparc_lance_get_drvinfo,
   1284	.get_link		= ethtool_op_get_link,
   1285};
   1286
   1287static const struct net_device_ops sparc_lance_ops = {
   1288	.ndo_open		= lance_open,
   1289	.ndo_stop		= lance_close,
   1290	.ndo_start_xmit		= lance_start_xmit,
   1291	.ndo_set_rx_mode	= lance_set_multicast,
   1292	.ndo_tx_timeout		= lance_tx_timeout,
   1293	.ndo_set_mac_address	= eth_mac_addr,
   1294	.ndo_validate_addr	= eth_validate_addr,
   1295};
   1296
   1297static int sparc_lance_probe_one(struct platform_device *op,
   1298				 struct platform_device *ledma,
   1299				 struct platform_device *lebuffer)
   1300{
   1301	struct device_node *dp = op->dev.of_node;
   1302	struct lance_private *lp;
   1303	struct net_device *dev;
   1304
   1305	dev = alloc_etherdev(sizeof(struct lance_private) + 8);
   1306	if (!dev)
   1307		return -ENOMEM;
   1308
   1309	lp = netdev_priv(dev);
   1310
   1311	spin_lock_init(&lp->lock);
   1312
   1313	/* Copy the IDPROM ethernet address to the device structure, later we
   1314	 * will copy the address in the device structure to the lance
   1315	 * initialization block.
   1316	 */
   1317	eth_hw_addr_set(dev, idprom->id_ethaddr);
   1318
   1319	/* Get the IO region */
   1320	lp->lregs = of_ioremap(&op->resource[0], 0,
   1321			       LANCE_REG_SIZE, lancestr);
   1322	if (!lp->lregs) {
   1323		printk(KERN_ERR "SunLance: Cannot map registers.\n");
   1324		goto fail;
   1325	}
   1326
   1327	lp->ledma = ledma;
   1328	if (lp->ledma) {
   1329		lp->dregs = of_ioremap(&ledma->resource[0], 0,
   1330				       resource_size(&ledma->resource[0]),
   1331				       "ledma");
   1332		if (!lp->dregs) {
   1333			printk(KERN_ERR "SunLance: Cannot map "
   1334			       "ledma registers.\n");
   1335			goto fail;
   1336		}
   1337	}
   1338
   1339	lp->op = op;
   1340	lp->lebuffer = lebuffer;
   1341	if (lebuffer) {
   1342		/* sanity check */
   1343		if (lebuffer->resource[0].start & 7) {
   1344			printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
   1345			goto fail;
   1346		}
   1347		lp->init_block_iomem =
   1348			of_ioremap(&lebuffer->resource[0], 0,
   1349				   sizeof(struct lance_init_block), "lebuffer");
   1350		if (!lp->init_block_iomem) {
   1351			printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
   1352			goto fail;
   1353		}
   1354		lp->init_block_dvma = 0;
   1355		lp->pio_buffer = 1;
   1356		lp->init_ring = lance_init_ring_pio;
   1357		lp->rx = lance_rx_pio;
   1358		lp->tx = lance_tx_pio;
   1359	} else {
   1360		lp->init_block_mem =
   1361			dma_alloc_coherent(&op->dev,
   1362					   sizeof(struct lance_init_block),
   1363					   &lp->init_block_dvma, GFP_ATOMIC);
   1364		if (!lp->init_block_mem)
   1365			goto fail;
   1366
   1367		lp->pio_buffer = 0;
   1368		lp->init_ring = lance_init_ring_dvma;
   1369		lp->rx = lance_rx_dvma;
   1370		lp->tx = lance_tx_dvma;
   1371	}
   1372	lp->busmaster_regval = of_getintprop_default(dp,  "busmaster-regval",
   1373						     (LE_C3_BSWP |
   1374						      LE_C3_ACON |
   1375						      LE_C3_BCON));
   1376
   1377	lp->name = lancestr;
   1378
   1379	lp->burst_sizes = 0;
   1380	if (lp->ledma) {
   1381		struct device_node *ledma_dp = ledma->dev.of_node;
   1382		struct device_node *sbus_dp;
   1383		unsigned int sbmask;
   1384		const char *prop;
   1385		u32 csr;
   1386
   1387		/* Find burst-size property for ledma */
   1388		lp->burst_sizes = of_getintprop_default(ledma_dp,
   1389							"burst-sizes", 0);
   1390
   1391		/* ledma may be capable of fast bursts, but sbus may not. */
   1392		sbus_dp = ledma_dp->parent;
   1393		sbmask = of_getintprop_default(sbus_dp, "burst-sizes",
   1394					       DMA_BURSTBITS);
   1395		lp->burst_sizes &= sbmask;
   1396
   1397		/* Get the cable-selection property */
   1398		prop = of_get_property(ledma_dp, "cable-selection", NULL);
   1399		if (!prop || prop[0] == '\0') {
   1400			struct device_node *nd;
   1401
   1402			printk(KERN_INFO "SunLance: using "
   1403			       "auto-carrier-detection.\n");
   1404
   1405			nd = of_find_node_by_path("/options");
   1406			if (!nd)
   1407				goto no_link_test;
   1408
   1409			prop = of_get_property(nd, "tpe-link-test?", NULL);
   1410			if (!prop)
   1411				goto node_put;
   1412
   1413			if (strcmp(prop, "true")) {
   1414				printk(KERN_NOTICE "SunLance: warning: overriding option "
   1415				       "'tpe-link-test?'\n");
   1416				printk(KERN_NOTICE "SunLance: warning: mail any problems "
   1417				       "to ecd@skynet.be\n");
   1418				auxio_set_lte(AUXIO_LTE_ON);
   1419			}
   1420node_put:
   1421			of_node_put(nd);
   1422no_link_test:
   1423			lp->auto_select = 1;
   1424			lp->tpe = 0;
   1425		} else if (!strcmp(prop, "aui")) {
   1426			lp->auto_select = 0;
   1427			lp->tpe = 0;
   1428		} else {
   1429			lp->auto_select = 0;
   1430			lp->tpe = 1;
   1431		}
   1432
   1433		/* Reset ledma */
   1434		csr = sbus_readl(lp->dregs + DMA_CSR);
   1435		sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
   1436		udelay(200);
   1437		sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
   1438	} else
   1439		lp->dregs = NULL;
   1440
   1441	lp->dev = dev;
   1442	SET_NETDEV_DEV(dev, &op->dev);
   1443	dev->watchdog_timeo = 5*HZ;
   1444	dev->ethtool_ops = &sparc_lance_ethtool_ops;
   1445	dev->netdev_ops = &sparc_lance_ops;
   1446
   1447	dev->irq = op->archdata.irqs[0];
   1448
   1449	/* We cannot sleep if the chip is busy during a
   1450	 * multicast list update event, because such events
   1451	 * can occur from interrupts (ex. IPv6).  So we
   1452	 * use a timer to try again later when necessary. -DaveM
   1453	 */
   1454	timer_setup(&lp->multicast_timer, lance_set_multicast_retry, 0);
   1455
   1456	if (register_netdev(dev)) {
   1457		printk(KERN_ERR "SunLance: Cannot register device.\n");
   1458		goto fail;
   1459	}
   1460
   1461	platform_set_drvdata(op, lp);
   1462
   1463	printk(KERN_INFO "%s: LANCE %pM\n",
   1464	       dev->name, dev->dev_addr);
   1465
   1466	return 0;
   1467
   1468fail:
   1469	lance_free_hwresources(lp);
   1470	free_netdev(dev);
   1471	return -ENODEV;
   1472}
   1473
   1474static int sunlance_sbus_probe(struct platform_device *op)
   1475{
   1476	struct platform_device *parent = to_platform_device(op->dev.parent);
   1477	struct device_node *parent_dp = parent->dev.of_node;
   1478	int err;
   1479
   1480	if (of_node_name_eq(parent_dp, "ledma")) {
   1481		err = sparc_lance_probe_one(op, parent, NULL);
   1482	} else if (of_node_name_eq(parent_dp, "lebuffer")) {
   1483		err = sparc_lance_probe_one(op, NULL, parent);
   1484	} else
   1485		err = sparc_lance_probe_one(op, NULL, NULL);
   1486
   1487	return err;
   1488}
   1489
   1490static int sunlance_sbus_remove(struct platform_device *op)
   1491{
   1492	struct lance_private *lp = platform_get_drvdata(op);
   1493	struct net_device *net_dev = lp->dev;
   1494
   1495	unregister_netdev(net_dev);
   1496
   1497	lance_free_hwresources(lp);
   1498
   1499	free_netdev(net_dev);
   1500
   1501	return 0;
   1502}
   1503
   1504static const struct of_device_id sunlance_sbus_match[] = {
   1505	{
   1506		.name = "le",
   1507	},
   1508	{},
   1509};
   1510
   1511MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
   1512
   1513static struct platform_driver sunlance_sbus_driver = {
   1514	.driver = {
   1515		.name = "sunlance",
   1516		.of_match_table = sunlance_sbus_match,
   1517	},
   1518	.probe		= sunlance_sbus_probe,
   1519	.remove		= sunlance_sbus_remove,
   1520};
   1521
   1522module_platform_driver(sunlance_sbus_driver);