cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hw_atl_b0.h (2866B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/* Atlantic Network Driver
      3 *
      4 * Copyright (C) 2014-2019 aQuantia Corporation
      5 * Copyright (C) 2019-2020 Marvell International Ltd.
      6 */
      7
      8/* File hw_atl_b0.h: Declaration of abstract interface for Atlantic hardware
      9 * specific functions.
     10 */
     11
     12#ifndef HW_ATL_B0_H
     13#define HW_ATL_B0_H
     14
     15#include "../aq_common.h"
     16
     17extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc100;
     18extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107;
     19extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108;
     20extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109;
     21extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc111;
     22extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc112;
     23
     24#define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc100
     25#define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc107
     26#define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc108
     27#define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc109
     28#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc111
     29#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc112
     30
     31extern const struct aq_hw_ops hw_atl_ops_b0;
     32
     33#define hw_atl_ops_b1 hw_atl_ops_b0
     34
     35int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self,
     36			      struct aq_rss_parameters *rss_params);
     37int hw_atl_b0_hw_offload_set(struct aq_hw_s *self,
     38			     struct aq_nic_cfg_s *aq_nic_cfg);
     39
     40int hw_atl_b0_hw_ring_tx_start(struct aq_hw_s *self, struct aq_ring_s *ring);
     41int hw_atl_b0_hw_ring_rx_start(struct aq_hw_s *self, struct aq_ring_s *ring);
     42
     43int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring,
     44			      struct aq_ring_param_s *aq_ring_param);
     45int hw_atl_b0_hw_ring_rx_fill(struct aq_hw_s *self, struct aq_ring_s *ring,
     46			      unsigned int sw_tail_old);
     47int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, struct aq_ring_s *ring);
     48
     49int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring,
     50			      struct aq_ring_param_s *aq_ring_param);
     51int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, struct aq_ring_s *ring,
     52			      unsigned int frags);
     53int hw_atl_b0_hw_ring_tx_head_update(struct aq_hw_s *self,
     54				     struct aq_ring_s *ring);
     55
     56int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, struct aq_ring_s *ring);
     57int hw_atl_b0_hw_ring_rx_stop(struct aq_hw_s *self, struct aq_ring_s *ring);
     58
     59void hw_atl_b0_hw_init_rx_rss_ctrl1(struct aq_hw_s *self);
     60
     61int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr);
     62
     63int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc);
     64int hw_atl_b0_set_loopback(struct aq_hw_s *self, u32 mode, bool enable);
     65
     66int hw_atl_b0_hw_start(struct aq_hw_s *self);
     67
     68int hw_atl_b0_hw_irq_enable(struct aq_hw_s *self, u64 mask);
     69int hw_atl_b0_hw_irq_disable(struct aq_hw_s *self, u64 mask);
     70int hw_atl_b0_hw_irq_read(struct aq_hw_s *self, u64 *mask);
     71
     72int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self,
     73				   unsigned int packet_filter);
     74
     75#endif /* HW_ATL_B0_H */