cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

bnxt_ptp.h (4528B)

      1/* Broadcom NetXtreme-C/E network driver.
      2 *
      3 * Copyright (c) 2021 Broadcom Inc.
      4 *
      5 * This program is free software; you can redistribute it and/or modify
      6 * it under the terms of the GNU General Public License as published by
      7 * the Free Software Foundation.
      8 */
      9
     10#ifndef BNXT_PTP_H
     11#define BNXT_PTP_H
     12
     13#include <linux/ptp_clock_kernel.h>
     14#include <linux/timecounter.h>
     15
     16#define BNXT_PTP_GRC_WIN	6
     17#define BNXT_PTP_GRC_WIN_BASE	0x6000
     18
     19#define BNXT_MAX_PHC_DRIFT	31000000
     20#define BNXT_LO_TIMER_MASK	0x0000ffffffffUL
     21#define BNXT_HI_TIMER_MASK	0xffff00000000UL
     22
     23#define BNXT_PTP_QTS_TIMEOUT	1000
     24#define BNXT_PTP_QTS_TX_ENABLES	(PORT_TS_QUERY_REQ_ENABLES_PTP_SEQ_ID |	\
     25				 PORT_TS_QUERY_REQ_ENABLES_TS_REQ_TIMEOUT | \
     26				 PORT_TS_QUERY_REQ_ENABLES_PTP_HDR_OFFSET)
     27
     28struct pps_pin {
     29	u8 event;
     30	u8 usage;
     31	u8 state;
     32};
     33
     34#define TSIO_PIN_VALID(pin) ((pin) >= 0 && (pin) < (BNXT_MAX_TSIO_PINS))
     35
     36#define EVENT_DATA2_PPS_EVENT_TYPE(data2)				\
     37	((data2) & ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE)
     38
     39#define EVENT_DATA2_PPS_PIN_NUM(data2)					\
     40	(((data2) &							\
     41	  ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_MASK) >>\
     42	 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_SFT)
     43
     44#define BNXT_DATA2_UPPER_MSK						\
     45	ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_MASK
     46
     47#define BNXT_DATA2_UPPER_SFT						\
     48	(32 -								\
     49	 ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT)
     50
     51#define BNXT_DATA1_LOWER_MSK						\
     52	ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_MASK
     53
     54#define BNXT_DATA1_LOWER_SFT						\
     55	  ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_SFT
     56
     57#define EVENT_PPS_TS(data2, data1)					\
     58	(((u64)((data2) & BNXT_DATA2_UPPER_MSK) << BNXT_DATA2_UPPER_SFT) |\
     59	 (((data1) & BNXT_DATA1_LOWER_MSK) >> BNXT_DATA1_LOWER_SFT))
     60
     61#define BNXT_PPS_PIN_DISABLE	0
     62#define BNXT_PPS_PIN_ENABLE	1
     63#define BNXT_PPS_PIN_NONE	0
     64#define BNXT_PPS_PIN_PPS_IN	1
     65#define BNXT_PPS_PIN_PPS_OUT	2
     66#define BNXT_PPS_PIN_SYNC_IN	3
     67#define BNXT_PPS_PIN_SYNC_OUT	4
     68
     69#define BNXT_PPS_EVENT_INTERNAL	1
     70#define BNXT_PPS_EVENT_EXTERNAL	2
     71
     72struct bnxt_pps {
     73	u8 num_pins;
     74#define BNXT_MAX_TSIO_PINS	4
     75	struct pps_pin pins[BNXT_MAX_TSIO_PINS];
     76};
     77
     78struct bnxt_ptp_cfg {
     79	struct ptp_clock_info	ptp_info;
     80	struct ptp_clock	*ptp_clock;
     81	struct cyclecounter	cc;
     82	struct timecounter	tc;
     83	struct bnxt_pps		pps_info;
     84	/* serialize timecounter access */
     85	spinlock_t		ptp_lock;
     86	struct sk_buff		*tx_skb;
     87	u64			current_time;
     88	u64			old_time;
     89	unsigned long		next_period;
     90	unsigned long		next_overflow_check;
     91	/* 48-bit PHC overflows in 78 hours.  Check overflow every 19 hours. */
     92	#define BNXT_PHC_OVERFLOW_PERIOD	(19 * 3600 * HZ)
     93
     94	u16			tx_seqid;
     95	u16			tx_hdr_off;
     96	struct bnxt		*bp;
     97	atomic_t		tx_avail;
     98#define BNXT_MAX_TX_TS	1
     99	u16			rxctl;
    100#define BNXT_PTP_MSG_SYNC			(1 << 0)
    101#define BNXT_PTP_MSG_DELAY_REQ			(1 << 1)
    102#define BNXT_PTP_MSG_PDELAY_REQ			(1 << 2)
    103#define BNXT_PTP_MSG_PDELAY_RESP		(1 << 3)
    104#define BNXT_PTP_MSG_FOLLOW_UP			(1 << 8)
    105#define BNXT_PTP_MSG_DELAY_RESP			(1 << 9)
    106#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP	(1 << 10)
    107#define BNXT_PTP_MSG_ANNOUNCE			(1 << 11)
    108#define BNXT_PTP_MSG_SIGNALING			(1 << 12)
    109#define BNXT_PTP_MSG_MANAGEMENT			(1 << 13)
    110#define BNXT_PTP_MSG_EVENTS		(BNXT_PTP_MSG_SYNC |		\
    111					 BNXT_PTP_MSG_DELAY_REQ |	\
    112					 BNXT_PTP_MSG_PDELAY_REQ |	\
    113					 BNXT_PTP_MSG_PDELAY_RESP)
    114	u8			tx_tstamp_en:1;
    115	int			rx_filter;
    116	u32			tstamp_filters;
    117
    118	u32			refclk_regs[2];
    119	u32			refclk_mapped_regs[2];
    120};
    121
    122#if BITS_PER_LONG == 32
    123#define BNXT_READ_TIME64(ptp, dst, src)		\
    124do {						\
    125	spin_lock_bh(&(ptp)->ptp_lock);		\
    126	(dst) = (src);				\
    127	spin_unlock_bh(&(ptp)->ptp_lock);	\
    128} while (0)
    129#else
    130#define BNXT_READ_TIME64(ptp, dst, src)		\
    131	((dst) = READ_ONCE(src))
    132#endif
    133
    134int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off);
    135void bnxt_ptp_update_current_time(struct bnxt *bp);
    136void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);
    137void bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp);
    138void bnxt_ptp_reapply_pps(struct bnxt *bp);
    139int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr);
    140int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr);
    141int bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb);
    142int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts);
    143void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns);
    144int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg);
    145int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg);
    146void bnxt_ptp_clear(struct bnxt *bp);
    147#endif