cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

cn68xx_regs.h (1713B)


      1/**********************************************************************
      2 * Author: Cavium, Inc.
      3 *
      4 * Contact: support@cavium.com
      5 *          Please include "LiquidIO" in the subject.
      6 *
      7 * Copyright (c) 2003-2016 Cavium, Inc.
      8 *
      9 * This file is free software; you can redistribute it and/or modify
     10 * it under the terms of the GNU General Public License, Version 2, as
     11 * published by the Free Software Foundation.
     12 *
     13 * This file is distributed in the hope that it will be useful, but
     14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
     15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
     16 * NONINFRINGEMENT.  See the GNU General Public License for more details.
     17 ***********************************************************************/
     18/*! \file cn68xx_regs.h
     19 *  \brief Host Driver: Register Address and Register Mask values for
     20 *  Octeon CN68XX devices. The register map for CN66XX is the same
     21 *  for most registers. This file has the other registers that are
     22 *  68XX-specific.
     23 */
     24
     25#ifndef __CN68XX_REGS_H__
     26#define __CN68XX_REGS_H__
     27
     28/*###################### REQUEST QUEUE #########################*/
     29
     30#define    CN68XX_SLI_IQ_PORT0_PKIND             0x0800
     31
     32#define    CN68XX_SLI_IQ_PORT_PKIND(iq)           \
     33	(CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET))
     34
     35/*############################ OUTPUT QUEUE #########################*/
     36
     37/* Starting pipe number and number of pipes used by the SLI packet output. */
     38#define    CN68XX_SLI_TX_PIPE                    0x1230
     39
     40/*######################## INTERRUPTS #########################*/
     41
     42/*------------------ Interrupt Masks ----------------*/
     43#define    CN68XX_INTR_PIPE_ERR                  BIT_ULL(61)
     44
     45#endif