cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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t4_pci_id_tbl.h (9878B)


      1/*
      2 * This file is part of the Chelsio T4/T5 Ethernet driver for Linux.
      3 *
      4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
      5 *
      6 * This software is available to you under a choice of one of two
      7 * licenses.  You may choose to be licensed under the terms of the GNU
      8 * General Public License (GPL) Version 2, available from the file
      9 * COPYING in the main directory of this source tree, or the
     10 * OpenIB.org BSD license below:
     11 *
     12 *     Redistribution and use in source and binary forms, with or
     13 *     without modification, are permitted provided that the following
     14 *     conditions are met:
     15 *
     16 *      - Redistributions of source code must retain the above
     17 *        copyright notice, this list of conditions and the following
     18 *        disclaimer.
     19 *
     20 *      - Redistributions in binary form must reproduce the above
     21 *        copyright notice, this list of conditions and the following
     22 *        disclaimer in the documentation and/or other materials
     23 *        provided with the distribution.
     24 *
     25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     32 * SOFTWARE.
     33 */
     34#ifndef __T4_PCI_ID_TBL_H__
     35#define __T4_PCI_ID_TBL_H__
     36
     37/* The code can defined cpp macros for creating a PCI Device ID Table. This is
     38 * useful because it allows the PCI ID Table to be maintained in a single place.
     39 *
     40 * The macros are:
     41 *
     42 * CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
     43 *   -- Used to start the definition of the PCI ID Table.
     44 *
     45 * CH_PCI_DEVICE_ID_FUNCTION
     46 *   -- The PCI Function Number to use in the PCI Device ID Table.  "0"
     47 *   -- for drivers attaching to PF0-3, "4" for drivers attaching to PF4,
     48 *   -- "8" for drivers attaching to SR-IOV Virtual Functions, etc.
     49 *
     50 * CH_PCI_DEVICE_ID_FUNCTION2 [optional]
     51 *   -- If defined, create a PCI Device ID Table with both
     52 *   -- CH_PCI_DEVICE_ID_FUNCTION and CH_PCI_DEVICE_ID_FUNCTION2 populated.
     53 *
     54 * CH_PCI_ID_TABLE_ENTRY(DeviceID)
     55 *   -- Used for the individual PCI Device ID entries.  Note that we will
     56 *   -- be adding a trailing comma (",") after all of the entries (and
     57 *   -- between the pairs of entries if CH_PCI_DEVICE_ID_FUNCTION2 is defined).
     58 *
     59 * CH_PCI_DEVICE_ID_TABLE_DEFINE_END
     60 *   -- Used to finish the definition of the PCI ID Table.  Note that we
     61 *   -- will be adding a trailing semi-colon (";") here.
     62 */
     63#ifndef CH_PCI_DEVICE_ID_FUNCTION
     64#error CH_PCI_DEVICE_ID_FUNCTION not defined!
     65#endif
     66#ifndef CH_PCI_ID_TABLE_ENTRY
     67#error CH_PCI_ID_TABLE_ENTRY not defined!
     68#endif
     69#ifndef CH_PCI_DEVICE_ID_TABLE_DEFINE_END
     70#error CH_PCI_DEVICE_ID_TABLE_DEFINE_END not defined!
     71#endif
     72
     73/* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where:
     74 *
     75 *   V  = "4" for T4; "5" for T5, etc.
     76 *   F  = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
     77 *   PP = adapter product designation
     78 *
     79 * We use this consistency in order to create the proper PCI Device IDs
     80 * for the specified CH_PCI_DEVICE_ID_FUNCTION.
     81 */
     82#ifndef CH_PCI_DEVICE_ID_FUNCTION2
     83#define CH_PCI_ID_TABLE_FENTRY(devid) \
     84	CH_PCI_ID_TABLE_ENTRY((devid) | \
     85			      ((CH_PCI_DEVICE_ID_FUNCTION) << 8))
     86#else
     87#define CH_PCI_ID_TABLE_FENTRY(devid) \
     88	CH_PCI_ID_TABLE_ENTRY((devid) | \
     89			      ((CH_PCI_DEVICE_ID_FUNCTION) << 8)), \
     90	CH_PCI_ID_TABLE_ENTRY((devid) | \
     91			      ((CH_PCI_DEVICE_ID_FUNCTION2) << 8))
     92#endif
     93
     94CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
     95	/* T4 adapters:
     96	 */
     97	CH_PCI_ID_TABLE_FENTRY(0x4000),	/* T440-dbg */
     98	CH_PCI_ID_TABLE_FENTRY(0x4001),	/* T420-cr */
     99	CH_PCI_ID_TABLE_FENTRY(0x4002),	/* T422-cr */
    100	CH_PCI_ID_TABLE_FENTRY(0x4003),	/* T440-cr */
    101	CH_PCI_ID_TABLE_FENTRY(0x4004),	/* T420-bch */
    102	CH_PCI_ID_TABLE_FENTRY(0x4005),	/* T440-bch */
    103	CH_PCI_ID_TABLE_FENTRY(0x4006),	/* T440-ch */
    104	CH_PCI_ID_TABLE_FENTRY(0x4007),	/* T420-so */
    105	CH_PCI_ID_TABLE_FENTRY(0x4008),	/* T420-cx */
    106	CH_PCI_ID_TABLE_FENTRY(0x4009),	/* T420-bt */
    107	CH_PCI_ID_TABLE_FENTRY(0x400a),	/* T404-bt */
    108	CH_PCI_ID_TABLE_FENTRY(0x400b),	/* B420-sr */
    109	CH_PCI_ID_TABLE_FENTRY(0x400c),	/* B404-bt */
    110	CH_PCI_ID_TABLE_FENTRY(0x400d),	/* T480-cr */
    111	CH_PCI_ID_TABLE_FENTRY(0x400e),	/* T440-LP-cr */
    112	CH_PCI_ID_TABLE_FENTRY(0x4080),	/* Custom T480-cr */
    113	CH_PCI_ID_TABLE_FENTRY(0x4081),	/* Custom T440-cr */
    114	CH_PCI_ID_TABLE_FENTRY(0x4082),	/* Custom T420-cr */
    115	CH_PCI_ID_TABLE_FENTRY(0x4083),	/* Custom T420-xaui */
    116	CH_PCI_ID_TABLE_FENTRY(0x4084),	/* Custom T440-cr */
    117	CH_PCI_ID_TABLE_FENTRY(0x4085),	/* Custom T420-cr */
    118	CH_PCI_ID_TABLE_FENTRY(0x4086),	/* Custom T440-bt */
    119	CH_PCI_ID_TABLE_FENTRY(0x4087),	/* Custom T440-cr */
    120	CH_PCI_ID_TABLE_FENTRY(0x4088),	/* Custom T440 2-xaui, 2-xfi */
    121
    122	/* T5 adapters:
    123	 */
    124	CH_PCI_ID_TABLE_FENTRY(0x5000),	/* T580-dbg */
    125	CH_PCI_ID_TABLE_FENTRY(0x5001),	/* T520-cr */
    126	CH_PCI_ID_TABLE_FENTRY(0x5002),	/* T522-cr */
    127	CH_PCI_ID_TABLE_FENTRY(0x5003),	/* T540-cr */
    128	CH_PCI_ID_TABLE_FENTRY(0x5004),	/* T520-bch */
    129	CH_PCI_ID_TABLE_FENTRY(0x5005),	/* T540-bch */
    130	CH_PCI_ID_TABLE_FENTRY(0x5006),	/* T540-ch */
    131	CH_PCI_ID_TABLE_FENTRY(0x5007),	/* T520-so */
    132	CH_PCI_ID_TABLE_FENTRY(0x5008),	/* T520-cx */
    133	CH_PCI_ID_TABLE_FENTRY(0x5009),	/* T520-bt */
    134	CH_PCI_ID_TABLE_FENTRY(0x500a),	/* T504-bt */
    135	CH_PCI_ID_TABLE_FENTRY(0x500b),	/* B520-sr */
    136	CH_PCI_ID_TABLE_FENTRY(0x500c),	/* B504-bt */
    137	CH_PCI_ID_TABLE_FENTRY(0x500d),	/* T580-cr */
    138	CH_PCI_ID_TABLE_FENTRY(0x500e),	/* T540-LP-cr */
    139	CH_PCI_ID_TABLE_FENTRY(0x5010),	/* T580-LP-cr */
    140	CH_PCI_ID_TABLE_FENTRY(0x5011),	/* T520-LL-cr */
    141	CH_PCI_ID_TABLE_FENTRY(0x5012),	/* T560-cr */
    142	CH_PCI_ID_TABLE_FENTRY(0x5013),	/* T580-chr */
    143	CH_PCI_ID_TABLE_FENTRY(0x5014),	/* T580-so */
    144	CH_PCI_ID_TABLE_FENTRY(0x5015),	/* T502-bt */
    145	CH_PCI_ID_TABLE_FENTRY(0x5016),	/* T580-OCP-SO */
    146	CH_PCI_ID_TABLE_FENTRY(0x5017),	/* T520-OCP-SO */
    147	CH_PCI_ID_TABLE_FENTRY(0x5018),	/* T540-BT */
    148	CH_PCI_ID_TABLE_FENTRY(0x5019),	/* T540-LP-BT */
    149	CH_PCI_ID_TABLE_FENTRY(0x501a),	/* T540-SO-BT */
    150	CH_PCI_ID_TABLE_FENTRY(0x501b),	/* T540-SO-CR */
    151	CH_PCI_ID_TABLE_FENTRY(0x5080),	/* Custom T540-cr */
    152	CH_PCI_ID_TABLE_FENTRY(0x5081),	/* Custom T540-LL-cr */
    153	CH_PCI_ID_TABLE_FENTRY(0x5082),	/* Custom T504-cr */
    154	CH_PCI_ID_TABLE_FENTRY(0x5083),	/* Custom T540-LP-CR */
    155	CH_PCI_ID_TABLE_FENTRY(0x5084),	/* Custom T580-cr */
    156	CH_PCI_ID_TABLE_FENTRY(0x5085),	/* Custom 3x T580-CR */
    157	CH_PCI_ID_TABLE_FENTRY(0x5086),	/* Custom 2x T580-CR */
    158	CH_PCI_ID_TABLE_FENTRY(0x5087),	/* Custom T580-CR */
    159	CH_PCI_ID_TABLE_FENTRY(0x5088),	/* Custom T570-CR */
    160	CH_PCI_ID_TABLE_FENTRY(0x5089),	/* Custom T520-CR */
    161	CH_PCI_ID_TABLE_FENTRY(0x5090),	/* Custom T540-CR */
    162	CH_PCI_ID_TABLE_FENTRY(0x5091),	/* Custom T522-CR */
    163	CH_PCI_ID_TABLE_FENTRY(0x5092),	/* Custom T520-CR */
    164	CH_PCI_ID_TABLE_FENTRY(0x5093),	/* Custom T580-LP-CR */
    165	CH_PCI_ID_TABLE_FENTRY(0x5094),	/* Custom T540-CR */
    166	CH_PCI_ID_TABLE_FENTRY(0x5095),	/* Custom T540-CR-SO */
    167	CH_PCI_ID_TABLE_FENTRY(0x5096),	/* Custom T580-CR */
    168	CH_PCI_ID_TABLE_FENTRY(0x5097),	/* Custom T520-KR */
    169	CH_PCI_ID_TABLE_FENTRY(0x5098),	/* Custom 2x40G QSFP */
    170	CH_PCI_ID_TABLE_FENTRY(0x5099),	/* Custom 2x40G QSFP */
    171	CH_PCI_ID_TABLE_FENTRY(0x509a),	/* Custom T520-CR */
    172	CH_PCI_ID_TABLE_FENTRY(0x509b),	/* Custom T540-CR LOM */
    173	CH_PCI_ID_TABLE_FENTRY(0x509c),	/* Custom T520-CR*/
    174	CH_PCI_ID_TABLE_FENTRY(0x509d),	/* Custom T540-CR*/
    175	CH_PCI_ID_TABLE_FENTRY(0x509e), /* Custom T520-CR */
    176	CH_PCI_ID_TABLE_FENTRY(0x509f), /* Custom T540-CR */
    177	CH_PCI_ID_TABLE_FENTRY(0x50a0), /* Custom T540-CR */
    178	CH_PCI_ID_TABLE_FENTRY(0x50a1), /* Custom T540-CR */
    179	CH_PCI_ID_TABLE_FENTRY(0x50a2), /* Custom T540-KR4 */
    180	CH_PCI_ID_TABLE_FENTRY(0x50a3), /* Custom T580-KR4 */
    181	CH_PCI_ID_TABLE_FENTRY(0x50a4), /* Custom 2x T540-CR */
    182	CH_PCI_ID_TABLE_FENTRY(0x50a5), /* Custom T522-BT */
    183	CH_PCI_ID_TABLE_FENTRY(0x50a6), /* Custom T522-BT-SO */
    184	CH_PCI_ID_TABLE_FENTRY(0x50a7), /* Custom T580-CR */
    185	CH_PCI_ID_TABLE_FENTRY(0x50a8), /* Custom T580-KR */
    186	CH_PCI_ID_TABLE_FENTRY(0x50a9), /* Custom T580-KR */
    187	CH_PCI_ID_TABLE_FENTRY(0x50aa), /* Custom T580-CR */
    188	CH_PCI_ID_TABLE_FENTRY(0x50ab), /* Custom T520-CR */
    189	CH_PCI_ID_TABLE_FENTRY(0x50ac), /* Custom T540-BT */
    190	CH_PCI_ID_TABLE_FENTRY(0x50ad), /* Custom T520-CR */
    191	CH_PCI_ID_TABLE_FENTRY(0x50ae), /* Custom T540-XL-SO */
    192	CH_PCI_ID_TABLE_FENTRY(0x50af), /* Custom T580-KR-SO */
    193	CH_PCI_ID_TABLE_FENTRY(0x50b0), /* Custom T520-CR-LOM */
    194
    195	/* T6 adapters:
    196	 */
    197	CH_PCI_ID_TABLE_FENTRY(0x6001),
    198	CH_PCI_ID_TABLE_FENTRY(0x6002),
    199	CH_PCI_ID_TABLE_FENTRY(0x6003),
    200	CH_PCI_ID_TABLE_FENTRY(0x6004),
    201	CH_PCI_ID_TABLE_FENTRY(0x6005),
    202	CH_PCI_ID_TABLE_FENTRY(0x6006),
    203	CH_PCI_ID_TABLE_FENTRY(0x6007),
    204	CH_PCI_ID_TABLE_FENTRY(0x6008),
    205	CH_PCI_ID_TABLE_FENTRY(0x6009),
    206	CH_PCI_ID_TABLE_FENTRY(0x600d),
    207	CH_PCI_ID_TABLE_FENTRY(0x6011),
    208	CH_PCI_ID_TABLE_FENTRY(0x6014),
    209	CH_PCI_ID_TABLE_FENTRY(0x6015),
    210	CH_PCI_ID_TABLE_FENTRY(0x6080),
    211	CH_PCI_ID_TABLE_FENTRY(0x6081),
    212	CH_PCI_ID_TABLE_FENTRY(0x6082), /* Custom T6225-CR SFP28 */
    213	CH_PCI_ID_TABLE_FENTRY(0x6083), /* Custom T62100-CR QSFP28 */
    214	CH_PCI_ID_TABLE_FENTRY(0x6084), /* Custom T64100-CR QSFP28 */
    215	CH_PCI_ID_TABLE_FENTRY(0x6085), /* Custom T6240-SO */
    216	CH_PCI_ID_TABLE_FENTRY(0x6086), /* Custom T6225-SO-CR */
    217	CH_PCI_ID_TABLE_FENTRY(0x6087), /* Custom T6225-CR */
    218	CH_PCI_ID_TABLE_FENTRY(0x6088), /* Custom T62100-CR */
    219	CH_PCI_ID_TABLE_FENTRY(0x6089), /* Custom T62100-KR */
    220	CH_PCI_ID_TABLE_FENTRY(0x608a), /* Custom T62100-CR */
    221	CH_PCI_ID_TABLE_FENTRY(0x608b), /* Custom T6225-CR */
    222	CH_PCI_ID_TABLE_FENTRY(0x6092), /* Custom T62100-CR-LOM */
    223CH_PCI_DEVICE_ID_TABLE_DEFINE_END;
    224
    225#endif /* __T4_PCI_ID_TBL_H__ */