cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vnic_intr.h (3096B)

      1/*
      2 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
      3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
      4 *
      5 * This program is free software; you may redistribute it and/or modify
      6 * it under the terms of the GNU General Public License as published by
      7 * the Free Software Foundation; version 2 of the License.
      8 *
      9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     16 * SOFTWARE.
     17 *
     18 */
     19
     20#ifndef _VNIC_INTR_H_
     21#define _VNIC_INTR_H_
     22
     23#include <linux/pci.h>
     24
     25#include "vnic_dev.h"
     26
     27#define VNIC_INTR_TIMER_TYPE_ABS	0
     28#define VNIC_INTR_TIMER_TYPE_QUIET	1
     29
     30/* Interrupt control */
     31struct vnic_intr_ctrl {
     32	u32 coalescing_timer;		/* 0x00 */
     33	u32 pad0;
     34	u32 coalescing_value;		/* 0x08 */
     35	u32 pad1;
     36	u32 coalescing_type;		/* 0x10 */
     37	u32 pad2;
     38	u32 mask_on_assertion;		/* 0x18 */
     39	u32 pad3;
     40	u32 mask;			/* 0x20 */
     41	u32 pad4;
     42	u32 int_credits;		/* 0x28 */
     43	u32 pad5;
     44	u32 int_credit_return;		/* 0x30 */
     45	u32 pad6;
     46};
     47
     48struct vnic_intr {
     49	unsigned int index;
     50	struct vnic_dev *vdev;
     51	struct vnic_intr_ctrl __iomem *ctrl;		/* memory-mapped */
     52};
     53
     54static inline void vnic_intr_unmask(struct vnic_intr *intr)
     55{
     56	iowrite32(0, &intr->ctrl->mask);
     57}
     58
     59static inline void vnic_intr_mask(struct vnic_intr *intr)
     60{
     61	iowrite32(1, &intr->ctrl->mask);
     62}
     63
     64static inline int vnic_intr_masked(struct vnic_intr *intr)
     65{
     66	return ioread32(&intr->ctrl->mask);
     67}
     68
     69static inline void vnic_intr_return_credits(struct vnic_intr *intr,
     70	unsigned int credits, int unmask, int reset_timer)
     71{
     72#define VNIC_INTR_UNMASK_SHIFT		16
     73#define VNIC_INTR_RESET_TIMER_SHIFT	17
     74
     75	u32 int_credit_return = (credits & 0xffff) |
     76		(unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) |
     77		(reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0);
     78
     79	iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
     80}
     81
     82static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)
     83{
     84	return ioread32(&intr->ctrl->int_credits);
     85}
     86
     87static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)
     88{
     89	unsigned int credits = vnic_intr_credits(intr);
     90	int unmask = 1;
     91	int reset_timer = 1;
     92
     93	vnic_intr_return_credits(intr, credits, unmask, reset_timer);
     94}
     95
     96static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba)
     97{
     98	/* read PBA without clearing */
     99	return ioread32(legacy_pba);
    100}
    101
    102void vnic_intr_free(struct vnic_intr *intr);
    103int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,
    104	unsigned int index);
    105void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,
    106	unsigned int coalescing_type, unsigned int mask_on_assertion);
    107void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,
    108	u32 coalescing_timer);
    109void vnic_intr_clean(struct vnic_intr *intr);
    110
    111#endif /* _VNIC_INTR_H_ */