cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dm9051.c (29269B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (c) 2022 Davicom Semiconductor,Inc.
      4 * Davicom DM9051 SPI Fast Ethernet Linux driver
      5 */
      6
      7#include <linux/etherdevice.h>
      8#include <linux/ethtool.h>
      9#include <linux/interrupt.h>
     10#include <linux/iopoll.h>
     11#include <linux/irq.h>
     12#include <linux/mii.h>
     13#include <linux/module.h>
     14#include <linux/netdevice.h>
     15#include <linux/phy.h>
     16#include <linux/regmap.h>
     17#include <linux/skbuff.h>
     18#include <linux/spinlock.h>
     19#include <linux/spi/spi.h>
     20#include <linux/types.h>
     21
     22#include "dm9051.h"
     23
     24#define DRVNAME_9051	"dm9051"
     25
     26/**
     27 * struct rx_ctl_mach - rx activities record
     28 * @status_err_counter: rx status error counter
     29 * @large_err_counter: rx get large packet length error counter
     30 * @rx_err_counter: receive packet error counter
     31 * @tx_err_counter: transmit packet error counter
     32 * @fifo_rst_counter: reset operation counter
     33 *
     34 * To keep track for the driver operation statistics
     35 */
     36struct rx_ctl_mach {
     37	u16				status_err_counter;
     38	u16				large_err_counter;
     39	u16				rx_err_counter;
     40	u16				tx_err_counter;
     41	u16				fifo_rst_counter;
     42};
     43
     44/**
     45 * struct dm9051_rxctrl - dm9051 driver rx control
     46 * @hash_table: Multicast hash-table data
     47 * @rcr_all: KS_RXCR1 register setting
     48 *
     49 * The settings needs to control the receive filtering
     50 * such as the multicast hash-filter and the receive register settings
     51 */
     52struct dm9051_rxctrl {
     53	u16				hash_table[4];
     54	u8				rcr_all;
     55};
     56
     57/**
     58 * struct dm9051_rxhdr - rx packet data header
     59 * @headbyte: lead byte equal to 0x01 notifies a valid packet
     60 * @status: status bits for the received packet
     61 * @rxlen: packet length
     62 *
     63 * The Rx packed, entered into the FIFO memory, start with these
     64 * four bytes which is the Rx header, followed by the ethernet
     65 * packet data and ends with an appended 4-byte CRC data.
     66 * Both Rx packet and CRC data are for check purpose and finally
     67 * are dropped by this driver
     68 */
     69struct dm9051_rxhdr {
     70	u8				headbyte;
     71	u8				status;
     72	__le16				rxlen;
     73};
     74
     75/**
     76 * struct board_info - maintain the saved data
     77 * @spidev: spi device structure
     78 * @ndev: net device structure
     79 * @mdiobus: mii bus structure
     80 * @phydev: phy device structure
     81 * @txq: tx queue structure
     82 * @regmap_dm: regmap for register read/write
     83 * @regmap_dmbulk: extra regmap for bulk read/write
     84 * @rxctrl_work: Work queue for updating RX mode and multicast lists
     85 * @tx_work: Work queue for tx packets
     86 * @pause: ethtool pause parameter structure
     87 * @spi_lockm: between threads lock structure
     88 * @reg_mutex: regmap access lock structure
     89 * @bc: rx control statistics structure
     90 * @rxhdr: rx header structure
     91 * @rctl: rx control setting structure
     92 * @msg_enable: message level value
     93 * @imr_all: to store operating imr value for register DM9051_IMR
     94 * @lcr_all: to store operating rcr value for register DM9051_LMCR
     95 *
     96 * The saved data variables, keep up to date for retrieval back to use
     97 */
     98struct board_info {
     99	u32				msg_enable;
    100	struct spi_device		*spidev;
    101	struct net_device		*ndev;
    102	struct mii_bus			*mdiobus;
    103	struct phy_device		*phydev;
    104	struct sk_buff_head		txq;
    105	struct regmap			*regmap_dm;
    106	struct regmap			*regmap_dmbulk;
    107	struct work_struct		rxctrl_work;
    108	struct work_struct		tx_work;
    109	struct ethtool_pauseparam	pause;
    110	struct mutex			spi_lockm;
    111	struct mutex			reg_mutex;
    112	struct rx_ctl_mach		bc;
    113	struct dm9051_rxhdr		rxhdr;
    114	struct dm9051_rxctrl		rctl;
    115	u8				imr_all;
    116	u8				lcr_all;
    117};
    118
    119static int dm9051_set_reg(struct board_info *db, unsigned int reg, unsigned int val)
    120{
    121	int ret;
    122
    123	ret = regmap_write(db->regmap_dm, reg, val);
    124	if (ret < 0)
    125		netif_err(db, drv, db->ndev, "%s: error %d set reg %02x\n",
    126			  __func__, ret, reg);
    127	return ret;
    128}
    129
    130static int dm9051_update_bits(struct board_info *db, unsigned int reg, unsigned int mask,
    131			      unsigned int val)
    132{
    133	int ret;
    134
    135	ret = regmap_update_bits(db->regmap_dm, reg, mask, val);
    136	if (ret < 0)
    137		netif_err(db, drv, db->ndev, "%s: error %d update bits reg %02x\n",
    138			  __func__, ret, reg);
    139	return ret;
    140}
    141
    142/* skb buffer exhausted, just discard the received data
    143 */
    144static int dm9051_dumpblk(struct board_info *db, u8 reg, size_t count)
    145{
    146	struct net_device *ndev = db->ndev;
    147	unsigned int rb;
    148	int ret;
    149
    150	/* no skb buffer,
    151	 * both reg and &rb must be noinc,
    152	 * read once one byte via regmap_read
    153	 */
    154	do {
    155		ret = regmap_read(db->regmap_dm, reg, &rb);
    156		if (ret < 0) {
    157			netif_err(db, drv, ndev, "%s: error %d dumping read reg %02x\n",
    158				  __func__, ret, reg);
    159			break;
    160		}
    161	} while (--count);
    162
    163	return ret;
    164}
    165
    166static int dm9051_set_regs(struct board_info *db, unsigned int reg, const void *val,
    167			   size_t val_count)
    168{
    169	int ret;
    170
    171	ret = regmap_bulk_write(db->regmap_dmbulk, reg, val, val_count);
    172	if (ret < 0)
    173		netif_err(db, drv, db->ndev, "%s: error %d bulk writing regs %02x\n",
    174			  __func__, ret, reg);
    175	return ret;
    176}
    177
    178static int dm9051_get_regs(struct board_info *db, unsigned int reg, void *val,
    179			   size_t val_count)
    180{
    181	int ret;
    182
    183	ret = regmap_bulk_read(db->regmap_dmbulk, reg, val, val_count);
    184	if (ret < 0)
    185		netif_err(db, drv, db->ndev, "%s: error %d bulk reading regs %02x\n",
    186			  __func__, ret, reg);
    187	return ret;
    188}
    189
    190static int dm9051_write_mem(struct board_info *db, unsigned int reg, const void *buff,
    191			    size_t len)
    192{
    193	int ret;
    194
    195	ret = regmap_noinc_write(db->regmap_dm, reg, buff, len);
    196	if (ret < 0)
    197		netif_err(db, drv, db->ndev, "%s: error %d noinc writing regs %02x\n",
    198			  __func__, ret, reg);
    199	return ret;
    200}
    201
    202static int dm9051_read_mem(struct board_info *db, unsigned int reg, void *buff,
    203			   size_t len)
    204{
    205	int ret;
    206
    207	ret = regmap_noinc_read(db->regmap_dm, reg, buff, len);
    208	if (ret < 0)
    209		netif_err(db, drv, db->ndev, "%s: error %d noinc reading regs %02x\n",
    210			  __func__, ret, reg);
    211	return ret;
    212}
    213
    214/* waiting tx-end rather than tx-req
    215 * got faster
    216 */
    217static int dm9051_nsr_poll(struct board_info *db)
    218{
    219	unsigned int mval;
    220	int ret;
    221
    222	ret = regmap_read_poll_timeout(db->regmap_dm, DM9051_NSR, mval,
    223				       mval & (NSR_TX2END | NSR_TX1END), 1, 20);
    224	if (ret == -ETIMEDOUT)
    225		netdev_err(db->ndev, "timeout in checking for tx end\n");
    226	return ret;
    227}
    228
    229static int dm9051_epcr_poll(struct board_info *db)
    230{
    231	unsigned int mval;
    232	int ret;
    233
    234	ret = regmap_read_poll_timeout(db->regmap_dm, DM9051_EPCR, mval,
    235				       !(mval & EPCR_ERRE), 100, 10000);
    236	if (ret == -ETIMEDOUT)
    237		netdev_err(db->ndev, "eeprom/phy in processing get timeout\n");
    238	return ret;
    239}
    240
    241static int dm9051_irq_flag(struct board_info *db)
    242{
    243	struct spi_device *spi = db->spidev;
    244	int irq_type = irq_get_trigger_type(spi->irq);
    245
    246	if (irq_type)
    247		return irq_type;
    248
    249	return IRQF_TRIGGER_LOW;
    250}
    251
    252static unsigned int dm9051_intcr_value(struct board_info *db)
    253{
    254	return (dm9051_irq_flag(db) == IRQF_TRIGGER_LOW) ?
    255		INTCR_POL_LOW : INTCR_POL_HIGH;
    256}
    257
    258static int dm9051_set_fcr(struct board_info *db)
    259{
    260	u8 fcr = 0;
    261
    262	if (db->pause.rx_pause)
    263		fcr |= FCR_BKPM | FCR_FLCE;
    264	if (db->pause.tx_pause)
    265		fcr |= FCR_TXPEN;
    266
    267	return dm9051_set_reg(db, DM9051_FCR, fcr);
    268}
    269
    270static int dm9051_set_recv(struct board_info *db)
    271{
    272	int ret;
    273
    274	ret = dm9051_set_regs(db, DM9051_MAR, db->rctl.hash_table, sizeof(db->rctl.hash_table));
    275	if (ret)
    276		return ret;
    277
    278	return dm9051_set_reg(db, DM9051_RCR, db->rctl.rcr_all); /* enable rx */
    279}
    280
    281static int dm9051_core_reset(struct board_info *db)
    282{
    283	int ret;
    284
    285	db->bc.fifo_rst_counter++;
    286
    287	ret = regmap_write(db->regmap_dm, DM9051_NCR, NCR_RST); /* NCR reset */
    288	if (ret)
    289		return ret;
    290	ret = regmap_write(db->regmap_dm, DM9051_MBNDRY, MBNDRY_BYTE); /* MemBound */
    291	if (ret)
    292		return ret;
    293	ret = regmap_write(db->regmap_dm, DM9051_PPCR, PPCR_PAUSE_COUNT); /* Pause Count */
    294	if (ret)
    295		return ret;
    296	ret = regmap_write(db->regmap_dm, DM9051_LMCR, db->lcr_all); /* LEDMode1 */
    297	if (ret)
    298		return ret;
    299
    300	return dm9051_set_reg(db, DM9051_INTCR, dm9051_intcr_value(db));
    301}
    302
    303static int dm9051_update_fcr(struct board_info *db)
    304{
    305	u8 fcr = 0;
    306
    307	if (db->pause.rx_pause)
    308		fcr |= FCR_BKPM | FCR_FLCE;
    309	if (db->pause.tx_pause)
    310		fcr |= FCR_TXPEN;
    311
    312	return dm9051_update_bits(db, DM9051_FCR, FCR_RXTX_BITS, fcr);
    313}
    314
    315static int dm9051_disable_interrupt(struct board_info *db)
    316{
    317	return dm9051_set_reg(db, DM9051_IMR, IMR_PAR); /* disable int */
    318}
    319
    320static int dm9051_enable_interrupt(struct board_info *db)
    321{
    322	return dm9051_set_reg(db, DM9051_IMR, db->imr_all); /* enable int */
    323}
    324
    325static int dm9051_stop_mrcmd(struct board_info *db)
    326{
    327	return dm9051_set_reg(db, DM9051_ISR, ISR_STOP_MRCMD); /* to stop mrcmd */
    328}
    329
    330static int dm9051_clear_interrupt(struct board_info *db)
    331{
    332	return dm9051_update_bits(db, DM9051_ISR, ISR_CLR_INT, ISR_CLR_INT);
    333}
    334
    335static int dm9051_eeprom_read(struct board_info *db, int offset, u8 *to)
    336{
    337	int ret;
    338
    339	ret = regmap_write(db->regmap_dm, DM9051_EPAR, offset);
    340	if (ret)
    341		return ret;
    342
    343	ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_ERPRR);
    344	if (ret)
    345		return ret;
    346
    347	ret = dm9051_epcr_poll(db);
    348	if (ret)
    349		return ret;
    350
    351	ret = regmap_write(db->regmap_dm, DM9051_EPCR, 0);
    352	if (ret)
    353		return ret;
    354
    355	return regmap_bulk_read(db->regmap_dmbulk, DM9051_EPDRL, to, 2);
    356}
    357
    358static int dm9051_eeprom_write(struct board_info *db, int offset, u8 *data)
    359{
    360	int ret;
    361
    362	ret = regmap_write(db->regmap_dm, DM9051_EPAR, offset);
    363	if (ret)
    364		return ret;
    365
    366	ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_EPDRL, data, 2);
    367	if (ret < 0)
    368		return ret;
    369
    370	ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_WEP | EPCR_ERPRW);
    371	if (ret)
    372		return ret;
    373
    374	ret = dm9051_epcr_poll(db);
    375	if (ret)
    376		return ret;
    377
    378	return regmap_write(db->regmap_dm, DM9051_EPCR, 0);
    379}
    380
    381static int dm9051_phyread(void *context, unsigned int reg, unsigned int *val)
    382{
    383	struct board_info *db = context;
    384	int ret;
    385
    386	ret = regmap_write(db->regmap_dm, DM9051_EPAR, DM9051_PHY | reg);
    387	if (ret)
    388		return ret;
    389
    390	ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_ERPRR | EPCR_EPOS);
    391	if (ret)
    392		return ret;
    393
    394	ret = dm9051_epcr_poll(db);
    395	if (ret)
    396		return ret;
    397
    398	ret = regmap_write(db->regmap_dm, DM9051_EPCR, 0);
    399	if (ret)
    400		return ret;
    401
    402	/* this is a 4 bytes data, clear to zero since following regmap_bulk_read
    403	 * only fill lower 2 bytes
    404	 */
    405	*val = 0;
    406	return regmap_bulk_read(db->regmap_dmbulk, DM9051_EPDRL, val, 2);
    407}
    408
    409static int dm9051_phywrite(void *context, unsigned int reg, unsigned int val)
    410{
    411	struct board_info *db = context;
    412	int ret;
    413
    414	ret = regmap_write(db->regmap_dm, DM9051_EPAR, DM9051_PHY | reg);
    415	if (ret)
    416		return ret;
    417
    418	ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_EPDRL, &val, 2);
    419	if (ret < 0)
    420		return ret;
    421
    422	ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_EPOS | EPCR_ERPRW);
    423	if (ret)
    424		return ret;
    425
    426	ret = dm9051_epcr_poll(db);
    427	if (ret)
    428		return ret;
    429
    430	return regmap_write(db->regmap_dm, DM9051_EPCR, 0);
    431}
    432
    433static int dm9051_mdio_read(struct mii_bus *bus, int addr, int regnum)
    434{
    435	struct board_info *db = bus->priv;
    436	unsigned int val = 0xffff;
    437	int ret;
    438
    439	if (addr == DM9051_PHY_ADDR) {
    440		ret = dm9051_phyread(db, regnum, &val);
    441		if (ret)
    442			return ret;
    443	}
    444
    445	return val;
    446}
    447
    448static int dm9051_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
    449{
    450	struct board_info *db = bus->priv;
    451
    452	if (addr == DM9051_PHY_ADDR)
    453		return dm9051_phywrite(db, regnum, val);
    454
    455	return -ENODEV;
    456}
    457
    458static void dm9051_reg_lock_mutex(void *dbcontext)
    459{
    460	struct board_info *db = dbcontext;
    461
    462	mutex_lock(&db->reg_mutex);
    463}
    464
    465static void dm9051_reg_unlock_mutex(void *dbcontext)
    466{
    467	struct board_info *db = dbcontext;
    468
    469	mutex_unlock(&db->reg_mutex);
    470}
    471
    472static struct regmap_config regconfigdm = {
    473	.reg_bits = 8,
    474	.val_bits = 8,
    475	.max_register = 0xff,
    476	.reg_stride = 1,
    477	.cache_type = REGCACHE_NONE,
    478	.read_flag_mask = 0,
    479	.write_flag_mask = DM_SPI_WR,
    480	.val_format_endian = REGMAP_ENDIAN_LITTLE,
    481	.lock = dm9051_reg_lock_mutex,
    482	.unlock = dm9051_reg_unlock_mutex,
    483};
    484
    485static struct regmap_config regconfigdmbulk = {
    486	.reg_bits = 8,
    487	.val_bits = 8,
    488	.max_register = 0xff,
    489	.reg_stride = 1,
    490	.cache_type = REGCACHE_NONE,
    491	.read_flag_mask = 0,
    492	.write_flag_mask = DM_SPI_WR,
    493	.val_format_endian = REGMAP_ENDIAN_LITTLE,
    494	.lock = dm9051_reg_lock_mutex,
    495	.unlock = dm9051_reg_unlock_mutex,
    496	.use_single_read = true,
    497	.use_single_write = true,
    498};
    499
    500static int dm9051_map_init(struct spi_device *spi, struct board_info *db)
    501{
    502	/* create two regmap instances,
    503	 * split read/write and bulk_read/bulk_write to individual regmap
    504	 * to resolve regmap execution confliction problem
    505	 */
    506	regconfigdm.lock_arg = db;
    507	db->regmap_dm = devm_regmap_init_spi(db->spidev, &regconfigdm);
    508	if (IS_ERR(db->regmap_dm))
    509		return PTR_ERR(db->regmap_dm);
    510
    511	regconfigdmbulk.lock_arg = db;
    512	db->regmap_dmbulk = devm_regmap_init_spi(db->spidev, &regconfigdmbulk);
    513	if (IS_ERR(db->regmap_dmbulk))
    514		return PTR_ERR(db->regmap_dmbulk);
    515
    516	return 0;
    517}
    518
    519static int dm9051_map_chipid(struct board_info *db)
    520{
    521	struct device *dev = &db->spidev->dev;
    522	unsigned short wid;
    523	u8 buff[6];
    524	int ret;
    525
    526	ret = dm9051_get_regs(db, DM9051_VIDL, buff, sizeof(buff));
    527	if (ret < 0)
    528		return ret;
    529
    530	wid = get_unaligned_le16(buff + 2);
    531	if (wid != DM9051_ID) {
    532		dev_err(dev, "chipid error as %04x !\n", wid);
    533		return -ENODEV;
    534	}
    535
    536	dev_info(dev, "chip %04x found\n", wid);
    537	return 0;
    538}
    539
    540/* Read DM9051_PAR registers which is the mac address loaded from EEPROM while power-on
    541 */
    542static int dm9051_map_etherdev_par(struct net_device *ndev, struct board_info *db)
    543{
    544	u8 addr[ETH_ALEN];
    545	int ret;
    546
    547	ret = dm9051_get_regs(db, DM9051_PAR, addr, sizeof(addr));
    548	if (ret < 0)
    549		return ret;
    550
    551	if (!is_valid_ether_addr(addr)) {
    552		eth_hw_addr_random(ndev);
    553
    554		ret = dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
    555		if (ret < 0)
    556			return ret;
    557
    558		dev_dbg(&db->spidev->dev, "Use random MAC address\n");
    559		return 0;
    560	}
    561
    562	eth_hw_addr_set(ndev, addr);
    563	return 0;
    564}
    565
    566/* ethtool-ops
    567 */
    568static void dm9051_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
    569{
    570	strscpy(info->driver, DRVNAME_9051, sizeof(info->driver));
    571}
    572
    573static void dm9051_set_msglevel(struct net_device *ndev, u32 value)
    574{
    575	struct board_info *db = to_dm9051_board(ndev);
    576
    577	db->msg_enable = value;
    578}
    579
    580static u32 dm9051_get_msglevel(struct net_device *ndev)
    581{
    582	struct board_info *db = to_dm9051_board(ndev);
    583
    584	return db->msg_enable;
    585}
    586
    587static int dm9051_get_eeprom_len(struct net_device *dev)
    588{
    589	return 128;
    590}
    591
    592static int dm9051_get_eeprom(struct net_device *ndev,
    593			     struct ethtool_eeprom *ee, u8 *data)
    594{
    595	struct board_info *db = to_dm9051_board(ndev);
    596	int offset = ee->offset;
    597	int len = ee->len;
    598	int i, ret;
    599
    600	if ((len | offset) & 1)
    601		return -EINVAL;
    602
    603	ee->magic = DM_EEPROM_MAGIC;
    604
    605	for (i = 0; i < len; i += 2) {
    606		ret = dm9051_eeprom_read(db, (offset + i) / 2, data + i);
    607		if (ret)
    608			break;
    609	}
    610	return ret;
    611}
    612
    613static int dm9051_set_eeprom(struct net_device *ndev,
    614			     struct ethtool_eeprom *ee, u8 *data)
    615{
    616	struct board_info *db = to_dm9051_board(ndev);
    617	int offset = ee->offset;
    618	int len = ee->len;
    619	int i, ret;
    620
    621	if ((len | offset) & 1)
    622		return -EINVAL;
    623
    624	if (ee->magic != DM_EEPROM_MAGIC)
    625		return -EINVAL;
    626
    627	for (i = 0; i < len; i += 2) {
    628		ret = dm9051_eeprom_write(db, (offset + i) / 2, data + i);
    629		if (ret)
    630			break;
    631	}
    632	return ret;
    633}
    634
    635static void dm9051_get_pauseparam(struct net_device *ndev,
    636				  struct ethtool_pauseparam *pause)
    637{
    638	struct board_info *db = to_dm9051_board(ndev);
    639
    640	*pause = db->pause;
    641}
    642
    643static int dm9051_set_pauseparam(struct net_device *ndev,
    644				 struct ethtool_pauseparam *pause)
    645{
    646	struct board_info *db = to_dm9051_board(ndev);
    647
    648	db->pause = *pause;
    649
    650	if (pause->autoneg == AUTONEG_DISABLE)
    651		return dm9051_update_fcr(db);
    652
    653	phy_set_sym_pause(db->phydev, pause->rx_pause, pause->tx_pause,
    654			  pause->autoneg);
    655	phy_start_aneg(db->phydev);
    656	return 0;
    657}
    658
    659static const struct ethtool_ops dm9051_ethtool_ops = {
    660	.get_drvinfo = dm9051_get_drvinfo,
    661	.get_link_ksettings = phy_ethtool_get_link_ksettings,
    662	.set_link_ksettings = phy_ethtool_set_link_ksettings,
    663	.get_msglevel = dm9051_get_msglevel,
    664	.set_msglevel = dm9051_set_msglevel,
    665	.nway_reset = phy_ethtool_nway_reset,
    666	.get_link = ethtool_op_get_link,
    667	.get_eeprom_len = dm9051_get_eeprom_len,
    668	.get_eeprom = dm9051_get_eeprom,
    669	.set_eeprom = dm9051_set_eeprom,
    670	.get_pauseparam = dm9051_get_pauseparam,
    671	.set_pauseparam = dm9051_set_pauseparam,
    672};
    673
    674static int dm9051_all_start(struct board_info *db)
    675{
    676	int ret;
    677
    678	/* GPR power on of the internal phy
    679	 */
    680	ret = dm9051_set_reg(db, DM9051_GPR, 0);
    681	if (ret)
    682		return ret;
    683
    684	/* dm9051 chip registers could not be accessed within 1 ms
    685	 * after GPR power on, delay 1 ms is essential
    686	 */
    687	msleep(1);
    688
    689	ret = dm9051_core_reset(db);
    690	if (ret)
    691		return ret;
    692
    693	return dm9051_enable_interrupt(db);
    694}
    695
    696static int dm9051_all_stop(struct board_info *db)
    697{
    698	int ret;
    699
    700	/* GPR power off of the internal phy,
    701	 * The internal phy still could be accessed after this GPR power off control
    702	 */
    703	ret = dm9051_set_reg(db, DM9051_GPR, GPR_PHY_OFF);
    704	if (ret)
    705		return ret;
    706
    707	return dm9051_set_reg(db, DM9051_RCR, RCR_RX_DISABLE);
    708}
    709
    710/* fifo reset while rx error found
    711 */
    712static int dm9051_all_restart(struct board_info *db)
    713{
    714	struct net_device *ndev = db->ndev;
    715	int ret;
    716
    717	ret = dm9051_core_reset(db);
    718	if (ret)
    719		return ret;
    720
    721	ret = dm9051_enable_interrupt(db);
    722	if (ret)
    723		return ret;
    724
    725	netdev_dbg(ndev, " rxstatus_Er & rxlen_Er %d, RST_c %d\n",
    726		   db->bc.status_err_counter + db->bc.large_err_counter,
    727		   db->bc.fifo_rst_counter);
    728
    729	ret = dm9051_set_recv(db);
    730	if (ret)
    731		return ret;
    732
    733	return dm9051_set_fcr(db);
    734}
    735
    736/* read packets from the fifo memory
    737 * return value,
    738 *  > 0 - read packet number, caller can repeat the rx operation
    739 *    0 - no error, caller need stop further rx operation
    740 *  -EBUSY - read data error, caller escape from rx operation
    741 */
    742static int dm9051_loop_rx(struct board_info *db)
    743{
    744	struct net_device *ndev = db->ndev;
    745	unsigned int rxbyte;
    746	int ret, rxlen;
    747	struct sk_buff *skb;
    748	u8 *rdptr;
    749	int scanrr = 0;
    750
    751	do {
    752		ret = dm9051_read_mem(db, DM_SPI_MRCMDX, &rxbyte, 2);
    753		if (ret)
    754			return ret;
    755
    756		if ((rxbyte & GENMASK(7, 0)) != DM9051_PKT_RDY)
    757			break; /* exhaust-empty */
    758
    759		ret = dm9051_read_mem(db, DM_SPI_MRCMD, &db->rxhdr, DM_RXHDR_SIZE);
    760		if (ret)
    761			return ret;
    762
    763		ret = dm9051_stop_mrcmd(db);
    764		if (ret)
    765			return ret;
    766
    767		rxlen = le16_to_cpu(db->rxhdr.rxlen);
    768		if (db->rxhdr.status & RSR_ERR_BITS || rxlen > DM9051_PKT_MAX) {
    769			netdev_dbg(ndev, "rxhdr-byte (%02x)\n",
    770				   db->rxhdr.headbyte);
    771
    772			if (db->rxhdr.status & RSR_ERR_BITS) {
    773				db->bc.status_err_counter++;
    774				netdev_dbg(ndev, "check rxstatus-error (%02x)\n",
    775					   db->rxhdr.status);
    776			} else {
    777				db->bc.large_err_counter++;
    778				netdev_dbg(ndev, "check rxlen large-error (%d > %d)\n",
    779					   rxlen, DM9051_PKT_MAX);
    780			}
    781			return dm9051_all_restart(db);
    782		}
    783
    784		skb = dev_alloc_skb(rxlen);
    785		if (!skb) {
    786			ret = dm9051_dumpblk(db, DM_SPI_MRCMD, rxlen);
    787			if (ret)
    788				return ret;
    789			return scanrr;
    790		}
    791
    792		rdptr = skb_put(skb, rxlen - 4);
    793		ret = dm9051_read_mem(db, DM_SPI_MRCMD, rdptr, rxlen);
    794		if (ret) {
    795			db->bc.rx_err_counter++;
    796			dev_kfree_skb(skb);
    797			return ret;
    798		}
    799
    800		ret = dm9051_stop_mrcmd(db);
    801		if (ret)
    802			return ret;
    803
    804		skb->protocol = eth_type_trans(skb, db->ndev);
    805		if (db->ndev->features & NETIF_F_RXCSUM)
    806			skb_checksum_none_assert(skb);
    807		netif_rx(skb);
    808		db->ndev->stats.rx_bytes += rxlen;
    809		db->ndev->stats.rx_packets++;
    810		scanrr++;
    811	} while (!ret);
    812
    813	return scanrr;
    814}
    815
    816/* transmit a packet,
    817 * return value,
    818 *   0 - succeed
    819 *  -ETIMEDOUT - timeout error
    820 */
    821static int dm9051_single_tx(struct board_info *db, u8 *buff, unsigned int len)
    822{
    823	int ret;
    824
    825	ret = dm9051_nsr_poll(db);
    826	if (ret)
    827		return ret;
    828
    829	ret = dm9051_write_mem(db, DM_SPI_MWCMD, buff, len);
    830	if (ret)
    831		return ret;
    832
    833	ret = dm9051_set_regs(db, DM9051_TXPLL, &len, 2);
    834	if (ret < 0)
    835		return ret;
    836
    837	return dm9051_set_reg(db, DM9051_TCR, TCR_TXREQ);
    838}
    839
    840static int dm9051_loop_tx(struct board_info *db)
    841{
    842	struct net_device *ndev = db->ndev;
    843	int ntx = 0;
    844	int ret;
    845
    846	while (!skb_queue_empty(&db->txq)) {
    847		struct sk_buff *skb;
    848		unsigned int len;
    849
    850		skb = skb_dequeue(&db->txq);
    851		if (skb) {
    852			ntx++;
    853			ret = dm9051_single_tx(db, skb->data, skb->len);
    854			len = skb->len;
    855			dev_kfree_skb(skb);
    856			if (ret < 0) {
    857				db->bc.tx_err_counter++;
    858				return 0;
    859			}
    860			ndev->stats.tx_bytes += len;
    861			ndev->stats.tx_packets++;
    862		}
    863
    864		if (netif_queue_stopped(ndev) &&
    865		    (skb_queue_len(&db->txq) < DM9051_TX_QUE_LO_WATER))
    866			netif_wake_queue(ndev);
    867	}
    868
    869	return ntx;
    870}
    871
    872static irqreturn_t dm9051_rx_threaded_irq(int irq, void *pw)
    873{
    874	struct board_info *db = pw;
    875	int result, result_tx;
    876
    877	mutex_lock(&db->spi_lockm);
    878
    879	result = dm9051_disable_interrupt(db);
    880	if (result)
    881		goto out_unlock;
    882
    883	result = dm9051_clear_interrupt(db);
    884	if (result)
    885		goto out_unlock;
    886
    887	do {
    888		result = dm9051_loop_rx(db); /* threaded irq rx */
    889		if (result < 0)
    890			goto out_unlock;
    891		result_tx = dm9051_loop_tx(db); /* more tx better performance */
    892		if (result_tx < 0)
    893			goto out_unlock;
    894	} while (result > 0);
    895
    896	dm9051_enable_interrupt(db);
    897
    898	/* To exit and has mutex unlock while rx or tx error
    899	 */
    900out_unlock:
    901	mutex_unlock(&db->spi_lockm);
    902
    903	return IRQ_HANDLED;
    904}
    905
    906static void dm9051_tx_delay(struct work_struct *work)
    907{
    908	struct board_info *db = container_of(work, struct board_info, tx_work);
    909	int result;
    910
    911	mutex_lock(&db->spi_lockm);
    912
    913	result = dm9051_loop_tx(db);
    914	if (result < 0)
    915		netdev_err(db->ndev, "transmit packet error\n");
    916
    917	mutex_unlock(&db->spi_lockm);
    918}
    919
    920static void dm9051_rxctl_delay(struct work_struct *work)
    921{
    922	struct board_info *db = container_of(work, struct board_info, rxctrl_work);
    923	struct net_device *ndev = db->ndev;
    924	int result;
    925
    926	mutex_lock(&db->spi_lockm);
    927
    928	result = dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
    929	if (result < 0)
    930		goto out_unlock;
    931
    932	dm9051_set_recv(db);
    933
    934	/* To has mutex unlock and return from this function if regmap function fail
    935	 */
    936out_unlock:
    937	mutex_unlock(&db->spi_lockm);
    938}
    939
    940/* Open network device
    941 * Called when the network device is marked active, such as a user executing
    942 * 'ifconfig up' on the device
    943 */
    944static int dm9051_open(struct net_device *ndev)
    945{
    946	struct board_info *db = to_dm9051_board(ndev);
    947	struct spi_device *spi = db->spidev;
    948	int ret;
    949
    950	db->imr_all = IMR_PAR | IMR_PRM;
    951	db->lcr_all = LMCR_MODE1;
    952	db->rctl.rcr_all = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
    953	memset(db->rctl.hash_table, 0, sizeof(db->rctl.hash_table));
    954
    955	ndev->irq = spi->irq; /* by dts */
    956	ret = request_threaded_irq(spi->irq, NULL, dm9051_rx_threaded_irq,
    957				   dm9051_irq_flag(db) | IRQF_ONESHOT,
    958				   ndev->name, db);
    959	if (ret < 0) {
    960		netdev_err(ndev, "failed to get irq\n");
    961		return ret;
    962	}
    963
    964	phy_support_sym_pause(db->phydev);
    965	phy_start(db->phydev);
    966
    967	/* flow control parameters init */
    968	db->pause.rx_pause = true;
    969	db->pause.tx_pause = true;
    970	db->pause.autoneg = AUTONEG_DISABLE;
    971
    972	if (db->phydev->autoneg)
    973		db->pause.autoneg = AUTONEG_ENABLE;
    974
    975	ret = dm9051_all_start(db);
    976	if (ret) {
    977		phy_stop(db->phydev);
    978		free_irq(spi->irq, db);
    979		return ret;
    980	}
    981
    982	netif_wake_queue(ndev);
    983
    984	return 0;
    985}
    986
    987/* Close network device
    988 * Called to close down a network device which has been active. Cancel any
    989 * work, shutdown the RX and TX process and then place the chip into a low
    990 * power state while it is not being used
    991 */
    992static int dm9051_stop(struct net_device *ndev)
    993{
    994	struct board_info *db = to_dm9051_board(ndev);
    995	int ret;
    996
    997	ret = dm9051_all_stop(db);
    998	if (ret)
    999		return ret;
   1000
   1001	flush_work(&db->tx_work);
   1002	flush_work(&db->rxctrl_work);
   1003
   1004	phy_stop(db->phydev);
   1005
   1006	free_irq(db->spidev->irq, db);
   1007
   1008	netif_stop_queue(ndev);
   1009
   1010	skb_queue_purge(&db->txq);
   1011
   1012	return 0;
   1013}
   1014
   1015/* event: play a schedule starter in condition
   1016 */
   1017static netdev_tx_t dm9051_start_xmit(struct sk_buff *skb, struct net_device *ndev)
   1018{
   1019	struct board_info *db = to_dm9051_board(ndev);
   1020
   1021	skb_queue_tail(&db->txq, skb);
   1022	if (skb_queue_len(&db->txq) > DM9051_TX_QUE_HI_WATER)
   1023		netif_stop_queue(ndev); /* enforce limit queue size */
   1024
   1025	schedule_work(&db->tx_work);
   1026
   1027	return NETDEV_TX_OK;
   1028}
   1029
   1030/* event: play with a schedule starter
   1031 */
   1032static void dm9051_set_rx_mode(struct net_device *ndev)
   1033{
   1034	struct board_info *db = to_dm9051_board(ndev);
   1035	struct dm9051_rxctrl rxctrl;
   1036	struct netdev_hw_addr *ha;
   1037	u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
   1038	u32 hash_val;
   1039
   1040	memset(&rxctrl, 0, sizeof(rxctrl));
   1041
   1042	/* rx control */
   1043	if (ndev->flags & IFF_PROMISC) {
   1044		rcr |= RCR_PRMSC;
   1045		netdev_dbg(ndev, "set_multicast rcr |= RCR_PRMSC, rcr= %02x\n", rcr);
   1046	}
   1047
   1048	if (ndev->flags & IFF_ALLMULTI) {
   1049		rcr |= RCR_ALL;
   1050		netdev_dbg(ndev, "set_multicast rcr |= RCR_ALLMULTI, rcr= %02x\n", rcr);
   1051	}
   1052
   1053	rxctrl.rcr_all = rcr;
   1054
   1055	/* broadcast address */
   1056	rxctrl.hash_table[0] = 0;
   1057	rxctrl.hash_table[1] = 0;
   1058	rxctrl.hash_table[2] = 0;
   1059	rxctrl.hash_table[3] = 0x8000;
   1060
   1061	/* the multicast address in Hash Table : 64 bits */
   1062	netdev_for_each_mc_addr(ha, ndev) {
   1063		hash_val = ether_crc_le(ETH_ALEN, ha->addr) & GENMASK(5, 0);
   1064		rxctrl.hash_table[hash_val / 16] |= BIT(0) << (hash_val % 16);
   1065	}
   1066
   1067	/* schedule work to do the actual set of the data if needed */
   1068
   1069	if (memcmp(&db->rctl, &rxctrl, sizeof(rxctrl))) {
   1070		memcpy(&db->rctl, &rxctrl, sizeof(rxctrl));
   1071		schedule_work(&db->rxctrl_work);
   1072	}
   1073}
   1074
   1075/* event: write into the mac registers and eeprom directly
   1076 */
   1077static int dm9051_set_mac_address(struct net_device *ndev, void *p)
   1078{
   1079	struct board_info *db = to_dm9051_board(ndev);
   1080	int ret;
   1081
   1082	ret = eth_prepare_mac_addr_change(ndev, p);
   1083	if (ret < 0)
   1084		return ret;
   1085
   1086	eth_commit_mac_addr_change(ndev, p);
   1087	return dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
   1088}
   1089
   1090static const struct net_device_ops dm9051_netdev_ops = {
   1091	.ndo_open = dm9051_open,
   1092	.ndo_stop = dm9051_stop,
   1093	.ndo_start_xmit = dm9051_start_xmit,
   1094	.ndo_set_rx_mode = dm9051_set_rx_mode,
   1095	.ndo_validate_addr = eth_validate_addr,
   1096	.ndo_set_mac_address = dm9051_set_mac_address,
   1097};
   1098
   1099static void dm9051_operation_clear(struct board_info *db)
   1100{
   1101	db->bc.status_err_counter = 0;
   1102	db->bc.large_err_counter = 0;
   1103	db->bc.rx_err_counter = 0;
   1104	db->bc.tx_err_counter = 0;
   1105	db->bc.fifo_rst_counter = 0;
   1106}
   1107
   1108static int dm9051_mdio_register(struct board_info *db)
   1109{
   1110	struct spi_device *spi = db->spidev;
   1111	int ret;
   1112
   1113	db->mdiobus = devm_mdiobus_alloc(&spi->dev);
   1114	if (!db->mdiobus)
   1115		return -ENOMEM;
   1116
   1117	db->mdiobus->priv = db;
   1118	db->mdiobus->read = dm9051_mdio_read;
   1119	db->mdiobus->write = dm9051_mdio_write;
   1120	db->mdiobus->name = "dm9051-mdiobus";
   1121	db->mdiobus->phy_mask = (u32)~BIT(1);
   1122	db->mdiobus->parent = &spi->dev;
   1123	snprintf(db->mdiobus->id, MII_BUS_ID_SIZE,
   1124		 "dm9051-%s.%u", dev_name(&spi->dev), spi->chip_select);
   1125
   1126	ret = devm_mdiobus_register(&spi->dev, db->mdiobus);
   1127	if (ret)
   1128		dev_err(&spi->dev, "Could not register MDIO bus\n");
   1129
   1130	return ret;
   1131}
   1132
   1133static void dm9051_handle_link_change(struct net_device *ndev)
   1134{
   1135	struct board_info *db = to_dm9051_board(ndev);
   1136
   1137	phy_print_status(db->phydev);
   1138
   1139	/* only write pause settings to mac. since mac and phy are integrated
   1140	 * together, such as link state, speed and duplex are sync already
   1141	 */
   1142	if (db->phydev->link) {
   1143		if (db->phydev->pause) {
   1144			db->pause.rx_pause = true;
   1145			db->pause.tx_pause = true;
   1146		}
   1147		dm9051_update_fcr(db);
   1148	}
   1149}
   1150
   1151/* phy connect as poll mode
   1152 */
   1153static int dm9051_phy_connect(struct board_info *db)
   1154{
   1155	char phy_id[MII_BUS_ID_SIZE + 3];
   1156
   1157	snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
   1158		 db->mdiobus->id, DM9051_PHY_ADDR);
   1159
   1160	db->phydev = phy_connect(db->ndev, phy_id, dm9051_handle_link_change,
   1161				 PHY_INTERFACE_MODE_MII);
   1162	if (IS_ERR(db->phydev))
   1163		return PTR_ERR_OR_ZERO(db->phydev);
   1164	return 0;
   1165}
   1166
   1167static int dm9051_probe(struct spi_device *spi)
   1168{
   1169	struct device *dev = &spi->dev;
   1170	struct net_device *ndev;
   1171	struct board_info *db;
   1172	int ret;
   1173
   1174	ndev = devm_alloc_etherdev(dev, sizeof(struct board_info));
   1175	if (!ndev)
   1176		return -ENOMEM;
   1177
   1178	SET_NETDEV_DEV(ndev, dev);
   1179	dev_set_drvdata(dev, ndev);
   1180
   1181	db = netdev_priv(ndev);
   1182
   1183	db->msg_enable = 0;
   1184	db->spidev = spi;
   1185	db->ndev = ndev;
   1186
   1187	ndev->netdev_ops = &dm9051_netdev_ops;
   1188	ndev->ethtool_ops = &dm9051_ethtool_ops;
   1189
   1190	mutex_init(&db->spi_lockm);
   1191	mutex_init(&db->reg_mutex);
   1192
   1193	INIT_WORK(&db->rxctrl_work, dm9051_rxctl_delay);
   1194	INIT_WORK(&db->tx_work, dm9051_tx_delay);
   1195
   1196	ret = dm9051_map_init(spi, db);
   1197	if (ret)
   1198		return ret;
   1199
   1200	ret = dm9051_map_chipid(db);
   1201	if (ret)
   1202		return ret;
   1203
   1204	ret = dm9051_map_etherdev_par(ndev, db);
   1205	if (ret < 0)
   1206		return ret;
   1207
   1208	ret = dm9051_mdio_register(db);
   1209	if (ret)
   1210		return ret;
   1211
   1212	ret = dm9051_phy_connect(db);
   1213	if (ret)
   1214		return ret;
   1215
   1216	dm9051_operation_clear(db);
   1217	skb_queue_head_init(&db->txq);
   1218
   1219	ret = devm_register_netdev(dev, ndev);
   1220	if (ret) {
   1221		phy_disconnect(db->phydev);
   1222		return dev_err_probe(dev, ret, "device register failed");
   1223	}
   1224
   1225	return 0;
   1226}
   1227
   1228static void dm9051_drv_remove(struct spi_device *spi)
   1229{
   1230	struct device *dev = &spi->dev;
   1231	struct net_device *ndev = dev_get_drvdata(dev);
   1232	struct board_info *db = to_dm9051_board(ndev);
   1233
   1234	phy_disconnect(db->phydev);
   1235}
   1236
   1237static const struct of_device_id dm9051_match_table[] = {
   1238	{ .compatible = "davicom,dm9051" },
   1239	{}
   1240};
   1241
   1242static const struct spi_device_id dm9051_id_table[] = {
   1243	{ "dm9051", 0 },
   1244	{}
   1245};
   1246
   1247static struct spi_driver dm9051_driver = {
   1248	.driver = {
   1249		.name = DRVNAME_9051,
   1250		.of_match_table = dm9051_match_table,
   1251	},
   1252	.probe = dm9051_probe,
   1253	.remove = dm9051_drv_remove,
   1254	.id_table = dm9051_id_table,
   1255};
   1256module_spi_driver(dm9051_driver);
   1257
   1258MODULE_AUTHOR("Joseph CHANG <joseph_chang@davicom.com.tw>");
   1259MODULE_DESCRIPTION("Davicom DM9051 network SPI driver");
   1260MODULE_LICENSE("GPL");