cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fman.h (14695B)


      1/*
      2 * Copyright 2008-2015 Freescale Semiconductor Inc.
      3 * Copyright 2020 NXP
      4 *
      5 * Redistribution and use in source and binary forms, with or without
      6 * modification, are permitted provided that the following conditions are met:
      7 *     * Redistributions of source code must retain the above copyright
      8 *       notice, this list of conditions and the following disclaimer.
      9 *     * Redistributions in binary form must reproduce the above copyright
     10 *       notice, this list of conditions and the following disclaimer in the
     11 *       documentation and/or other materials provided with the distribution.
     12 *     * Neither the name of Freescale Semiconductor nor the
     13 *       names of its contributors may be used to endorse or promote products
     14 *       derived from this software without specific prior written permission.
     15 *
     16 *
     17 * ALTERNATIVELY, this software may be distributed under the terms of the
     18 * GNU General Public License ("GPL") as published by the Free Software
     19 * Foundation, either version 2 of that License or (at your option) any
     20 * later version.
     21 *
     22 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     23 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     25 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     26 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32 */
     33
     34#ifndef __FM_H
     35#define __FM_H
     36
     37#include <linux/io.h>
     38#include <linux/interrupt.h>
     39#include <linux/of_irq.h>
     40
     41/* FM Frame descriptor macros  */
     42/* Frame queue Context Override */
     43#define FM_FD_CMD_FCO                   0x80000000
     44#define FM_FD_CMD_RPD                   0x40000000  /* Read Prepended Data */
     45#define FM_FD_CMD_UPD			0x20000000  /* Update Prepended Data */
     46#define FM_FD_CMD_DTC                   0x10000000  /* Do L4 Checksum */
     47
     48/* TX-Port: Unsupported Format */
     49#define FM_FD_ERR_UNSUPPORTED_FORMAT    0x04000000
     50/* TX Port: Length Error */
     51#define FM_FD_ERR_LENGTH                0x02000000
     52#define FM_FD_ERR_DMA                   0x01000000  /* DMA Data error */
     53
     54/* IPR frame (not error) */
     55#define FM_FD_IPR                       0x00000001
     56/* IPR non-consistent-sp */
     57#define FM_FD_ERR_IPR_NCSP              (0x00100000 | FM_FD_IPR)
     58/* IPR error */
     59#define FM_FD_ERR_IPR                   (0x00200000 | FM_FD_IPR)
     60/* IPR timeout */
     61#define FM_FD_ERR_IPR_TO                (0x00300000 | FM_FD_IPR)
     62/* TX Port: Length Error */
     63#define FM_FD_ERR_IPRE                  (FM_FD_ERR_IPR & ~FM_FD_IPR)
     64
     65/* Rx FIFO overflow, FCS error, code error, running disparity error
     66 * (SGMII and TBI modes), FIFO parity error. PHY Sequence error,
     67 * PHY error control character detected.
     68 */
     69#define FM_FD_ERR_PHYSICAL              0x00080000
     70/* Frame too long OR Frame size exceeds max_length_frame  */
     71#define FM_FD_ERR_SIZE                  0x00040000
     72/* classification discard */
     73#define FM_FD_ERR_CLS_DISCARD           0x00020000
     74/* Extract Out of Frame */
     75#define FM_FD_ERR_EXTRACTION            0x00008000
     76/* No Scheme Selected */
     77#define FM_FD_ERR_NO_SCHEME             0x00004000
     78/* Keysize Overflow */
     79#define FM_FD_ERR_KEYSIZE_OVERFLOW      0x00002000
     80/* Frame color is red */
     81#define FM_FD_ERR_COLOR_RED             0x00000800
     82/* Frame color is yellow */
     83#define FM_FD_ERR_COLOR_YELLOW          0x00000400
     84/* Parser Time out Exceed */
     85#define FM_FD_ERR_PRS_TIMEOUT           0x00000080
     86/* Invalid Soft Parser instruction */
     87#define FM_FD_ERR_PRS_ILL_INSTRUCT      0x00000040
     88/* Header error was identified during parsing */
     89#define FM_FD_ERR_PRS_HDR_ERR           0x00000020
     90/* Frame parsed beyind 256 first bytes */
     91#define FM_FD_ERR_BLOCK_LIMIT_EXCEEDED  0x00000008
     92
     93/* non Frame-Manager error */
     94#define FM_FD_RX_STATUS_ERR_NON_FM      0x00400000
     95
     96/* FMan driver defines */
     97#define FMAN_BMI_FIFO_UNITS		0x100
     98#define OFFSET_UNITS			16
     99
    100/* BMan defines */
    101#define BM_MAX_NUM_OF_POOLS		64 /* Buffers pools */
    102#define FMAN_PORT_MAX_EXT_POOLS_NUM	8  /* External BM pools per Rx port */
    103
    104struct fman; /* FMan data */
    105
    106/* Enum for defining port types */
    107enum fman_port_type {
    108	FMAN_PORT_TYPE_TX = 0,	/* TX Port */
    109	FMAN_PORT_TYPE_RX,	/* RX Port */
    110};
    111
    112struct fman_rev_info {
    113	u8 major;			/* Major revision */
    114	u8 minor;			/* Minor revision */
    115};
    116
    117enum fman_exceptions {
    118	FMAN_EX_DMA_BUS_ERROR = 0,	/* DMA bus error. */
    119	FMAN_EX_DMA_READ_ECC,		/* Read Buffer ECC error */
    120	FMAN_EX_DMA_SYSTEM_WRITE_ECC,	/* Write Buffer ECC err on sys side */
    121	FMAN_EX_DMA_FM_WRITE_ECC,	/* Write Buffer ECC error on FM side */
    122	FMAN_EX_DMA_SINGLE_PORT_ECC,	/* Single Port ECC error on FM side */
    123	FMAN_EX_FPM_STALL_ON_TASKS,	/* Stall of tasks on FPM */
    124	FMAN_EX_FPM_SINGLE_ECC,		/* Single ECC on FPM. */
    125	FMAN_EX_FPM_DOUBLE_ECC,		/* Double ECC error on FPM ram access */
    126	FMAN_EX_QMI_SINGLE_ECC,	/* Single ECC on QMI. */
    127	FMAN_EX_QMI_DOUBLE_ECC,	/* Double bit ECC occurred on QMI */
    128	FMAN_EX_QMI_DEQ_FROM_UNKNOWN_PORTID,/* DeQ from unknown port id */
    129	FMAN_EX_BMI_LIST_RAM_ECC,	/* Linked List RAM ECC error */
    130	FMAN_EX_BMI_STORAGE_PROFILE_ECC,/* storage profile */
    131	FMAN_EX_BMI_STATISTICS_RAM_ECC,/* Statistics RAM ECC Err Enable */
    132	FMAN_EX_BMI_DISPATCH_RAM_ECC,	/* Dispatch RAM ECC Error Enable */
    133	FMAN_EX_IRAM_ECC,		/* Double bit ECC occurred on IRAM */
    134	FMAN_EX_MURAM_ECC		/* Double bit ECC occurred on MURAM */
    135};
    136
    137/* Parse results memory layout */
    138struct fman_prs_result {
    139	u8 lpid;		/* Logical port id */
    140	u8 shimr;		/* Shim header result  */
    141	__be16 l2r;		/* Layer 2 result */
    142	__be16 l3r;		/* Layer 3 result */
    143	u8 l4r;		/* Layer 4 result */
    144	u8 cplan;		/* Classification plan id */
    145	__be16 nxthdr;		/* Next Header  */
    146	__be16 cksum;		/* Running-sum */
    147	/* Flags&fragment-offset field of the last IP-header */
    148	__be16 flags_frag_off;
    149	/* Routing type field of a IPV6 routing extension header */
    150	u8 route_type;
    151	/* Routing Extension Header Present; last bit is IP valid */
    152	u8 rhp_ip_valid;
    153	u8 shim_off[2];		/* Shim offset */
    154	u8 ip_pid_off;		/* IP PID (last IP-proto) offset */
    155	u8 eth_off;		/* ETH offset */
    156	u8 llc_snap_off;	/* LLC_SNAP offset */
    157	u8 vlan_off[2];		/* VLAN offset */
    158	u8 etype_off;		/* ETYPE offset */
    159	u8 pppoe_off;		/* PPP offset */
    160	u8 mpls_off[2];		/* MPLS offset */
    161	u8 ip_off[2];		/* IP offset */
    162	u8 gre_off;		/* GRE offset */
    163	u8 l4_off;		/* Layer 4 offset */
    164	u8 nxthdr_off;		/* Parser end point */
    165};
    166
    167/* A structure for defining buffer prefix area content. */
    168struct fman_buffer_prefix_content {
    169	/* Number of bytes to be left at the beginning of the external
    170	 * buffer; Note that the private-area will start from the base
    171	 * of the buffer address.
    172	 */
    173	u16 priv_data_size;
    174	/* true to pass the parse result to/from the FM;
    175	 * User may use FM_PORT_GetBufferPrsResult() in
    176	 * order to get the parser-result from a buffer.
    177	 */
    178	bool pass_prs_result;
    179	/* true to pass the timeStamp to/from the FM User */
    180	bool pass_time_stamp;
    181	/* true to pass the KG hash result to/from the FM User may
    182	 * use FM_PORT_GetBufferHashResult() in order to get the
    183	 * parser-result from a buffer.
    184	 */
    185	bool pass_hash_result;
    186	/* Add all other Internal-Context information: AD,
    187	 * hash-result, key, etc.
    188	 */
    189	u16 data_align;
    190};
    191
    192/* A structure of information about each of the external
    193 * buffer pools used by a port or storage-profile.
    194 */
    195struct fman_ext_pool_params {
    196	u8 id;		    /* External buffer pool id */
    197	u16 size;		    /* External buffer pool buffer size */
    198};
    199
    200/* A structure for informing the driver about the external
    201 * buffer pools allocated in the BM and used by a port or a
    202 * storage-profile.
    203 */
    204struct fman_ext_pools {
    205	u8 num_of_pools_used; /* Number of pools use by this port */
    206	struct fman_ext_pool_params ext_buf_pool[FMAN_PORT_MAX_EXT_POOLS_NUM];
    207					/* Parameters for each port */
    208};
    209
    210/* A structure for defining BM pool depletion criteria */
    211struct fman_buf_pool_depletion {
    212	/* select mode in which pause frames will be sent after a
    213	 * number of pools (all together!) are depleted
    214	 */
    215	bool pools_grp_mode_enable;
    216	/* the number of depleted pools that will invoke pause
    217	 * frames transmission.
    218	 */
    219	u8 num_of_pools;
    220	/* For each pool, true if it should be considered for
    221	 * depletion (Note - this pool must be used by this port!).
    222	 */
    223	bool pools_to_consider[BM_MAX_NUM_OF_POOLS];
    224	/* select mode in which pause frames will be sent
    225	 * after a single-pool is depleted;
    226	 */
    227	bool single_pool_mode_enable;
    228	/* For each pool, true if it should be considered
    229	 * for depletion (Note - this pool must be used by this port!)
    230	 */
    231	bool pools_to_consider_for_single_mode[BM_MAX_NUM_OF_POOLS];
    232};
    233
    234/* Enum for inter-module interrupts registration */
    235enum fman_event_modules {
    236	FMAN_MOD_MAC = 0,		/* MAC event */
    237	FMAN_MOD_FMAN_CTRL,	/* FMAN Controller */
    238	FMAN_MOD_DUMMY_LAST
    239};
    240
    241/* Enum for interrupts types */
    242enum fman_intr_type {
    243	FMAN_INTR_TYPE_ERR,
    244	FMAN_INTR_TYPE_NORMAL
    245};
    246
    247/* Enum for inter-module interrupts registration */
    248enum fman_inter_module_event {
    249	FMAN_EV_ERR_MAC0 = 0,	/* MAC 0 error event */
    250	FMAN_EV_ERR_MAC1,		/* MAC 1 error event */
    251	FMAN_EV_ERR_MAC2,		/* MAC 2 error event */
    252	FMAN_EV_ERR_MAC3,		/* MAC 3 error event */
    253	FMAN_EV_ERR_MAC4,		/* MAC 4 error event */
    254	FMAN_EV_ERR_MAC5,		/* MAC 5 error event */
    255	FMAN_EV_ERR_MAC6,		/* MAC 6 error event */
    256	FMAN_EV_ERR_MAC7,		/* MAC 7 error event */
    257	FMAN_EV_ERR_MAC8,		/* MAC 8 error event */
    258	FMAN_EV_ERR_MAC9,		/* MAC 9 error event */
    259	FMAN_EV_MAC0,		/* MAC 0 event (Magic packet detection) */
    260	FMAN_EV_MAC1,		/* MAC 1 event (Magic packet detection) */
    261	FMAN_EV_MAC2,		/* MAC 2 (Magic packet detection) */
    262	FMAN_EV_MAC3,		/* MAC 3 (Magic packet detection) */
    263	FMAN_EV_MAC4,		/* MAC 4 (Magic packet detection) */
    264	FMAN_EV_MAC5,		/* MAC 5 (Magic packet detection) */
    265	FMAN_EV_MAC6,		/* MAC 6 (Magic packet detection) */
    266	FMAN_EV_MAC7,		/* MAC 7 (Magic packet detection) */
    267	FMAN_EV_MAC8,		/* MAC 8 event (Magic packet detection) */
    268	FMAN_EV_MAC9,		/* MAC 9 event (Magic packet detection) */
    269	FMAN_EV_FMAN_CTRL_0,	/* Fman controller event 0 */
    270	FMAN_EV_FMAN_CTRL_1,	/* Fman controller event 1 */
    271	FMAN_EV_FMAN_CTRL_2,	/* Fman controller event 2 */
    272	FMAN_EV_FMAN_CTRL_3,	/* Fman controller event 3 */
    273	FMAN_EV_CNT
    274};
    275
    276struct fman_intr_src {
    277	void (*isr_cb)(void *src_arg);
    278	void *src_handle;
    279};
    280
    281/** fman_exceptions_cb
    282 * fman         - Pointer to FMan
    283 * exception    - The exception.
    284 *
    285 * Exceptions user callback routine, will be called upon an exception
    286 * passing the exception identification.
    287 *
    288 * Return: irq status
    289 */
    290typedef irqreturn_t (fman_exceptions_cb)(struct fman *fman,
    291					 enum fman_exceptions exception);
    292/** fman_bus_error_cb
    293 * fman         - Pointer to FMan
    294 * port_id      - Port id
    295 * addr         - Address that caused the error
    296 * tnum         - Owner of error
    297 * liodn        - Logical IO device number
    298 *
    299 * Bus error user callback routine, will be called upon bus error,
    300 * passing parameters describing the errors and the owner.
    301 *
    302 * Return: IRQ status
    303 */
    304typedef irqreturn_t (fman_bus_error_cb)(struct fman *fman, u8 port_id,
    305					u64 addr, u8 tnum, u16 liodn);
    306
    307/* Structure that holds information received from device tree */
    308struct fman_dts_params {
    309	void __iomem *base_addr;                /* FMan virtual address */
    310	struct resource *res;                   /* FMan memory resource */
    311	u8 id;                                  /* FMan ID */
    312
    313	int err_irq;                            /* FMan Error IRQ */
    314
    315	u16 clk_freq;                           /* FMan clock freq (In Mhz) */
    316
    317	u32 qman_channel_base;                  /* QMan channels base */
    318	u32 num_of_qman_channels;               /* Number of QMan channels */
    319
    320	struct resource muram_res;              /* MURAM resource */
    321};
    322
    323struct fman {
    324	struct device *dev;
    325	void __iomem *base_addr;
    326	struct fman_intr_src intr_mng[FMAN_EV_CNT];
    327
    328	struct fman_fpm_regs __iomem *fpm_regs;
    329	struct fman_bmi_regs __iomem *bmi_regs;
    330	struct fman_qmi_regs __iomem *qmi_regs;
    331	struct fman_dma_regs __iomem *dma_regs;
    332	struct fman_hwp_regs __iomem *hwp_regs;
    333	struct fman_kg_regs __iomem *kg_regs;
    334	fman_exceptions_cb *exception_cb;
    335	fman_bus_error_cb *bus_error_cb;
    336	/* Spinlock for FMan use */
    337	spinlock_t spinlock;
    338	struct fman_state_struct *state;
    339
    340	struct fman_cfg *cfg;
    341	struct muram_info *muram;
    342	struct fman_keygen *keygen;
    343	/* cam section in muram */
    344	unsigned long cam_offset;
    345	size_t cam_size;
    346	/* Fifo in MURAM */
    347	unsigned long fifo_offset;
    348	size_t fifo_size;
    349
    350	u32 liodn_base[64];
    351	u32 liodn_offset[64];
    352
    353	struct fman_dts_params dts_params;
    354};
    355
    356/* Structure for port-FM communication during fman_port_init. */
    357struct fman_port_init_params {
    358	u8 port_id;			/* port Id */
    359	enum fman_port_type port_type;	/* Port type */
    360	u16 port_speed;			/* Port speed */
    361	u16 liodn_offset;		/* Port's requested resource */
    362	u8 num_of_tasks;		/* Port's requested resource */
    363	u8 num_of_extra_tasks;		/* Port's requested resource */
    364	u8 num_of_open_dmas;		/* Port's requested resource */
    365	u8 num_of_extra_open_dmas;	/* Port's requested resource */
    366	u32 size_of_fifo;		/* Port's requested resource */
    367	u32 extra_size_of_fifo;		/* Port's requested resource */
    368	u8 deq_pipeline_depth;		/* Port's requested resource */
    369	u16 max_frame_length;		/* Port's max frame length. */
    370	u16 liodn_base;
    371	/* LIODN base for this port, to be used together with LIODN offset. */
    372};
    373
    374void fman_get_revision(struct fman *fman, struct fman_rev_info *rev_info);
    375
    376void fman_register_intr(struct fman *fman, enum fman_event_modules mod,
    377			u8 mod_id, enum fman_intr_type intr_type,
    378			void (*f_isr)(void *h_src_arg), void *h_src_arg);
    379
    380void fman_unregister_intr(struct fman *fman, enum fman_event_modules mod,
    381			  u8 mod_id, enum fman_intr_type intr_type);
    382
    383int fman_set_port_params(struct fman *fman,
    384			 struct fman_port_init_params *port_params);
    385
    386int fman_reset_mac(struct fman *fman, u8 mac_id);
    387
    388u16 fman_get_clock_freq(struct fman *fman);
    389
    390u32 fman_get_bmi_max_fifo_size(struct fman *fman);
    391
    392int fman_set_mac_max_frame(struct fman *fman, u8 mac_id, u16 mfl);
    393
    394u32 fman_get_qman_channel_id(struct fman *fman, u32 port_id);
    395
    396struct resource *fman_get_mem_region(struct fman *fman);
    397
    398u16 fman_get_max_frm(void);
    399
    400int fman_get_rx_extra_headroom(void);
    401
    402#ifdef CONFIG_DPAA_ERRATUM_A050385
    403bool fman_has_errata_a050385(void);
    404#endif
    405
    406struct fman *fman_bind(struct device *dev);
    407
    408#endif /* __FM_H */