cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hclgevf_mbx.c (10983B)


      1// SPDX-License-Identifier: GPL-2.0+
      2// Copyright (c) 2016-2017 Hisilicon Limited.
      3
      4#include "hclge_mbx.h"
      5#include "hclgevf_main.h"
      6#include "hnae3.h"
      7
      8#define CREATE_TRACE_POINTS
      9#include "hclgevf_trace.h"
     10
     11static int hclgevf_resp_to_errno(u16 resp_code)
     12{
     13	return resp_code ? -resp_code : 0;
     14}
     15
     16#define HCLGEVF_MBX_MATCH_ID_START	1
     17static void hclgevf_reset_mbx_resp_status(struct hclgevf_dev *hdev)
     18{
     19	/* this function should be called with mbx_resp.mbx_mutex held
     20	 * to protect the received_response from race condition
     21	 */
     22	hdev->mbx_resp.received_resp  = false;
     23	hdev->mbx_resp.origin_mbx_msg = 0;
     24	hdev->mbx_resp.resp_status    = 0;
     25	hdev->mbx_resp.match_id++;
     26	/* Update match_id and ensure the value of match_id is not zero */
     27	if (hdev->mbx_resp.match_id == 0)
     28		hdev->mbx_resp.match_id = HCLGEVF_MBX_MATCH_ID_START;
     29	memset(hdev->mbx_resp.additional_info, 0, HCLGE_MBX_MAX_RESP_DATA_SIZE);
     30}
     31
     32/* hclgevf_get_mbx_resp: used to get a response from PF after VF sends a mailbox
     33 * message to PF.
     34 * @hdev: pointer to struct hclgevf_dev
     35 * @code0: the message opcode VF send to PF.
     36 * @code1: the message sub-opcode VF send to PF.
     37 * @resp_data: pointer to store response data from PF to VF.
     38 * @resp_len: the length of resp_data from PF to VF.
     39 */
     40static int hclgevf_get_mbx_resp(struct hclgevf_dev *hdev, u16 code0, u16 code1,
     41				u8 *resp_data, u16 resp_len)
     42{
     43#define HCLGEVF_MAX_TRY_TIMES	500
     44#define HCLGEVF_SLEEP_USECOND	1000
     45	struct hclgevf_mbx_resp_status *mbx_resp;
     46	u16 r_code0, r_code1;
     47	int i = 0;
     48
     49	if (resp_len > HCLGE_MBX_MAX_RESP_DATA_SIZE) {
     50		dev_err(&hdev->pdev->dev,
     51			"VF mbx response len(=%u) exceeds maximum(=%u)\n",
     52			resp_len,
     53			HCLGE_MBX_MAX_RESP_DATA_SIZE);
     54		return -EINVAL;
     55	}
     56
     57	while ((!hdev->mbx_resp.received_resp) && (i < HCLGEVF_MAX_TRY_TIMES)) {
     58		if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE,
     59			     &hdev->hw.hw.comm_state))
     60			return -EIO;
     61
     62		usleep_range(HCLGEVF_SLEEP_USECOND, HCLGEVF_SLEEP_USECOND * 2);
     63		i++;
     64	}
     65
     66	if (i >= HCLGEVF_MAX_TRY_TIMES) {
     67		dev_err(&hdev->pdev->dev,
     68			"VF could not get mbx(%u,%u) resp(=%d) from PF in %d tries\n",
     69			code0, code1, hdev->mbx_resp.received_resp, i);
     70		return -EIO;
     71	}
     72
     73	mbx_resp = &hdev->mbx_resp;
     74	r_code0 = (u16)(mbx_resp->origin_mbx_msg >> 16);
     75	r_code1 = (u16)(mbx_resp->origin_mbx_msg & 0xff);
     76
     77	if (mbx_resp->resp_status)
     78		return mbx_resp->resp_status;
     79
     80	if (resp_data)
     81		memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
     82
     83	hclgevf_reset_mbx_resp_status(hdev);
     84
     85	if (!(r_code0 == code0 && r_code1 == code1 && !mbx_resp->resp_status)) {
     86		dev_err(&hdev->pdev->dev,
     87			"VF could not match resp code(code0=%u,code1=%u), %d\n",
     88			code0, code1, mbx_resp->resp_status);
     89		dev_err(&hdev->pdev->dev,
     90			"VF could not match resp r_code(r_code0=%u,r_code1=%u)\n",
     91			r_code0, r_code1);
     92		return -EIO;
     93	}
     94
     95	return 0;
     96}
     97
     98int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev,
     99			 struct hclge_vf_to_pf_msg *send_msg, bool need_resp,
    100			 u8 *resp_data, u16 resp_len)
    101{
    102	struct hclge_mbx_vf_to_pf_cmd *req;
    103	struct hclge_desc desc;
    104	int status;
    105
    106	req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data;
    107
    108	if (!send_msg) {
    109		dev_err(&hdev->pdev->dev,
    110			"failed to send mbx, msg is NULL\n");
    111		return -EINVAL;
    112	}
    113
    114	hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_VF_TO_PF, false);
    115	if (need_resp)
    116		hnae3_set_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B, 1);
    117
    118	memcpy(&req->msg, send_msg, sizeof(struct hclge_vf_to_pf_msg));
    119
    120	if (test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state))
    121		trace_hclge_vf_mbx_send(hdev, req);
    122
    123	/* synchronous send */
    124	if (need_resp) {
    125		mutex_lock(&hdev->mbx_resp.mbx_mutex);
    126		hclgevf_reset_mbx_resp_status(hdev);
    127		req->match_id = cpu_to_le16(hdev->mbx_resp.match_id);
    128		status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
    129		if (status) {
    130			dev_err(&hdev->pdev->dev,
    131				"VF failed(=%d) to send mbx message to PF\n",
    132				status);
    133			mutex_unlock(&hdev->mbx_resp.mbx_mutex);
    134			return status;
    135		}
    136
    137		status = hclgevf_get_mbx_resp(hdev, send_msg->code,
    138					      send_msg->subcode, resp_data,
    139					      resp_len);
    140		mutex_unlock(&hdev->mbx_resp.mbx_mutex);
    141	} else {
    142		/* asynchronous send */
    143		status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
    144		if (status) {
    145			dev_err(&hdev->pdev->dev,
    146				"VF failed(=%d) to send mbx message to PF\n",
    147				status);
    148			return status;
    149		}
    150	}
    151
    152	return status;
    153}
    154
    155static bool hclgevf_cmd_crq_empty(struct hclgevf_hw *hw)
    156{
    157	u32 tail = hclgevf_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG);
    158
    159	return tail == hw->hw.cmq.crq.next_to_use;
    160}
    161
    162static void hclgevf_handle_mbx_response(struct hclgevf_dev *hdev,
    163					struct hclge_mbx_pf_to_vf_cmd *req)
    164{
    165	u16 vf_mbx_msg_subcode = le16_to_cpu(req->msg.vf_mbx_msg_subcode);
    166	u16 vf_mbx_msg_code = le16_to_cpu(req->msg.vf_mbx_msg_code);
    167	struct hclgevf_mbx_resp_status *resp = &hdev->mbx_resp;
    168	u16 resp_status = le16_to_cpu(req->msg.resp_status);
    169	u16 match_id = le16_to_cpu(req->match_id);
    170
    171	if (resp->received_resp)
    172		dev_warn(&hdev->pdev->dev,
    173			"VF mbx resp flag not clear(%u)\n",
    174			 vf_mbx_msg_code);
    175
    176	resp->origin_mbx_msg = (vf_mbx_msg_code << 16);
    177	resp->origin_mbx_msg |= vf_mbx_msg_subcode;
    178	resp->resp_status = hclgevf_resp_to_errno(resp_status);
    179	memcpy(resp->additional_info, req->msg.resp_data,
    180	       HCLGE_MBX_MAX_RESP_DATA_SIZE * sizeof(u8));
    181	if (match_id) {
    182		/* If match_id is not zero, it means PF support match_id.
    183		 * if the match_id is right, VF get the right response, or
    184		 * ignore the response. and driver will clear hdev->mbx_resp
    185		 * when send next message which need response.
    186		 */
    187		if (match_id == resp->match_id)
    188			resp->received_resp = true;
    189	} else {
    190		resp->received_resp = true;
    191	}
    192}
    193
    194static void hclgevf_handle_mbx_msg(struct hclgevf_dev *hdev,
    195				   struct hclge_mbx_pf_to_vf_cmd *req)
    196{
    197	/* we will drop the async msg if we find ARQ as full
    198	 * and continue with next message
    199	 */
    200	if (atomic_read(&hdev->arq.count) >=
    201	    HCLGE_MBX_MAX_ARQ_MSG_NUM) {
    202		dev_warn(&hdev->pdev->dev,
    203			 "Async Q full, dropping msg(%u)\n",
    204			 le16_to_cpu(req->msg.code));
    205		return;
    206	}
    207
    208	/* tail the async message in arq */
    209	memcpy(hdev->arq.msg_q[hdev->arq.tail], &req->msg,
    210	       HCLGE_MBX_MAX_ARQ_MSG_SIZE * sizeof(u16));
    211	hclge_mbx_tail_ptr_move_arq(hdev->arq);
    212	atomic_inc(&hdev->arq.count);
    213
    214	hclgevf_mbx_task_schedule(hdev);
    215}
    216
    217void hclgevf_mbx_handler(struct hclgevf_dev *hdev)
    218{
    219	struct hclge_mbx_pf_to_vf_cmd *req;
    220	struct hclge_comm_cmq_ring *crq;
    221	struct hclge_desc *desc;
    222	u16 flag;
    223	u16 code;
    224
    225	crq = &hdev->hw.hw.cmq.crq;
    226
    227	while (!hclgevf_cmd_crq_empty(&hdev->hw)) {
    228		if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE,
    229			     &hdev->hw.hw.comm_state)) {
    230			dev_info(&hdev->pdev->dev, "vf crq need init\n");
    231			return;
    232		}
    233
    234		desc = &crq->desc[crq->next_to_use];
    235		req = (struct hclge_mbx_pf_to_vf_cmd *)desc->data;
    236
    237		flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
    238		code = le16_to_cpu(req->msg.code);
    239		if (unlikely(!hnae3_get_bit(flag, HCLGEVF_CMDQ_RX_OUTVLD_B))) {
    240			dev_warn(&hdev->pdev->dev,
    241				 "dropped invalid mailbox message, code = %u\n",
    242				 code);
    243
    244			/* dropping/not processing this invalid message */
    245			crq->desc[crq->next_to_use].flag = 0;
    246			hclge_mbx_ring_ptr_move_crq(crq);
    247			continue;
    248		}
    249
    250		trace_hclge_vf_mbx_get(hdev, req);
    251
    252		/* synchronous messages are time critical and need preferential
    253		 * treatment. Therefore, we need to acknowledge all the sync
    254		 * responses as quickly as possible so that waiting tasks do not
    255		 * timeout and simultaneously queue the async messages for later
    256		 * prcessing in context of mailbox task i.e. the slow path.
    257		 */
    258		switch (code) {
    259		case HCLGE_MBX_PF_VF_RESP:
    260			hclgevf_handle_mbx_response(hdev, req);
    261			break;
    262		case HCLGE_MBX_LINK_STAT_CHANGE:
    263		case HCLGE_MBX_ASSERTING_RESET:
    264		case HCLGE_MBX_LINK_STAT_MODE:
    265		case HCLGE_MBX_PUSH_VLAN_INFO:
    266		case HCLGE_MBX_PUSH_PROMISC_INFO:
    267			hclgevf_handle_mbx_msg(hdev, req);
    268			break;
    269		default:
    270			dev_err(&hdev->pdev->dev,
    271				"VF received unsupported(%u) mbx msg from PF\n",
    272				code);
    273			break;
    274		}
    275		crq->desc[crq->next_to_use].flag = 0;
    276		hclge_mbx_ring_ptr_move_crq(crq);
    277	}
    278
    279	/* Write back CMDQ_RQ header pointer, M7 need this pointer */
    280	hclgevf_write_dev(&hdev->hw, HCLGE_COMM_NIC_CRQ_HEAD_REG,
    281			  crq->next_to_use);
    282}
    283
    284static void hclgevf_parse_promisc_info(struct hclgevf_dev *hdev,
    285				       u16 promisc_info)
    286{
    287	if (!promisc_info)
    288		dev_info(&hdev->pdev->dev,
    289			 "Promisc mode is closed by host for being untrusted.\n");
    290}
    291
    292void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev)
    293{
    294	struct hclge_mbx_port_base_vlan *vlan_info;
    295	struct hclge_mbx_link_status *link_info;
    296	struct hclge_mbx_link_mode *link_mode;
    297	enum hnae3_reset_type reset_type;
    298	u16 link_status, state;
    299	__le16 *msg_q;
    300	u16 opcode;
    301	u8 duplex;
    302	u32 speed;
    303	u32 tail;
    304	u8 flag;
    305	u16 idx;
    306
    307	tail = hdev->arq.tail;
    308
    309	/* process all the async queue messages */
    310	while (tail != hdev->arq.head) {
    311		if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE,
    312			     &hdev->hw.hw.comm_state)) {
    313			dev_info(&hdev->pdev->dev,
    314				 "vf crq need init in async\n");
    315			return;
    316		}
    317
    318		msg_q = hdev->arq.msg_q[hdev->arq.head];
    319		opcode = le16_to_cpu(msg_q[0]);
    320		switch (opcode) {
    321		case HCLGE_MBX_LINK_STAT_CHANGE:
    322			link_info = (struct hclge_mbx_link_status *)(msg_q + 1);
    323			link_status = le16_to_cpu(link_info->link_status);
    324			speed = le32_to_cpu(link_info->speed);
    325			duplex = (u8)le16_to_cpu(link_info->duplex);
    326			flag = link_info->flag;
    327
    328			/* update upper layer with new link link status */
    329			hclgevf_update_speed_duplex(hdev, speed, duplex);
    330			hclgevf_update_link_status(hdev, link_status);
    331
    332			if (flag & HCLGE_MBX_PUSH_LINK_STATUS_EN)
    333				set_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS,
    334					&hdev->state);
    335
    336			break;
    337		case HCLGE_MBX_LINK_STAT_MODE:
    338			link_mode = (struct hclge_mbx_link_mode *)(msg_q + 1);
    339			idx = le16_to_cpu(link_mode->idx);
    340			if (idx)
    341				hdev->hw.mac.supported =
    342					le64_to_cpu(link_mode->link_mode);
    343			else
    344				hdev->hw.mac.advertising =
    345					le64_to_cpu(link_mode->link_mode);
    346			break;
    347		case HCLGE_MBX_ASSERTING_RESET:
    348			/* PF has asserted reset hence VF should go in pending
    349			 * state and poll for the hardware reset status till it
    350			 * has been completely reset. After this stack should
    351			 * eventually be re-initialized.
    352			 */
    353			reset_type =
    354				(enum hnae3_reset_type)le16_to_cpu(msg_q[1]);
    355			set_bit(reset_type, &hdev->reset_pending);
    356			set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
    357			hclgevf_reset_task_schedule(hdev);
    358
    359			break;
    360		case HCLGE_MBX_PUSH_VLAN_INFO:
    361			vlan_info =
    362				(struct hclge_mbx_port_base_vlan *)(msg_q + 1);
    363			state = le16_to_cpu(vlan_info->state);
    364			hclgevf_update_port_base_vlan_info(hdev, state,
    365							   vlan_info);
    366			break;
    367		case HCLGE_MBX_PUSH_PROMISC_INFO:
    368			hclgevf_parse_promisc_info(hdev, le16_to_cpu(msg_q[1]));
    369			break;
    370		default:
    371			dev_err(&hdev->pdev->dev,
    372				"fetched unsupported(%u) message from arq\n",
    373				opcode);
    374			break;
    375		}
    376
    377		hclge_mbx_head_ptr_move_arq(hdev->arq);
    378		atomic_dec(&hdev->arq.count);
    379		msg_q = hdev->arq.msg_q[hdev->arq.head];
    380	}
    381}