cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ice_tc_lib.h (4545B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright (C) 2019-2021, Intel Corporation. */
      3
      4#ifndef _ICE_TC_LIB_H_
      5#define _ICE_TC_LIB_H_
      6
      7#define ICE_TC_FLWR_FIELD_DST_MAC		BIT(0)
      8#define ICE_TC_FLWR_FIELD_SRC_MAC		BIT(1)
      9#define ICE_TC_FLWR_FIELD_VLAN			BIT(2)
     10#define ICE_TC_FLWR_FIELD_DEST_IPV4		BIT(3)
     11#define ICE_TC_FLWR_FIELD_SRC_IPV4		BIT(4)
     12#define ICE_TC_FLWR_FIELD_DEST_IPV6		BIT(5)
     13#define ICE_TC_FLWR_FIELD_SRC_IPV6		BIT(6)
     14#define ICE_TC_FLWR_FIELD_DEST_L4_PORT		BIT(7)
     15#define ICE_TC_FLWR_FIELD_SRC_L4_PORT		BIT(8)
     16#define ICE_TC_FLWR_FIELD_TENANT_ID		BIT(9)
     17#define ICE_TC_FLWR_FIELD_ENC_DEST_IPV4		BIT(10)
     18#define ICE_TC_FLWR_FIELD_ENC_SRC_IPV4		BIT(11)
     19#define ICE_TC_FLWR_FIELD_ENC_DEST_IPV6		BIT(12)
     20#define ICE_TC_FLWR_FIELD_ENC_SRC_IPV6		BIT(13)
     21#define ICE_TC_FLWR_FIELD_ENC_DEST_L4_PORT	BIT(14)
     22#define ICE_TC_FLWR_FIELD_ENC_SRC_L4_PORT	BIT(15)
     23#define ICE_TC_FLWR_FIELD_ENC_DST_MAC		BIT(16)
     24#define ICE_TC_FLWR_FIELD_ETH_TYPE_ID		BIT(17)
     25#define ICE_TC_FLWR_FIELD_ENC_OPTS		BIT(18)
     26
     27#define ICE_TC_FLOWER_MASK_32   0xFFFFFFFF
     28
     29struct ice_indr_block_priv {
     30	struct net_device *netdev;
     31	struct ice_netdev_priv *np;
     32	struct list_head list;
     33};
     34
     35struct ice_tc_flower_action {
     36	u32 tc_class;
     37	enum ice_sw_fwd_act_type fltr_act;
     38};
     39
     40struct ice_tc_vlan_hdr {
     41	__be16 vlan_id; /* Only last 12 bits valid */
     42	u16 vlan_prio; /* Only last 3 bits valid (valid values: 0..7) */
     43};
     44
     45struct ice_tc_l2_hdr {
     46	u8 dst_mac[ETH_ALEN];
     47	u8 src_mac[ETH_ALEN];
     48	__be16 n_proto;    /* Ethernet Protocol */
     49};
     50
     51struct ice_tc_l3_hdr {
     52	u8 ip_proto;    /* IPPROTO value */
     53	union {
     54		struct {
     55			struct in_addr dst_ip;
     56			struct in_addr src_ip;
     57		} v4;
     58		struct {
     59			struct in6_addr dst_ip6;
     60			struct in6_addr src_ip6;
     61		} v6;
     62	} ip;
     63#define dst_ipv6	ip.v6.dst_ip6.s6_addr32
     64#define dst_ipv6_addr	ip.v6.dst_ip6.s6_addr
     65#define src_ipv6	ip.v6.src_ip6.s6_addr32
     66#define src_ipv6_addr	ip.v6.src_ip6.s6_addr
     67#define dst_ipv4	ip.v4.dst_ip.s_addr
     68#define src_ipv4	ip.v4.src_ip.s_addr
     69
     70	u8 tos;
     71	u8 ttl;
     72};
     73
     74struct ice_tc_l4_hdr {
     75	__be16 dst_port;
     76	__be16 src_port;
     77};
     78
     79struct ice_tc_flower_lyr_2_4_hdrs {
     80	/* L2 layer fields with their mask */
     81	struct ice_tc_l2_hdr l2_key;
     82	struct ice_tc_l2_hdr l2_mask;
     83	struct ice_tc_vlan_hdr vlan_hdr;
     84	/* L3 (IPv4[6]) layer fields with their mask */
     85	struct ice_tc_l3_hdr l3_key;
     86	struct ice_tc_l3_hdr l3_mask;
     87
     88	/* L4 layer fields with their mask */
     89	struct ice_tc_l4_hdr l4_key;
     90	struct ice_tc_l4_hdr l4_mask;
     91};
     92
     93enum ice_eswitch_fltr_direction {
     94	ICE_ESWITCH_FLTR_INGRESS,
     95	ICE_ESWITCH_FLTR_EGRESS,
     96};
     97
     98struct ice_tc_flower_fltr {
     99	struct hlist_node tc_flower_node;
    100
    101	/* cookie becomes filter_rule_id if rule is added successfully */
    102	unsigned long cookie;
    103
    104	/* add_adv_rule returns information like recipe ID, rule_id. Store
    105	 * those values since they are needed to remove advanced rule
    106	 */
    107	u16 rid;
    108	u16 rule_id;
    109	/* this could be queue/vsi_idx (sw handle)/queue_group, depending upon
    110	 * destination type
    111	 */
    112	u16 dest_id;
    113	/* if dest_id is vsi_idx, then need to store destination VSI ptr */
    114	struct ice_vsi *dest_vsi;
    115	/* direction of fltr for eswitch use case */
    116	enum ice_eswitch_fltr_direction direction;
    117
    118	/* Parsed TC flower configuration params */
    119	struct ice_tc_flower_lyr_2_4_hdrs outer_headers;
    120	struct ice_tc_flower_lyr_2_4_hdrs inner_headers;
    121	struct ice_vsi *src_vsi;
    122	__be32 tenant_id;
    123	struct gtp_pdu_session_info gtp_pdu_info_keys;
    124	struct gtp_pdu_session_info gtp_pdu_info_masks;
    125	u32 flags;
    126	u8 tunnel_type;
    127	struct ice_tc_flower_action	action;
    128
    129	/* cache ptr which is used wherever needed to communicate netlink
    130	 * messages
    131	 */
    132	struct netlink_ext_ack *extack;
    133};
    134
    135/**
    136 * ice_is_chnl_fltr - is this a valid channel filter
    137 * @f: Pointer to tc-flower filter
    138 *
    139 * Criteria to determine of given filter is valid channel filter
    140 * or not is based on its "destination". If destination is hw_tc (aka tc_class)
    141 * and it is non-zero, then it is valid channel (aka ADQ) filter
    142 */
    143static inline bool ice_is_chnl_fltr(struct ice_tc_flower_fltr *f)
    144{
    145	return !!f->action.tc_class;
    146}
    147
    148/**
    149 * ice_chnl_dmac_fltr_cnt - DMAC based CHNL filter count
    150 * @pf: Pointer to PF
    151 */
    152static inline int ice_chnl_dmac_fltr_cnt(struct ice_pf *pf)
    153{
    154	return pf->num_dmac_chnl_fltrs;
    155}
    156
    157int
    158ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,
    159		   struct flow_cls_offload *cls_flower);
    160int
    161ice_del_cls_flower(struct ice_vsi *vsi, struct flow_cls_offload *cls_flower);
    162void ice_replay_tc_fltrs(struct ice_pf *pf);
    163bool ice_is_tunnel_supported(struct net_device *dev);
    164
    165#endif /* _ICE_TC_LIB_H_ */