cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ixgb.h (4704B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 1999 - 2008 Intel Corporation. */
      3
      4#ifndef _IXGB_H_
      5#define _IXGB_H_
      6
      7#include <linux/stddef.h>
      8#include <linux/module.h>
      9#include <linux/types.h>
     10#include <asm/byteorder.h>
     11#include <linux/mm.h>
     12#include <linux/errno.h>
     13#include <linux/ioport.h>
     14#include <linux/pci.h>
     15#include <linux/kernel.h>
     16#include <linux/netdevice.h>
     17#include <linux/etherdevice.h>
     18#include <linux/skbuff.h>
     19#include <linux/delay.h>
     20#include <linux/timer.h>
     21#include <linux/slab.h>
     22#include <linux/vmalloc.h>
     23#include <linux/interrupt.h>
     24#include <linux/string.h>
     25#include <linux/pagemap.h>
     26#include <linux/dma-mapping.h>
     27#include <linux/bitops.h>
     28#include <asm/io.h>
     29#include <asm/irq.h>
     30#include <linux/capability.h>
     31#include <linux/in.h>
     32#include <linux/ip.h>
     33#include <linux/tcp.h>
     34#include <linux/udp.h>
     35#include <net/pkt_sched.h>
     36#include <linux/list.h>
     37#include <linux/reboot.h>
     38#include <net/checksum.h>
     39
     40#include <linux/ethtool.h>
     41#include <linux/if_vlan.h>
     42
     43#define BAR_0		0
     44#define BAR_1		1
     45
     46struct ixgb_adapter;
     47#include "ixgb_hw.h"
     48#include "ixgb_ee.h"
     49#include "ixgb_ids.h"
     50
     51/* TX/RX descriptor defines */
     52#define DEFAULT_TXD      256
     53#define MAX_TXD         4096
     54#define MIN_TXD           64
     55
     56/* hardware cannot reliably support more than 512 descriptors owned by
     57 * hardware descriptor cache otherwise an unreliable ring under heavy
     58 * receive load may result */
     59#define DEFAULT_RXD      512
     60#define MAX_RXD          512
     61#define MIN_RXD           64
     62
     63/* Supported Rx Buffer Sizes */
     64#define IXGB_RXBUFFER_2048  2048
     65#define IXGB_RXBUFFER_4096  4096
     66#define IXGB_RXBUFFER_8192  8192
     67#define IXGB_RXBUFFER_16384 16384
     68
     69/* How many Rx Buffers do we bundle into one write to the hardware ? */
     70#define IXGB_RX_BUFFER_WRITE	8	/* Must be power of 2 */
     71
     72/* wrapper around a pointer to a socket buffer,
     73 * so a DMA handle can be stored along with the buffer */
     74struct ixgb_buffer {
     75	struct sk_buff *skb;
     76	dma_addr_t dma;
     77	unsigned long time_stamp;
     78	u16 length;
     79	u16 next_to_watch;
     80	u16 mapped_as_page;
     81};
     82
     83struct ixgb_desc_ring {
     84	/* pointer to the descriptor ring memory */
     85	void *desc;
     86	/* physical address of the descriptor ring */
     87	dma_addr_t dma;
     88	/* length of descriptor ring in bytes */
     89	unsigned int size;
     90	/* number of descriptors in the ring */
     91	unsigned int count;
     92	/* next descriptor to associate a buffer with */
     93	unsigned int next_to_use;
     94	/* next descriptor to check for DD status bit */
     95	unsigned int next_to_clean;
     96	/* array of buffer information structs */
     97	struct ixgb_buffer *buffer_info;
     98};
     99
    100#define IXGB_DESC_UNUSED(R) \
    101	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
    102	(R)->next_to_clean - (R)->next_to_use - 1)
    103
    104#define IXGB_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
    105#define IXGB_RX_DESC(R, i)		IXGB_GET_DESC(R, i, ixgb_rx_desc)
    106#define IXGB_TX_DESC(R, i)		IXGB_GET_DESC(R, i, ixgb_tx_desc)
    107#define IXGB_CONTEXT_DESC(R, i)	IXGB_GET_DESC(R, i, ixgb_context_desc)
    108
    109/* board specific private data structure */
    110
    111struct ixgb_adapter {
    112	struct timer_list watchdog_timer;
    113	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
    114	u32 bd_number;
    115	u32 rx_buffer_len;
    116	u32 part_num;
    117	u16 link_speed;
    118	u16 link_duplex;
    119	struct work_struct tx_timeout_task;
    120
    121	/* TX */
    122	struct ixgb_desc_ring tx_ring ____cacheline_aligned_in_smp;
    123	unsigned int restart_queue;
    124	unsigned long timeo_start;
    125	u32 tx_cmd_type;
    126	u64 hw_csum_tx_good;
    127	u64 hw_csum_tx_error;
    128	u32 tx_int_delay;
    129	u32 tx_timeout_count;
    130	bool tx_int_delay_enable;
    131	bool detect_tx_hung;
    132
    133	/* RX */
    134	struct ixgb_desc_ring rx_ring;
    135	u64 hw_csum_rx_error;
    136	u64 hw_csum_rx_good;
    137	u32 rx_int_delay;
    138	bool rx_csum;
    139
    140	/* OS defined structs */
    141	struct napi_struct napi;
    142	struct net_device *netdev;
    143	struct pci_dev *pdev;
    144
    145	/* structs defined in ixgb_hw.h */
    146	struct ixgb_hw hw;
    147	u16 msg_enable;
    148	struct ixgb_hw_stats stats;
    149	u32 alloc_rx_buff_failed;
    150	bool have_msi;
    151	unsigned long flags;
    152};
    153
    154enum ixgb_state_t {
    155	/* TBD
    156	__IXGB_TESTING,
    157	__IXGB_RESETTING,
    158	*/
    159	__IXGB_DOWN
    160};
    161
    162/* Exported from other modules */
    163void ixgb_check_options(struct ixgb_adapter *adapter);
    164void ixgb_set_ethtool_ops(struct net_device *netdev);
    165extern char ixgb_driver_name[];
    166
    167void ixgb_set_speed_duplex(struct net_device *netdev);
    168
    169int ixgb_up(struct ixgb_adapter *adapter);
    170void ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog);
    171void ixgb_reset(struct ixgb_adapter *adapter);
    172int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
    173int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
    174void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
    175void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
    176void ixgb_update_stats(struct ixgb_adapter *adapter);
    177
    178
    179#endif /* _IXGB_H_ */