cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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regs.h (2314B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 1999 - 2018 Intel Corporation. */
      3
      4#ifndef _IXGBEVF_REGS_H_
      5#define _IXGBEVF_REGS_H_
      6
      7#define IXGBE_VFCTRL		0x00000
      8#define IXGBE_VFSTATUS		0x00008
      9#define IXGBE_VFLINKS		0x00010
     10#define IXGBE_VFFRTIMER		0x00048
     11#define IXGBE_VFRXMEMWRAP	0x03190
     12#define IXGBE_VTEICR		0x00100
     13#define IXGBE_VTEICS		0x00104
     14#define IXGBE_VTEIMS		0x00108
     15#define IXGBE_VTEIMC		0x0010C
     16#define IXGBE_VTEIAC		0x00110
     17#define IXGBE_VTEIAM		0x00114
     18#define IXGBE_VTEITR(x)		(0x00820 + (4 * (x)))
     19#define IXGBE_VTIVAR(x)		(0x00120 + (4 * (x)))
     20#define IXGBE_VTIVAR_MISC	0x00140
     21#define IXGBE_VTRSCINT(x)	(0x00180 + (4 * (x)))
     22#define IXGBE_VFRDBAL(x)	(0x01000 + (0x40 * (x)))
     23#define IXGBE_VFRDBAH(x)	(0x01004 + (0x40 * (x)))
     24#define IXGBE_VFRDLEN(x)	(0x01008 + (0x40 * (x)))
     25#define IXGBE_VFRDH(x)		(0x01010 + (0x40 * (x)))
     26#define IXGBE_VFRDT(x)		(0x01018 + (0x40 * (x)))
     27#define IXGBE_VFRXDCTL(x)	(0x01028 + (0x40 * (x)))
     28#define IXGBE_VFSRRCTL(x)	(0x01014 + (0x40 * (x)))
     29#define IXGBE_VFRSCCTL(x)	(0x0102C + (0x40 * (x)))
     30#define IXGBE_VFPSRTYPE		0x00300
     31#define IXGBE_VFTDBAL(x)	(0x02000 + (0x40 * (x)))
     32#define IXGBE_VFTDBAH(x)	(0x02004 + (0x40 * (x)))
     33#define IXGBE_VFTDLEN(x)	(0x02008 + (0x40 * (x)))
     34#define IXGBE_VFTDH(x)		(0x02010 + (0x40 * (x)))
     35#define IXGBE_VFTDT(x)		(0x02018 + (0x40 * (x)))
     36#define IXGBE_VFTXDCTL(x)	(0x02028 + (0x40 * (x)))
     37#define IXGBE_VFTDWBAL(x)	(0x02038 + (0x40 * (x)))
     38#define IXGBE_VFTDWBAH(x)	(0x0203C + (0x40 * (x)))
     39#define IXGBE_VFDCA_RXCTRL(x)	(0x0100C + (0x40 * (x)))
     40#define IXGBE_VFDCA_TXCTRL(x)	(0x0200c + (0x40 * (x)))
     41#define IXGBE_VFGPRC		0x0101C
     42#define IXGBE_VFGPTC		0x0201C
     43#define IXGBE_VFGORC_LSB	0x01020
     44#define IXGBE_VFGORC_MSB	0x01024
     45#define IXGBE_VFGOTC_LSB	0x02020
     46#define IXGBE_VFGOTC_MSB	0x02024
     47#define IXGBE_VFMPRC		0x01034
     48#define IXGBE_VFMRQC		0x3000
     49#define IXGBE_VFRSSRK(x)	(0x3100 + ((x) * 4))
     50#define IXGBE_VFRETA(x)		(0x3200 + ((x) * 4))
     51
     52/* VFMRQC bits */
     53#define IXGBE_VFMRQC_RSSEN		0x00000001  /* RSS Enable */
     54#define IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP	0x00010000
     55#define IXGBE_VFMRQC_RSS_FIELD_IPV4	0x00020000
     56#define IXGBE_VFMRQC_RSS_FIELD_IPV6	0x00100000
     57#define IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP	0x00200000
     58
     59#define IXGBE_WRITE_FLUSH(a)	(IXGBE_READ_REG(a, IXGBE_VFSTATUS))
     60
     61#endif /* _IXGBEVF_REGS_H_ */