en_netdev.c (98282B)
1/* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34#include <linux/bpf.h> 35#include <linux/etherdevice.h> 36#include <linux/filter.h> 37#include <linux/tcp.h> 38#include <linux/if_vlan.h> 39#include <linux/delay.h> 40#include <linux/slab.h> 41#include <linux/hash.h> 42#include <net/ip.h> 43#include <net/vxlan.h> 44#include <net/devlink.h> 45 46#include <linux/mlx4/driver.h> 47#include <linux/mlx4/device.h> 48#include <linux/mlx4/cmd.h> 49#include <linux/mlx4/cq.h> 50 51#include "mlx4_en.h" 52#include "en_port.h" 53 54#define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \ 55 XDP_PACKET_HEADROOM - \ 56 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))) 57 58int mlx4_en_setup_tc(struct net_device *dev, u8 up) 59{ 60 struct mlx4_en_priv *priv = netdev_priv(dev); 61 int i; 62 unsigned int offset = 0; 63 64 if (up && up != MLX4_EN_NUM_UP_HIGH) 65 return -EINVAL; 66 67 netdev_set_num_tc(dev, up); 68 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 69 /* Partition Tx queues evenly amongst UP's */ 70 for (i = 0; i < up; i++) { 71 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); 72 offset += priv->num_tx_rings_p_up; 73 } 74 75#ifdef CONFIG_MLX4_EN_DCB 76 if (!mlx4_is_slave(priv->mdev->dev)) { 77 if (up) { 78 if (priv->dcbx_cap) 79 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED; 80 } else { 81 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED; 82 priv->cee_config.pfc_state = false; 83 } 84 } 85#endif /* CONFIG_MLX4_EN_DCB */ 86 87 return 0; 88} 89 90int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc) 91{ 92 struct mlx4_en_priv *priv = netdev_priv(dev); 93 struct mlx4_en_dev *mdev = priv->mdev; 94 struct mlx4_en_port_profile new_prof; 95 struct mlx4_en_priv *tmp; 96 int total_count; 97 int port_up = 0; 98 int err = 0; 99 100 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 101 if (!tmp) 102 return -ENOMEM; 103 104 mutex_lock(&mdev->state_lock); 105 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 106 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW : 107 MLX4_EN_NUM_UP_HIGH; 108 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up * 109 new_prof.num_up; 110 total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP]; 111 if (total_count > MAX_TX_RINGS) { 112 err = -EINVAL; 113 en_err(priv, 114 "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n", 115 total_count, MAX_TX_RINGS); 116 goto out; 117 } 118 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 119 if (err) 120 goto out; 121 122 if (priv->port_up) { 123 port_up = 1; 124 mlx4_en_stop_port(dev, 1); 125 } 126 127 mlx4_en_safe_replace_resources(priv, tmp); 128 if (port_up) { 129 err = mlx4_en_start_port(dev); 130 if (err) { 131 en_err(priv, "Failed starting port for setup TC\n"); 132 goto out; 133 } 134 } 135 136 err = mlx4_en_setup_tc(dev, tc); 137out: 138 mutex_unlock(&mdev->state_lock); 139 kfree(tmp); 140 return err; 141} 142 143static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type, 144 void *type_data) 145{ 146 struct tc_mqprio_qopt *mqprio = type_data; 147 148 if (type != TC_SETUP_QDISC_MQPRIO) 149 return -EOPNOTSUPP; 150 151 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH) 152 return -EINVAL; 153 154 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; 155 156 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc); 157} 158 159#ifdef CONFIG_RFS_ACCEL 160 161struct mlx4_en_filter { 162 struct list_head next; 163 struct work_struct work; 164 165 u8 ip_proto; 166 __be32 src_ip; 167 __be32 dst_ip; 168 __be16 src_port; 169 __be16 dst_port; 170 171 int rxq_index; 172 struct mlx4_en_priv *priv; 173 u32 flow_id; /* RFS infrastructure id */ 174 int id; /* mlx4_en driver id */ 175 u64 reg_id; /* Flow steering API id */ 176 u8 activated; /* Used to prevent expiry before filter 177 * is attached 178 */ 179 struct hlist_node filter_chain; 180}; 181 182static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); 183 184static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto) 185{ 186 switch (ip_proto) { 187 case IPPROTO_UDP: 188 return MLX4_NET_TRANS_RULE_ID_UDP; 189 case IPPROTO_TCP: 190 return MLX4_NET_TRANS_RULE_ID_TCP; 191 default: 192 return MLX4_NET_TRANS_RULE_NUM; 193 } 194}; 195 196/* Must not acquire state_lock, as its corresponding work_sync 197 * is done under it. 198 */ 199static void mlx4_en_filter_work(struct work_struct *work) 200{ 201 struct mlx4_en_filter *filter = container_of(work, 202 struct mlx4_en_filter, 203 work); 204 struct mlx4_en_priv *priv = filter->priv; 205 struct mlx4_spec_list spec_tcp_udp = { 206 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto), 207 { 208 .tcp_udp = { 209 .dst_port = filter->dst_port, 210 .dst_port_msk = (__force __be16)-1, 211 .src_port = filter->src_port, 212 .src_port_msk = (__force __be16)-1, 213 }, 214 }, 215 }; 216 struct mlx4_spec_list spec_ip = { 217 .id = MLX4_NET_TRANS_RULE_ID_IPV4, 218 { 219 .ipv4 = { 220 .dst_ip = filter->dst_ip, 221 .dst_ip_msk = (__force __be32)-1, 222 .src_ip = filter->src_ip, 223 .src_ip_msk = (__force __be32)-1, 224 }, 225 }, 226 }; 227 struct mlx4_spec_list spec_eth = { 228 .id = MLX4_NET_TRANS_RULE_ID_ETH, 229 }; 230 struct mlx4_net_trans_rule rule = { 231 .list = LIST_HEAD_INIT(rule.list), 232 .queue_mode = MLX4_NET_TRANS_Q_LIFO, 233 .exclusive = 1, 234 .allow_loopback = 1, 235 .promisc_mode = MLX4_FS_REGULAR, 236 .port = priv->port, 237 .priority = MLX4_DOMAIN_RFS, 238 }; 239 int rc; 240 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 241 242 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) { 243 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n", 244 filter->ip_proto); 245 goto ignore; 246 } 247 list_add_tail(&spec_eth.list, &rule.list); 248 list_add_tail(&spec_ip.list, &rule.list); 249 list_add_tail(&spec_tcp_udp.list, &rule.list); 250 251 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; 252 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); 253 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 254 255 filter->activated = 0; 256 257 if (filter->reg_id) { 258 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 259 if (rc && rc != -ENOENT) 260 en_err(priv, "Error detaching flow. rc = %d\n", rc); 261 } 262 263 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); 264 if (rc) 265 en_err(priv, "Error attaching flow. err = %d\n", rc); 266 267ignore: 268 mlx4_en_filter_rfs_expire(priv); 269 270 filter->activated = 1; 271} 272 273static inline struct hlist_head * 274filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 275 __be16 src_port, __be16 dst_port) 276{ 277 unsigned long l; 278 int bucket_idx; 279 280 l = (__force unsigned long)src_port | 281 ((__force unsigned long)dst_port << 2); 282 l ^= (__force unsigned long)(src_ip ^ dst_ip); 283 284 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); 285 286 return &priv->filter_hash[bucket_idx]; 287} 288 289static struct mlx4_en_filter * 290mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, 291 __be32 dst_ip, u8 ip_proto, __be16 src_port, 292 __be16 dst_port, u32 flow_id) 293{ 294 struct mlx4_en_filter *filter = NULL; 295 296 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); 297 if (!filter) 298 return NULL; 299 300 filter->priv = priv; 301 filter->rxq_index = rxq_index; 302 INIT_WORK(&filter->work, mlx4_en_filter_work); 303 304 filter->src_ip = src_ip; 305 filter->dst_ip = dst_ip; 306 filter->ip_proto = ip_proto; 307 filter->src_port = src_port; 308 filter->dst_port = dst_port; 309 310 filter->flow_id = flow_id; 311 312 filter->id = priv->last_filter_id++ % RPS_NO_FILTER; 313 314 list_add_tail(&filter->next, &priv->filters); 315 hlist_add_head(&filter->filter_chain, 316 filter_hash_bucket(priv, src_ip, dst_ip, src_port, 317 dst_port)); 318 319 return filter; 320} 321 322static void mlx4_en_filter_free(struct mlx4_en_filter *filter) 323{ 324 struct mlx4_en_priv *priv = filter->priv; 325 int rc; 326 327 list_del(&filter->next); 328 329 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); 330 if (rc && rc != -ENOENT) 331 en_err(priv, "Error detaching flow. rc = %d\n", rc); 332 333 kfree(filter); 334} 335 336static inline struct mlx4_en_filter * 337mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, 338 u8 ip_proto, __be16 src_port, __be16 dst_port) 339{ 340 struct mlx4_en_filter *filter; 341 struct mlx4_en_filter *ret = NULL; 342 343 hlist_for_each_entry(filter, 344 filter_hash_bucket(priv, src_ip, dst_ip, 345 src_port, dst_port), 346 filter_chain) { 347 if (filter->src_ip == src_ip && 348 filter->dst_ip == dst_ip && 349 filter->ip_proto == ip_proto && 350 filter->src_port == src_port && 351 filter->dst_port == dst_port) { 352 ret = filter; 353 break; 354 } 355 } 356 357 return ret; 358} 359 360static int 361mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, 362 u16 rxq_index, u32 flow_id) 363{ 364 struct mlx4_en_priv *priv = netdev_priv(net_dev); 365 struct mlx4_en_filter *filter; 366 const struct iphdr *ip; 367 const __be16 *ports; 368 u8 ip_proto; 369 __be32 src_ip; 370 __be32 dst_ip; 371 __be16 src_port; 372 __be16 dst_port; 373 int nhoff = skb_network_offset(skb); 374 int ret = 0; 375 376 if (skb->encapsulation) 377 return -EPROTONOSUPPORT; 378 379 if (skb->protocol != htons(ETH_P_IP)) 380 return -EPROTONOSUPPORT; 381 382 ip = (const struct iphdr *)(skb->data + nhoff); 383 if (ip_is_fragment(ip)) 384 return -EPROTONOSUPPORT; 385 386 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP)) 387 return -EPROTONOSUPPORT; 388 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); 389 390 ip_proto = ip->protocol; 391 src_ip = ip->saddr; 392 dst_ip = ip->daddr; 393 src_port = ports[0]; 394 dst_port = ports[1]; 395 396 spin_lock_bh(&priv->filters_lock); 397 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto, 398 src_port, dst_port); 399 if (filter) { 400 if (filter->rxq_index == rxq_index) 401 goto out; 402 403 filter->rxq_index = rxq_index; 404 } else { 405 filter = mlx4_en_filter_alloc(priv, rxq_index, 406 src_ip, dst_ip, ip_proto, 407 src_port, dst_port, flow_id); 408 if (!filter) { 409 ret = -ENOMEM; 410 goto err; 411 } 412 } 413 414 queue_work(priv->mdev->workqueue, &filter->work); 415 416out: 417 ret = filter->id; 418err: 419 spin_unlock_bh(&priv->filters_lock); 420 421 return ret; 422} 423 424void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv) 425{ 426 struct mlx4_en_filter *filter, *tmp; 427 LIST_HEAD(del_list); 428 429 spin_lock_bh(&priv->filters_lock); 430 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 431 list_move(&filter->next, &del_list); 432 hlist_del(&filter->filter_chain); 433 } 434 spin_unlock_bh(&priv->filters_lock); 435 436 list_for_each_entry_safe(filter, tmp, &del_list, next) { 437 cancel_work_sync(&filter->work); 438 mlx4_en_filter_free(filter); 439 } 440} 441 442static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) 443{ 444 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; 445 LIST_HEAD(del_list); 446 int i = 0; 447 448 spin_lock_bh(&priv->filters_lock); 449 list_for_each_entry_safe(filter, tmp, &priv->filters, next) { 450 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) 451 break; 452 453 if (filter->activated && 454 !work_pending(&filter->work) && 455 rps_may_expire_flow(priv->dev, 456 filter->rxq_index, filter->flow_id, 457 filter->id)) { 458 list_move(&filter->next, &del_list); 459 hlist_del(&filter->filter_chain); 460 } else 461 last_filter = filter; 462 463 i++; 464 } 465 466 if (last_filter && (&last_filter->next != priv->filters.next)) 467 list_move(&priv->filters, &last_filter->next); 468 469 spin_unlock_bh(&priv->filters_lock); 470 471 list_for_each_entry_safe(filter, tmp, &del_list, next) 472 mlx4_en_filter_free(filter); 473} 474#endif 475 476static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, 477 __be16 proto, u16 vid) 478{ 479 struct mlx4_en_priv *priv = netdev_priv(dev); 480 struct mlx4_en_dev *mdev = priv->mdev; 481 int err; 482 int idx; 483 484 en_dbg(HW, priv, "adding VLAN:%d\n", vid); 485 486 set_bit(vid, priv->active_vlans); 487 488 /* Add VID to port VLAN filter */ 489 mutex_lock(&mdev->state_lock); 490 if (mdev->device_up && priv->port_up) { 491 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 492 if (err) { 493 en_err(priv, "Failed configuring VLAN filter\n"); 494 goto out; 495 } 496 } 497 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 498 if (err) 499 en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 500 501out: 502 mutex_unlock(&mdev->state_lock); 503 return err; 504} 505 506static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 507 __be16 proto, u16 vid) 508{ 509 struct mlx4_en_priv *priv = netdev_priv(dev); 510 struct mlx4_en_dev *mdev = priv->mdev; 511 int err = 0; 512 513 en_dbg(HW, priv, "Killing VID:%d\n", vid); 514 515 clear_bit(vid, priv->active_vlans); 516 517 /* Remove VID from port VLAN filter */ 518 mutex_lock(&mdev->state_lock); 519 mlx4_unregister_vlan(mdev->dev, priv->port, vid); 520 521 if (mdev->device_up && priv->port_up) { 522 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 523 if (err) 524 en_err(priv, "Failed configuring VLAN filter\n"); 525 } 526 mutex_unlock(&mdev->state_lock); 527 528 return err; 529} 530 531static void mlx4_en_u64_to_mac(struct net_device *dev, u64 src_mac) 532{ 533 u8 addr[ETH_ALEN]; 534 535 u64_to_ether_addr(src_mac, addr); 536 eth_hw_addr_set(dev, addr); 537} 538 539 540static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, 541 const unsigned char *addr, 542 int qpn, u64 *reg_id) 543{ 544 int err; 545 546 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 547 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 548 return 0; /* do nothing */ 549 550 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, 551 MLX4_DOMAIN_NIC, reg_id); 552 if (err) { 553 en_err(priv, "failed to add vxlan steering rule, err %d\n", err); 554 return err; 555 } 556 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id); 557 return 0; 558} 559 560 561static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, 562 const unsigned char *mac, int *qpn, u64 *reg_id) 563{ 564 struct mlx4_en_dev *mdev = priv->mdev; 565 struct mlx4_dev *dev = mdev->dev; 566 int err; 567 568 switch (dev->caps.steering_mode) { 569 case MLX4_STEERING_MODE_B0: { 570 struct mlx4_qp qp; 571 u8 gid[16] = {0}; 572 573 qp.qpn = *qpn; 574 memcpy(&gid[10], mac, ETH_ALEN); 575 gid[5] = priv->port; 576 577 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); 578 break; 579 } 580 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 581 struct mlx4_spec_list spec_eth = { {NULL} }; 582 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); 583 584 struct mlx4_net_trans_rule rule = { 585 .queue_mode = MLX4_NET_TRANS_Q_FIFO, 586 .exclusive = 0, 587 .allow_loopback = 1, 588 .promisc_mode = MLX4_FS_REGULAR, 589 .priority = MLX4_DOMAIN_NIC, 590 }; 591 592 rule.port = priv->port; 593 rule.qpn = *qpn; 594 INIT_LIST_HEAD(&rule.list); 595 596 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; 597 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); 598 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); 599 list_add_tail(&spec_eth.list, &rule.list); 600 601 err = mlx4_flow_attach(dev, &rule, reg_id); 602 break; 603 } 604 default: 605 return -EINVAL; 606 } 607 if (err) 608 en_warn(priv, "Failed Attaching Unicast\n"); 609 610 return err; 611} 612 613static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, 614 const unsigned char *mac, 615 int qpn, u64 reg_id) 616{ 617 struct mlx4_en_dev *mdev = priv->mdev; 618 struct mlx4_dev *dev = mdev->dev; 619 620 switch (dev->caps.steering_mode) { 621 case MLX4_STEERING_MODE_B0: { 622 struct mlx4_qp qp; 623 u8 gid[16] = {0}; 624 625 qp.qpn = qpn; 626 memcpy(&gid[10], mac, ETH_ALEN); 627 gid[5] = priv->port; 628 629 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); 630 break; 631 } 632 case MLX4_STEERING_MODE_DEVICE_MANAGED: { 633 mlx4_flow_detach(dev, reg_id); 634 break; 635 } 636 default: 637 en_err(priv, "Invalid steering mode.\n"); 638 } 639} 640 641static int mlx4_en_get_qp(struct mlx4_en_priv *priv) 642{ 643 struct mlx4_en_dev *mdev = priv->mdev; 644 struct mlx4_dev *dev = mdev->dev; 645 int index = 0; 646 int err = 0; 647 int *qpn = &priv->base_qpn; 648 u64 mac = ether_addr_to_u64(priv->dev->dev_addr); 649 650 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", 651 priv->dev->dev_addr); 652 index = mlx4_register_mac(dev, priv->port, mac); 653 if (index < 0) { 654 err = index; 655 en_err(priv, "Failed adding MAC: %pM\n", 656 priv->dev->dev_addr); 657 return err; 658 } 659 660 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode); 661 662 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 663 int base_qpn = mlx4_get_base_qpn(dev, priv->port); 664 *qpn = base_qpn + index; 665 return 0; 666 } 667 668 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP, 669 MLX4_RES_USAGE_DRIVER); 670 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); 671 if (err) { 672 en_err(priv, "Failed to reserve qp for mac registration\n"); 673 mlx4_unregister_mac(dev, priv->port, mac); 674 return err; 675 } 676 677 return 0; 678} 679 680static void mlx4_en_put_qp(struct mlx4_en_priv *priv) 681{ 682 struct mlx4_en_dev *mdev = priv->mdev; 683 struct mlx4_dev *dev = mdev->dev; 684 int qpn = priv->base_qpn; 685 686 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { 687 u64 mac = ether_addr_to_u64(priv->dev->dev_addr); 688 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", 689 priv->dev->dev_addr); 690 mlx4_unregister_mac(dev, priv->port, mac); 691 } else { 692 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", 693 priv->port, qpn); 694 mlx4_qp_release_range(dev, qpn, 1); 695 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 696 } 697} 698 699static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, 700 unsigned char *new_mac, unsigned char *prev_mac) 701{ 702 struct mlx4_en_dev *mdev = priv->mdev; 703 struct mlx4_dev *dev = mdev->dev; 704 int err = 0; 705 u64 new_mac_u64 = ether_addr_to_u64(new_mac); 706 707 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { 708 struct hlist_head *bucket; 709 unsigned int mac_hash; 710 struct mlx4_mac_entry *entry; 711 struct hlist_node *tmp; 712 u64 prev_mac_u64 = ether_addr_to_u64(prev_mac); 713 714 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; 715 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 716 if (ether_addr_equal_64bits(entry->mac, prev_mac)) { 717 mlx4_en_uc_steer_release(priv, entry->mac, 718 qpn, entry->reg_id); 719 mlx4_unregister_mac(dev, priv->port, 720 prev_mac_u64); 721 hlist_del_rcu(&entry->hlist); 722 synchronize_rcu(); 723 memcpy(entry->mac, new_mac, ETH_ALEN); 724 entry->reg_id = 0; 725 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; 726 hlist_add_head_rcu(&entry->hlist, 727 &priv->mac_hash[mac_hash]); 728 mlx4_register_mac(dev, priv->port, new_mac_u64); 729 err = mlx4_en_uc_steer_add(priv, new_mac, 730 &qpn, 731 &entry->reg_id); 732 if (err) 733 return err; 734 if (priv->tunnel_reg_id) { 735 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 736 priv->tunnel_reg_id = 0; 737 } 738 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn, 739 &priv->tunnel_reg_id); 740 return err; 741 } 742 } 743 return -EINVAL; 744 } 745 746 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); 747} 748 749static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv, 750 unsigned char new_mac[ETH_ALEN + 2]) 751{ 752 struct mlx4_en_dev *mdev = priv->mdev; 753 int err; 754 755 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN)) 756 return; 757 758 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac); 759 if (err) 760 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n", 761 new_mac, priv->port, err); 762} 763 764static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv, 765 unsigned char new_mac[ETH_ALEN + 2]) 766{ 767 int err = 0; 768 769 if (priv->port_up) { 770 /* Remove old MAC and insert the new one */ 771 err = mlx4_en_replace_mac(priv, priv->base_qpn, 772 new_mac, priv->current_mac); 773 if (err) 774 en_err(priv, "Failed changing HW MAC address\n"); 775 } else 776 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); 777 778 if (!err) 779 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac)); 780 781 return err; 782} 783 784static int mlx4_en_set_mac(struct net_device *dev, void *addr) 785{ 786 struct mlx4_en_priv *priv = netdev_priv(dev); 787 struct mlx4_en_dev *mdev = priv->mdev; 788 struct sockaddr *saddr = addr; 789 unsigned char new_mac[ETH_ALEN + 2]; 790 int err; 791 792 if (!is_valid_ether_addr(saddr->sa_data)) 793 return -EADDRNOTAVAIL; 794 795 mutex_lock(&mdev->state_lock); 796 memcpy(new_mac, saddr->sa_data, ETH_ALEN); 797 err = mlx4_en_do_set_mac(priv, new_mac); 798 if (err) 799 goto out; 800 801 eth_hw_addr_set(dev, saddr->sa_data); 802 mlx4_en_update_user_mac(priv, new_mac); 803out: 804 mutex_unlock(&mdev->state_lock); 805 806 return err; 807} 808 809static void mlx4_en_clear_list(struct net_device *dev) 810{ 811 struct mlx4_en_priv *priv = netdev_priv(dev); 812 struct mlx4_en_mc_list *tmp, *mc_to_del; 813 814 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { 815 list_del(&mc_to_del->list); 816 kfree(mc_to_del); 817 } 818} 819 820static void mlx4_en_cache_mclist(struct net_device *dev) 821{ 822 struct mlx4_en_priv *priv = netdev_priv(dev); 823 struct netdev_hw_addr *ha; 824 struct mlx4_en_mc_list *tmp; 825 826 mlx4_en_clear_list(dev); 827 netdev_for_each_mc_addr(ha, dev) { 828 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); 829 if (!tmp) { 830 mlx4_en_clear_list(dev); 831 return; 832 } 833 memcpy(tmp->addr, ha->addr, ETH_ALEN); 834 list_add_tail(&tmp->list, &priv->mc_list); 835 } 836} 837 838static void update_mclist_flags(struct mlx4_en_priv *priv, 839 struct list_head *dst, 840 struct list_head *src) 841{ 842 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; 843 bool found; 844 845 /* Find all the entries that should be removed from dst, 846 * These are the entries that are not found in src 847 */ 848 list_for_each_entry(dst_tmp, dst, list) { 849 found = false; 850 list_for_each_entry(src_tmp, src, list) { 851 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 852 found = true; 853 break; 854 } 855 } 856 if (!found) 857 dst_tmp->action = MCLIST_REM; 858 } 859 860 /* Add entries that exist in src but not in dst 861 * mark them as need to add 862 */ 863 list_for_each_entry(src_tmp, src, list) { 864 found = false; 865 list_for_each_entry(dst_tmp, dst, list) { 866 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) { 867 dst_tmp->action = MCLIST_NONE; 868 found = true; 869 break; 870 } 871 } 872 if (!found) { 873 new_mc = kmemdup(src_tmp, 874 sizeof(struct mlx4_en_mc_list), 875 GFP_KERNEL); 876 if (!new_mc) 877 return; 878 879 new_mc->action = MCLIST_ADD; 880 list_add_tail(&new_mc->list, dst); 881 } 882 } 883} 884 885static void mlx4_en_set_rx_mode(struct net_device *dev) 886{ 887 struct mlx4_en_priv *priv = netdev_priv(dev); 888 889 if (!priv->port_up) 890 return; 891 892 queue_work(priv->mdev->workqueue, &priv->rx_mode_task); 893} 894 895static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, 896 struct mlx4_en_dev *mdev) 897{ 898 int err = 0; 899 900 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 901 if (netif_msg_rx_status(priv)) 902 en_warn(priv, "Entering promiscuous mode\n"); 903 priv->flags |= MLX4_EN_FLAG_PROMISC; 904 905 /* Enable promiscouos mode */ 906 switch (mdev->dev->caps.steering_mode) { 907 case MLX4_STEERING_MODE_DEVICE_MANAGED: 908 err = mlx4_flow_steer_promisc_add(mdev->dev, 909 priv->port, 910 priv->base_qpn, 911 MLX4_FS_ALL_DEFAULT); 912 if (err) 913 en_err(priv, "Failed enabling promiscuous mode\n"); 914 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 915 break; 916 917 case MLX4_STEERING_MODE_B0: 918 err = mlx4_unicast_promisc_add(mdev->dev, 919 priv->base_qpn, 920 priv->port); 921 if (err) 922 en_err(priv, "Failed enabling unicast promiscuous mode\n"); 923 924 /* Add the default qp number as multicast 925 * promisc 926 */ 927 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 928 err = mlx4_multicast_promisc_add(mdev->dev, 929 priv->base_qpn, 930 priv->port); 931 if (err) 932 en_err(priv, "Failed enabling multicast promiscuous mode\n"); 933 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 934 } 935 break; 936 937 case MLX4_STEERING_MODE_A0: 938 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 939 priv->port, 940 priv->base_qpn, 941 1); 942 if (err) 943 en_err(priv, "Failed enabling promiscuous mode\n"); 944 break; 945 } 946 947 /* Disable port multicast filter (unconditionally) */ 948 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 949 0, MLX4_MCAST_DISABLE); 950 if (err) 951 en_err(priv, "Failed disabling multicast filter\n"); 952 } 953} 954 955static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, 956 struct mlx4_en_dev *mdev) 957{ 958 int err = 0; 959 960 if (netif_msg_rx_status(priv)) 961 en_warn(priv, "Leaving promiscuous mode\n"); 962 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 963 964 /* Disable promiscouos mode */ 965 switch (mdev->dev->caps.steering_mode) { 966 case MLX4_STEERING_MODE_DEVICE_MANAGED: 967 err = mlx4_flow_steer_promisc_remove(mdev->dev, 968 priv->port, 969 MLX4_FS_ALL_DEFAULT); 970 if (err) 971 en_err(priv, "Failed disabling promiscuous mode\n"); 972 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 973 break; 974 975 case MLX4_STEERING_MODE_B0: 976 err = mlx4_unicast_promisc_remove(mdev->dev, 977 priv->base_qpn, 978 priv->port); 979 if (err) 980 en_err(priv, "Failed disabling unicast promiscuous mode\n"); 981 /* Disable Multicast promisc */ 982 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 983 err = mlx4_multicast_promisc_remove(mdev->dev, 984 priv->base_qpn, 985 priv->port); 986 if (err) 987 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 988 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 989 } 990 break; 991 992 case MLX4_STEERING_MODE_A0: 993 err = mlx4_SET_PORT_qpn_calc(mdev->dev, 994 priv->port, 995 priv->base_qpn, 0); 996 if (err) 997 en_err(priv, "Failed disabling promiscuous mode\n"); 998 break; 999 } 1000} 1001 1002static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, 1003 struct net_device *dev, 1004 struct mlx4_en_dev *mdev) 1005{ 1006 struct mlx4_en_mc_list *mclist, *tmp; 1007 u64 mcast_addr = 0; 1008 u8 mc_list[16] = {0}; 1009 int err = 0; 1010 1011 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 1012 if (dev->flags & IFF_ALLMULTI) { 1013 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1014 0, MLX4_MCAST_DISABLE); 1015 if (err) 1016 en_err(priv, "Failed disabling multicast filter\n"); 1017 1018 /* Add the default qp number as multicast promisc */ 1019 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { 1020 switch (mdev->dev->caps.steering_mode) { 1021 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1022 err = mlx4_flow_steer_promisc_add(mdev->dev, 1023 priv->port, 1024 priv->base_qpn, 1025 MLX4_FS_MC_DEFAULT); 1026 break; 1027 1028 case MLX4_STEERING_MODE_B0: 1029 err = mlx4_multicast_promisc_add(mdev->dev, 1030 priv->base_qpn, 1031 priv->port); 1032 break; 1033 1034 case MLX4_STEERING_MODE_A0: 1035 break; 1036 } 1037 if (err) 1038 en_err(priv, "Failed entering multicast promisc mode\n"); 1039 priv->flags |= MLX4_EN_FLAG_MC_PROMISC; 1040 } 1041 } else { 1042 /* Disable Multicast promisc */ 1043 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1044 switch (mdev->dev->caps.steering_mode) { 1045 case MLX4_STEERING_MODE_DEVICE_MANAGED: 1046 err = mlx4_flow_steer_promisc_remove(mdev->dev, 1047 priv->port, 1048 MLX4_FS_MC_DEFAULT); 1049 break; 1050 1051 case MLX4_STEERING_MODE_B0: 1052 err = mlx4_multicast_promisc_remove(mdev->dev, 1053 priv->base_qpn, 1054 priv->port); 1055 break; 1056 1057 case MLX4_STEERING_MODE_A0: 1058 break; 1059 } 1060 if (err) 1061 en_err(priv, "Failed disabling multicast promiscuous mode\n"); 1062 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1063 } 1064 1065 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1066 0, MLX4_MCAST_DISABLE); 1067 if (err) 1068 en_err(priv, "Failed disabling multicast filter\n"); 1069 1070 /* Flush mcast filter and init it with broadcast address */ 1071 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 1072 1, MLX4_MCAST_CONFIG); 1073 1074 /* Update multicast list - we cache all addresses so they won't 1075 * change while HW is updated holding the command semaphor */ 1076 netif_addr_lock_bh(dev); 1077 mlx4_en_cache_mclist(dev); 1078 netif_addr_unlock_bh(dev); 1079 list_for_each_entry(mclist, &priv->mc_list, list) { 1080 mcast_addr = ether_addr_to_u64(mclist->addr); 1081 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 1082 mcast_addr, 0, MLX4_MCAST_CONFIG); 1083 } 1084 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1085 0, MLX4_MCAST_ENABLE); 1086 if (err) 1087 en_err(priv, "Failed enabling multicast filter\n"); 1088 1089 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); 1090 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1091 if (mclist->action == MCLIST_REM) { 1092 /* detach this address and delete from list */ 1093 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1094 mc_list[5] = priv->port; 1095 err = mlx4_multicast_detach(mdev->dev, 1096 priv->rss_map.indir_qp, 1097 mc_list, 1098 MLX4_PROT_ETH, 1099 mclist->reg_id); 1100 if (err) 1101 en_err(priv, "Fail to detach multicast address\n"); 1102 1103 if (mclist->tunnel_reg_id) { 1104 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id); 1105 if (err) 1106 en_err(priv, "Failed to detach multicast address\n"); 1107 } 1108 1109 /* remove from list */ 1110 list_del(&mclist->list); 1111 kfree(mclist); 1112 } else if (mclist->action == MCLIST_ADD) { 1113 /* attach the address */ 1114 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1115 /* needed for B0 steering support */ 1116 mc_list[5] = priv->port; 1117 err = mlx4_multicast_attach(mdev->dev, 1118 priv->rss_map.indir_qp, 1119 mc_list, 1120 priv->port, 0, 1121 MLX4_PROT_ETH, 1122 &mclist->reg_id); 1123 if (err) 1124 en_err(priv, "Fail to attach multicast address\n"); 1125 1126 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn, 1127 &mclist->tunnel_reg_id); 1128 if (err) 1129 en_err(priv, "Failed to attach multicast address\n"); 1130 } 1131 } 1132 } 1133} 1134 1135static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, 1136 struct net_device *dev, 1137 struct mlx4_en_dev *mdev) 1138{ 1139 struct netdev_hw_addr *ha; 1140 struct mlx4_mac_entry *entry; 1141 struct hlist_node *tmp; 1142 bool found; 1143 u64 mac; 1144 int err = 0; 1145 struct hlist_head *bucket; 1146 unsigned int i; 1147 int removed = 0; 1148 u32 prev_flags; 1149 1150 /* Note that we do not need to protect our mac_hash traversal with rcu, 1151 * since all modification code is protected by mdev->state_lock 1152 */ 1153 1154 /* find what to remove */ 1155 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1156 bucket = &priv->mac_hash[i]; 1157 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1158 found = false; 1159 netdev_for_each_uc_addr(ha, dev) { 1160 if (ether_addr_equal_64bits(entry->mac, 1161 ha->addr)) { 1162 found = true; 1163 break; 1164 } 1165 } 1166 1167 /* MAC address of the port is not in uc list */ 1168 if (ether_addr_equal_64bits(entry->mac, 1169 priv->current_mac)) 1170 found = true; 1171 1172 if (!found) { 1173 mac = ether_addr_to_u64(entry->mac); 1174 mlx4_en_uc_steer_release(priv, entry->mac, 1175 priv->base_qpn, 1176 entry->reg_id); 1177 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1178 1179 hlist_del_rcu(&entry->hlist); 1180 kfree_rcu(entry, rcu); 1181 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", 1182 entry->mac, priv->port); 1183 ++removed; 1184 } 1185 } 1186 } 1187 1188 /* if we didn't remove anything, there is no use in trying to add 1189 * again once we are in a forced promisc mode state 1190 */ 1191 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) 1192 return; 1193 1194 prev_flags = priv->flags; 1195 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; 1196 1197 /* find what to add */ 1198 netdev_for_each_uc_addr(ha, dev) { 1199 found = false; 1200 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; 1201 hlist_for_each_entry(entry, bucket, hlist) { 1202 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { 1203 found = true; 1204 break; 1205 } 1206 } 1207 1208 if (!found) { 1209 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1210 if (!entry) { 1211 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", 1212 ha->addr, priv->port); 1213 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1214 break; 1215 } 1216 mac = ether_addr_to_u64(ha->addr); 1217 memcpy(entry->mac, ha->addr, ETH_ALEN); 1218 err = mlx4_register_mac(mdev->dev, priv->port, mac); 1219 if (err < 0) { 1220 en_err(priv, "Failed registering MAC %pM on port %d: %d\n", 1221 ha->addr, priv->port, err); 1222 kfree(entry); 1223 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1224 break; 1225 } 1226 err = mlx4_en_uc_steer_add(priv, ha->addr, 1227 &priv->base_qpn, 1228 &entry->reg_id); 1229 if (err) { 1230 en_err(priv, "Failed adding MAC %pM on port %d: %d\n", 1231 ha->addr, priv->port, err); 1232 mlx4_unregister_mac(mdev->dev, priv->port, mac); 1233 kfree(entry); 1234 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; 1235 break; 1236 } else { 1237 unsigned int mac_hash; 1238 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", 1239 ha->addr, priv->port); 1240 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; 1241 bucket = &priv->mac_hash[mac_hash]; 1242 hlist_add_head_rcu(&entry->hlist, bucket); 1243 } 1244 } 1245 } 1246 1247 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1248 en_warn(priv, "Forcing promiscuous mode on port:%d\n", 1249 priv->port); 1250 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { 1251 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", 1252 priv->port); 1253 } 1254} 1255 1256static void mlx4_en_do_set_rx_mode(struct work_struct *work) 1257{ 1258 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1259 rx_mode_task); 1260 struct mlx4_en_dev *mdev = priv->mdev; 1261 struct net_device *dev = priv->dev; 1262 1263 mutex_lock(&mdev->state_lock); 1264 if (!mdev->device_up) { 1265 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); 1266 goto out; 1267 } 1268 if (!priv->port_up) { 1269 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); 1270 goto out; 1271 } 1272 1273 if (!netif_carrier_ok(dev)) { 1274 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { 1275 if (priv->port_state.link_state) { 1276 netif_carrier_on(dev); 1277 en_dbg(LINK, priv, "Link Up\n"); 1278 } 1279 } 1280 } 1281 1282 if (dev->priv_flags & IFF_UNICAST_FLT) 1283 mlx4_en_do_uc_filter(priv, dev, mdev); 1284 1285 /* Promsicuous mode: disable all filters */ 1286 if ((dev->flags & IFF_PROMISC) || 1287 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { 1288 mlx4_en_set_promisc_mode(priv, mdev); 1289 goto out; 1290 } 1291 1292 /* Not in promiscuous mode */ 1293 if (priv->flags & MLX4_EN_FLAG_PROMISC) 1294 mlx4_en_clear_promisc_mode(priv, mdev); 1295 1296 mlx4_en_do_multicast(priv, dev, mdev); 1297out: 1298 mutex_unlock(&mdev->state_lock); 1299} 1300 1301static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv) 1302{ 1303 u64 reg_id; 1304 int err = 0; 1305 int *qpn = &priv->base_qpn; 1306 struct mlx4_mac_entry *entry; 1307 1308 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); 1309 if (err) 1310 return err; 1311 1312 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn, 1313 &priv->tunnel_reg_id); 1314 if (err) 1315 goto tunnel_err; 1316 1317 entry = kmalloc(sizeof(*entry), GFP_KERNEL); 1318 if (!entry) { 1319 err = -ENOMEM; 1320 goto alloc_err; 1321 } 1322 1323 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); 1324 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac)); 1325 entry->reg_id = reg_id; 1326 hlist_add_head_rcu(&entry->hlist, 1327 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); 1328 1329 return 0; 1330 1331alloc_err: 1332 if (priv->tunnel_reg_id) 1333 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1334 1335tunnel_err: 1336 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); 1337 return err; 1338} 1339 1340static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv) 1341{ 1342 u64 mac; 1343 unsigned int i; 1344 int qpn = priv->base_qpn; 1345 struct hlist_head *bucket; 1346 struct hlist_node *tmp; 1347 struct mlx4_mac_entry *entry; 1348 1349 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { 1350 bucket = &priv->mac_hash[i]; 1351 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { 1352 mac = ether_addr_to_u64(entry->mac); 1353 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n", 1354 entry->mac); 1355 mlx4_en_uc_steer_release(priv, entry->mac, 1356 qpn, entry->reg_id); 1357 1358 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac); 1359 hlist_del_rcu(&entry->hlist); 1360 kfree_rcu(entry, rcu); 1361 } 1362 } 1363 1364 if (priv->tunnel_reg_id) { 1365 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id); 1366 priv->tunnel_reg_id = 0; 1367 } 1368} 1369 1370static void mlx4_en_tx_timeout(struct net_device *dev, unsigned int txqueue) 1371{ 1372 struct mlx4_en_priv *priv = netdev_priv(dev); 1373 struct mlx4_en_dev *mdev = priv->mdev; 1374 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][txqueue]; 1375 1376 if (netif_msg_timer(priv)) 1377 en_warn(priv, "Tx timeout called on port:%d\n", priv->port); 1378 1379 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n", 1380 txqueue, tx_ring->qpn, tx_ring->sp_cqn, 1381 tx_ring->cons, tx_ring->prod); 1382 1383 priv->port_stats.tx_timeout++; 1384 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) { 1385 en_dbg(DRV, priv, "Scheduling port restart\n"); 1386 queue_work(mdev->workqueue, &priv->restart_task); 1387 } 1388} 1389 1390 1391static void 1392mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) 1393{ 1394 struct mlx4_en_priv *priv = netdev_priv(dev); 1395 1396 spin_lock_bh(&priv->stats_lock); 1397 mlx4_en_fold_software_stats(dev); 1398 netdev_stats_to_stats64(stats, &dev->stats); 1399 spin_unlock_bh(&priv->stats_lock); 1400} 1401 1402static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) 1403{ 1404 struct mlx4_en_cq *cq; 1405 int i, t; 1406 1407 /* If we haven't received a specific coalescing setting 1408 * (module param), we set the moderation parameters as follows: 1409 * - moder_cnt is set to the number of mtu sized packets to 1410 * satisfy our coalescing target. 1411 * - moder_time is set to a fixed value. 1412 */ 1413 priv->rx_frames = MLX4_EN_RX_COAL_TARGET; 1414 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 1415 priv->tx_frames = MLX4_EN_TX_COAL_PKTS; 1416 priv->tx_usecs = MLX4_EN_TX_COAL_TIME; 1417 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", 1418 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 1419 1420 /* Setup cq moderation params */ 1421 for (i = 0; i < priv->rx_ring_num; i++) { 1422 cq = priv->rx_cq[i]; 1423 cq->moder_cnt = priv->rx_frames; 1424 cq->moder_time = priv->rx_usecs; 1425 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; 1426 priv->last_moder_packets[i] = 0; 1427 priv->last_moder_bytes[i] = 0; 1428 } 1429 1430 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1431 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1432 cq = priv->tx_cq[t][i]; 1433 cq->moder_cnt = priv->tx_frames; 1434 cq->moder_time = priv->tx_usecs; 1435 } 1436 } 1437 1438 /* Reset auto-moderation params */ 1439 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; 1440 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; 1441 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; 1442 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; 1443 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; 1444 priv->adaptive_rx_coal = 1; 1445 priv->last_moder_jiffies = 0; 1446 priv->last_moder_tx_packets = 0; 1447} 1448 1449static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 1450{ 1451 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 1452 u32 pkt_rate_high, pkt_rate_low; 1453 struct mlx4_en_cq *cq; 1454 unsigned long packets; 1455 unsigned long rate; 1456 unsigned long avg_pkt_size; 1457 unsigned long rx_packets; 1458 unsigned long rx_bytes; 1459 unsigned long rx_pkt_diff; 1460 int moder_time; 1461 int ring, err; 1462 1463 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) 1464 return; 1465 1466 pkt_rate_low = READ_ONCE(priv->pkt_rate_low); 1467 pkt_rate_high = READ_ONCE(priv->pkt_rate_high); 1468 1469 for (ring = 0; ring < priv->rx_ring_num; ring++) { 1470 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets); 1471 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes); 1472 1473 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring]; 1474 packets = rx_pkt_diff; 1475 rate = packets * HZ / period; 1476 avg_pkt_size = packets ? (rx_bytes - 1477 priv->last_moder_bytes[ring]) / packets : 0; 1478 1479 /* Apply auto-moderation only when packet rate 1480 * exceeds a rate that it matters */ 1481 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && 1482 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { 1483 if (rate <= pkt_rate_low) 1484 moder_time = priv->rx_usecs_low; 1485 else if (rate >= pkt_rate_high) 1486 moder_time = priv->rx_usecs_high; 1487 else 1488 moder_time = (rate - pkt_rate_low) * 1489 (priv->rx_usecs_high - priv->rx_usecs_low) / 1490 (pkt_rate_high - pkt_rate_low) + 1491 priv->rx_usecs_low; 1492 } else { 1493 moder_time = priv->rx_usecs_low; 1494 } 1495 1496 cq = priv->rx_cq[ring]; 1497 if (moder_time != priv->last_moder_time[ring] || 1498 cq->moder_cnt != priv->rx_frames) { 1499 priv->last_moder_time[ring] = moder_time; 1500 cq->moder_time = moder_time; 1501 cq->moder_cnt = priv->rx_frames; 1502 err = mlx4_en_set_cq_moder(priv, cq); 1503 if (err) 1504 en_err(priv, "Failed modifying moderation for cq:%d\n", 1505 ring); 1506 } 1507 priv->last_moder_packets[ring] = rx_packets; 1508 priv->last_moder_bytes[ring] = rx_bytes; 1509 } 1510 1511 priv->last_moder_jiffies = jiffies; 1512} 1513 1514static void mlx4_en_do_get_stats(struct work_struct *work) 1515{ 1516 struct delayed_work *delay = to_delayed_work(work); 1517 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1518 stats_task); 1519 struct mlx4_en_dev *mdev = priv->mdev; 1520 int err; 1521 1522 mutex_lock(&mdev->state_lock); 1523 if (mdev->device_up) { 1524 if (priv->port_up) { 1525 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 1526 if (err) 1527 en_dbg(HW, priv, "Could not update stats\n"); 1528 1529 mlx4_en_auto_moderation(priv); 1530 } 1531 1532 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1533 } 1534 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { 1535 mlx4_en_do_set_mac(priv, priv->current_mac); 1536 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; 1537 } 1538 mutex_unlock(&mdev->state_lock); 1539} 1540 1541/* mlx4_en_service_task - Run service task for tasks that needed to be done 1542 * periodically 1543 */ 1544static void mlx4_en_service_task(struct work_struct *work) 1545{ 1546 struct delayed_work *delay = to_delayed_work(work); 1547 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, 1548 service_task); 1549 struct mlx4_en_dev *mdev = priv->mdev; 1550 1551 mutex_lock(&mdev->state_lock); 1552 if (mdev->device_up) { 1553 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 1554 mlx4_en_ptp_overflow_check(mdev); 1555 1556 mlx4_en_recover_from_oom(priv); 1557 queue_delayed_work(mdev->workqueue, &priv->service_task, 1558 SERVICE_TASK_DELAY); 1559 } 1560 mutex_unlock(&mdev->state_lock); 1561} 1562 1563static void mlx4_en_linkstate(struct mlx4_en_priv *priv) 1564{ 1565 struct mlx4_en_port_state *port_state = &priv->port_state; 1566 struct mlx4_en_dev *mdev = priv->mdev; 1567 struct net_device *dev = priv->dev; 1568 bool up; 1569 1570 if (mlx4_en_QUERY_PORT(mdev, priv->port)) 1571 port_state->link_state = MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN; 1572 1573 up = port_state->link_state == MLX4_PORT_STATE_DEV_EVENT_PORT_UP; 1574 if (up == netif_carrier_ok(dev)) 1575 netif_carrier_event(dev); 1576 if (!up) { 1577 en_info(priv, "Link Down\n"); 1578 netif_carrier_off(dev); 1579 } else { 1580 en_info(priv, "Link Up\n"); 1581 netif_carrier_on(dev); 1582 } 1583} 1584 1585static void mlx4_en_linkstate_work(struct work_struct *work) 1586{ 1587 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1588 linkstate_task); 1589 struct mlx4_en_dev *mdev = priv->mdev; 1590 1591 mutex_lock(&mdev->state_lock); 1592 mlx4_en_linkstate(priv); 1593 mutex_unlock(&mdev->state_lock); 1594} 1595 1596static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1597{ 1598 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx]; 1599 int numa_node = priv->mdev->dev->numa_node; 1600 1601 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL)) 1602 return -ENOMEM; 1603 1604 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node), 1605 ring->affinity_mask); 1606 return 0; 1607} 1608 1609static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx) 1610{ 1611 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask); 1612} 1613 1614static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv, 1615 int tx_ring_idx) 1616{ 1617 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx]; 1618 int rr_index = tx_ring_idx; 1619 1620 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc; 1621 tx_ring->recycle_ring = priv->rx_ring[rr_index]; 1622 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n", 1623 TX_XDP, tx_ring_idx, rr_index); 1624} 1625 1626int mlx4_en_start_port(struct net_device *dev) 1627{ 1628 struct mlx4_en_priv *priv = netdev_priv(dev); 1629 struct mlx4_en_dev *mdev = priv->mdev; 1630 struct mlx4_en_cq *cq; 1631 struct mlx4_en_tx_ring *tx_ring; 1632 int rx_index = 0; 1633 int err = 0; 1634 int i, t; 1635 int j; 1636 u8 mc_list[16] = {0}; 1637 1638 if (priv->port_up) { 1639 en_dbg(DRV, priv, "start port called while port already up\n"); 1640 return 0; 1641 } 1642 1643 INIT_LIST_HEAD(&priv->mc_list); 1644 INIT_LIST_HEAD(&priv->curr_list); 1645 INIT_LIST_HEAD(&priv->ethtool_list); 1646 memset(&priv->ethtool_rules[0], 0, 1647 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); 1648 1649 /* Calculate Rx buf size */ 1650 dev->mtu = min(dev->mtu, priv->max_mtu); 1651 mlx4_en_calc_rx_buf(dev); 1652 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 1653 1654 /* Configure rx cq's and rings */ 1655 err = mlx4_en_activate_rx_rings(priv); 1656 if (err) { 1657 en_err(priv, "Failed to activate RX rings\n"); 1658 return err; 1659 } 1660 for (i = 0; i < priv->rx_ring_num; i++) { 1661 cq = priv->rx_cq[i]; 1662 1663 err = mlx4_en_init_affinity_hint(priv, i); 1664 if (err) { 1665 en_err(priv, "Failed preparing IRQ affinity hint\n"); 1666 goto cq_err; 1667 } 1668 1669 err = mlx4_en_activate_cq(priv, cq, i); 1670 if (err) { 1671 en_err(priv, "Failed activating Rx CQ\n"); 1672 mlx4_en_free_affinity_hint(priv, i); 1673 goto cq_err; 1674 } 1675 1676 for (j = 0; j < cq->size; j++) { 1677 struct mlx4_cqe *cqe = NULL; 1678 1679 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) + 1680 priv->cqe_factor; 1681 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK; 1682 } 1683 1684 err = mlx4_en_set_cq_moder(priv, cq); 1685 if (err) { 1686 en_err(priv, "Failed setting cq moderation parameters\n"); 1687 mlx4_en_deactivate_cq(priv, cq); 1688 mlx4_en_free_affinity_hint(priv, i); 1689 goto cq_err; 1690 } 1691 mlx4_en_arm_cq(priv, cq); 1692 priv->rx_ring[i]->cqn = cq->mcq.cqn; 1693 ++rx_index; 1694 } 1695 1696 /* Set qp number */ 1697 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); 1698 err = mlx4_en_get_qp(priv); 1699 if (err) { 1700 en_err(priv, "Failed getting eth qp\n"); 1701 goto cq_err; 1702 } 1703 mdev->mac_removed[priv->port] = 0; 1704 1705 priv->counter_index = 1706 mlx4_get_default_counter_index(mdev->dev, priv->port); 1707 1708 err = mlx4_en_config_rss_steer(priv); 1709 if (err) { 1710 en_err(priv, "Failed configuring rss steering\n"); 1711 goto mac_err; 1712 } 1713 1714 err = mlx4_en_create_drop_qp(priv); 1715 if (err) 1716 goto rss_err; 1717 1718 /* Configure tx cq's and rings */ 1719 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) { 1720 u8 num_tx_rings_p_up = t == TX ? 1721 priv->num_tx_rings_p_up : priv->tx_ring_num[t]; 1722 1723 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1724 /* Configure cq */ 1725 cq = priv->tx_cq[t][i]; 1726 err = mlx4_en_activate_cq(priv, cq, i); 1727 if (err) { 1728 en_err(priv, "Failed allocating Tx CQ\n"); 1729 goto tx_err; 1730 } 1731 err = mlx4_en_set_cq_moder(priv, cq); 1732 if (err) { 1733 en_err(priv, "Failed setting cq moderation parameters\n"); 1734 mlx4_en_deactivate_cq(priv, cq); 1735 goto tx_err; 1736 } 1737 en_dbg(DRV, priv, 1738 "Resetting index of collapsed CQ:%d to -1\n", i); 1739 cq->buf->wqe_index = cpu_to_be16(0xffff); 1740 1741 /* Configure ring */ 1742 tx_ring = priv->tx_ring[t][i]; 1743 err = mlx4_en_activate_tx_ring(priv, tx_ring, 1744 cq->mcq.cqn, 1745 i / num_tx_rings_p_up); 1746 if (err) { 1747 en_err(priv, "Failed allocating Tx ring\n"); 1748 mlx4_en_deactivate_cq(priv, cq); 1749 goto tx_err; 1750 } 1751 clear_bit(MLX4_EN_TX_RING_STATE_RECOVERING, &tx_ring->state); 1752 if (t != TX_XDP) { 1753 tx_ring->tx_queue = netdev_get_tx_queue(dev, i); 1754 tx_ring->recycle_ring = NULL; 1755 1756 /* Arm CQ for TX completions */ 1757 mlx4_en_arm_cq(priv, cq); 1758 1759 } else { 1760 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring); 1761 mlx4_en_init_recycle_ring(priv, i); 1762 /* XDP TX CQ should never be armed */ 1763 } 1764 1765 /* Set initial ownership of all Tx TXBBs to SW (1) */ 1766 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) 1767 *((u32 *)(tx_ring->buf + j)) = 0xffffffff; 1768 } 1769 } 1770 1771 /* Configure port */ 1772 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 1773 priv->rx_skb_size + ETH_FCS_LEN, 1774 priv->prof->tx_pause, 1775 priv->prof->tx_ppp, 1776 priv->prof->rx_pause, 1777 priv->prof->rx_ppp); 1778 if (err) { 1779 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 1780 priv->port, err); 1781 goto tx_err; 1782 } 1783 1784 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu); 1785 if (err) { 1786 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n", 1787 dev->mtu, priv->port, err); 1788 goto tx_err; 1789 } 1790 1791 /* Set default qp number */ 1792 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 1793 if (err) { 1794 en_err(priv, "Failed setting default qp numbers\n"); 1795 goto tx_err; 1796 } 1797 1798 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 1799 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 1800 if (err) { 1801 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 1802 err); 1803 goto tx_err; 1804 } 1805 } 1806 1807 /* Init port */ 1808 en_dbg(HW, priv, "Initializing port\n"); 1809 err = mlx4_INIT_PORT(mdev->dev, priv->port); 1810 if (err) { 1811 en_err(priv, "Failed Initializing port\n"); 1812 goto tx_err; 1813 } 1814 1815 /* Set Unicast and VXLAN steering rules */ 1816 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 && 1817 mlx4_en_set_rss_steer_rules(priv)) 1818 mlx4_warn(mdev, "Failed setting steering rules\n"); 1819 1820 /* Attach rx QP to bradcast address */ 1821 eth_broadcast_addr(&mc_list[10]); 1822 mc_list[5] = priv->port; /* needed for B0 steering support */ 1823 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1824 priv->port, 0, MLX4_PROT_ETH, 1825 &priv->broadcast_id)) 1826 mlx4_warn(mdev, "Failed Attaching Broadcast\n"); 1827 1828 /* Must redo promiscuous mode setup. */ 1829 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); 1830 1831 /* Schedule multicast task to populate multicast list */ 1832 queue_work(mdev->workqueue, &priv->rx_mode_task); 1833 1834 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1835 udp_tunnel_nic_reset_ntf(dev); 1836 1837 priv->port_up = true; 1838 1839 /* Process all completions if exist to prevent 1840 * the queues freezing if they are full 1841 */ 1842 for (i = 0; i < priv->rx_ring_num; i++) { 1843 local_bh_disable(); 1844 napi_schedule(&priv->rx_cq[i]->napi); 1845 local_bh_enable(); 1846 } 1847 1848 clear_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state); 1849 netif_tx_start_all_queues(dev); 1850 netif_device_attach(dev); 1851 1852 return 0; 1853 1854tx_err: 1855 if (t == MLX4_EN_NUM_TX_TYPES) { 1856 t--; 1857 i = priv->tx_ring_num[t]; 1858 } 1859 while (t >= 0) { 1860 while (i--) { 1861 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1862 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1863 } 1864 if (!t--) 1865 break; 1866 i = priv->tx_ring_num[t]; 1867 } 1868 mlx4_en_destroy_drop_qp(priv); 1869rss_err: 1870 mlx4_en_release_rss_steer(priv); 1871mac_err: 1872 mlx4_en_put_qp(priv); 1873cq_err: 1874 while (rx_index--) { 1875 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]); 1876 mlx4_en_free_affinity_hint(priv, rx_index); 1877 } 1878 for (i = 0; i < priv->rx_ring_num; i++) 1879 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 1880 1881 return err; /* need to close devices */ 1882} 1883 1884 1885void mlx4_en_stop_port(struct net_device *dev, int detach) 1886{ 1887 struct mlx4_en_priv *priv = netdev_priv(dev); 1888 struct mlx4_en_dev *mdev = priv->mdev; 1889 struct mlx4_en_mc_list *mclist, *tmp; 1890 struct ethtool_flow_id *flow, *tmp_flow; 1891 int i, t; 1892 u8 mc_list[16] = {0}; 1893 1894 if (!priv->port_up) { 1895 en_dbg(DRV, priv, "stop port called while port already down\n"); 1896 return; 1897 } 1898 1899 /* close port*/ 1900 mlx4_CLOSE_PORT(mdev->dev, priv->port); 1901 1902 /* Synchronize with tx routine */ 1903 netif_tx_lock_bh(dev); 1904 if (detach) 1905 netif_device_detach(dev); 1906 netif_tx_stop_all_queues(dev); 1907 netif_tx_unlock_bh(dev); 1908 1909 netif_tx_disable(dev); 1910 1911 spin_lock_bh(&priv->stats_lock); 1912 mlx4_en_fold_software_stats(dev); 1913 /* Set port as not active */ 1914 priv->port_up = false; 1915 spin_unlock_bh(&priv->stats_lock); 1916 1917 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 1918 1919 /* Promsicuous mode */ 1920 if (mdev->dev->caps.steering_mode == 1921 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1922 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | 1923 MLX4_EN_FLAG_MC_PROMISC); 1924 mlx4_flow_steer_promisc_remove(mdev->dev, 1925 priv->port, 1926 MLX4_FS_ALL_DEFAULT); 1927 mlx4_flow_steer_promisc_remove(mdev->dev, 1928 priv->port, 1929 MLX4_FS_MC_DEFAULT); 1930 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { 1931 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 1932 1933 /* Disable promiscouos mode */ 1934 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, 1935 priv->port); 1936 1937 /* Disable Multicast promisc */ 1938 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { 1939 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, 1940 priv->port); 1941 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; 1942 } 1943 } 1944 1945 /* Detach All multicasts */ 1946 eth_broadcast_addr(&mc_list[10]); 1947 mc_list[5] = priv->port; /* needed for B0 steering support */ 1948 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list, 1949 MLX4_PROT_ETH, priv->broadcast_id); 1950 list_for_each_entry(mclist, &priv->curr_list, list) { 1951 memcpy(&mc_list[10], mclist->addr, ETH_ALEN); 1952 mc_list[5] = priv->port; 1953 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, 1954 mc_list, MLX4_PROT_ETH, mclist->reg_id); 1955 if (mclist->tunnel_reg_id) 1956 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id); 1957 } 1958 mlx4_en_clear_list(dev); 1959 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { 1960 list_del(&mclist->list); 1961 kfree(mclist); 1962 } 1963 1964 /* Flush multicast filter */ 1965 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); 1966 1967 /* Remove flow steering rules for the port*/ 1968 if (mdev->dev->caps.steering_mode == 1969 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1970 ASSERT_RTNL(); 1971 list_for_each_entry_safe(flow, tmp_flow, 1972 &priv->ethtool_list, list) { 1973 mlx4_flow_detach(mdev->dev, flow->id); 1974 list_del(&flow->list); 1975 } 1976 } 1977 1978 mlx4_en_destroy_drop_qp(priv); 1979 1980 /* Free TX Rings */ 1981 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 1982 for (i = 0; i < priv->tx_ring_num[t]; i++) { 1983 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]); 1984 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]); 1985 } 1986 } 1987 msleep(10); 1988 1989 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) 1990 for (i = 0; i < priv->tx_ring_num[t]; i++) 1991 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]); 1992 1993 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 1994 mlx4_en_delete_rss_steer_rules(priv); 1995 1996 /* Free RSS qps */ 1997 mlx4_en_release_rss_steer(priv); 1998 1999 /* Unregister Mac address for the port */ 2000 mlx4_en_put_qp(priv); 2001 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN)) 2002 mdev->mac_removed[priv->port] = 1; 2003 2004 /* Free RX Rings */ 2005 for (i = 0; i < priv->rx_ring_num; i++) { 2006 struct mlx4_en_cq *cq = priv->rx_cq[i]; 2007 2008 napi_synchronize(&cq->napi); 2009 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]); 2010 mlx4_en_deactivate_cq(priv, cq); 2011 2012 mlx4_en_free_affinity_hint(priv, i); 2013 } 2014} 2015 2016static void mlx4_en_restart(struct work_struct *work) 2017{ 2018 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 2019 restart_task); 2020 struct mlx4_en_dev *mdev = priv->mdev; 2021 struct net_device *dev = priv->dev; 2022 2023 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 2024 2025 rtnl_lock(); 2026 mutex_lock(&mdev->state_lock); 2027 if (priv->port_up) { 2028 mlx4_en_stop_port(dev, 1); 2029 if (mlx4_en_start_port(dev)) 2030 en_err(priv, "Failed restarting port %d\n", priv->port); 2031 } 2032 mutex_unlock(&mdev->state_lock); 2033 rtnl_unlock(); 2034} 2035 2036static void mlx4_en_clear_stats(struct net_device *dev) 2037{ 2038 struct mlx4_en_priv *priv = netdev_priv(dev); 2039 struct mlx4_en_dev *mdev = priv->mdev; 2040 struct mlx4_en_tx_ring **tx_ring; 2041 int i; 2042 2043 if (!mlx4_is_slave(mdev->dev)) 2044 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 2045 en_dbg(HW, priv, "Failed dumping statistics\n"); 2046 2047 memset(&priv->pkstats, 0, sizeof(priv->pkstats)); 2048 memset(&priv->port_stats, 0, sizeof(priv->port_stats)); 2049 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats)); 2050 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats)); 2051 memset(&priv->rx_priority_flowstats, 0, 2052 sizeof(priv->rx_priority_flowstats)); 2053 memset(&priv->tx_priority_flowstats, 0, 2054 sizeof(priv->tx_priority_flowstats)); 2055 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats)); 2056 2057 tx_ring = priv->tx_ring[TX]; 2058 for (i = 0; i < priv->tx_ring_num[TX]; i++) { 2059 tx_ring[i]->bytes = 0; 2060 tx_ring[i]->packets = 0; 2061 tx_ring[i]->tx_csum = 0; 2062 tx_ring[i]->tx_dropped = 0; 2063 tx_ring[i]->queue_stopped = 0; 2064 tx_ring[i]->wake_queue = 0; 2065 tx_ring[i]->tso_packets = 0; 2066 tx_ring[i]->xmit_more = 0; 2067 } 2068 for (i = 0; i < priv->rx_ring_num; i++) { 2069 priv->rx_ring[i]->bytes = 0; 2070 priv->rx_ring[i]->packets = 0; 2071 priv->rx_ring[i]->csum_ok = 0; 2072 priv->rx_ring[i]->csum_none = 0; 2073 priv->rx_ring[i]->csum_complete = 0; 2074 } 2075} 2076 2077static int mlx4_en_open(struct net_device *dev) 2078{ 2079 struct mlx4_en_priv *priv = netdev_priv(dev); 2080 struct mlx4_en_dev *mdev = priv->mdev; 2081 int err = 0; 2082 2083 mutex_lock(&mdev->state_lock); 2084 2085 if (!mdev->device_up) { 2086 en_err(priv, "Cannot open - device down/disabled\n"); 2087 err = -EBUSY; 2088 goto out; 2089 } 2090 2091 /* Reset HW statistics and SW counters */ 2092 mlx4_en_clear_stats(dev); 2093 2094 err = mlx4_en_start_port(dev); 2095 if (err) { 2096 en_err(priv, "Failed starting port:%d\n", priv->port); 2097 goto out; 2098 } 2099 mlx4_en_linkstate(priv); 2100out: 2101 mutex_unlock(&mdev->state_lock); 2102 return err; 2103} 2104 2105 2106static int mlx4_en_close(struct net_device *dev) 2107{ 2108 struct mlx4_en_priv *priv = netdev_priv(dev); 2109 struct mlx4_en_dev *mdev = priv->mdev; 2110 2111 en_dbg(IFDOWN, priv, "Close port called\n"); 2112 2113 mutex_lock(&mdev->state_lock); 2114 2115 mlx4_en_stop_port(dev, 0); 2116 netif_carrier_off(dev); 2117 2118 mutex_unlock(&mdev->state_lock); 2119 return 0; 2120} 2121 2122static void mlx4_en_free_resources(struct mlx4_en_priv *priv) 2123{ 2124 int i, t; 2125 2126#ifdef CONFIG_RFS_ACCEL 2127 priv->dev->rx_cpu_rmap = NULL; 2128#endif 2129 2130 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2131 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2132 if (priv->tx_ring[t] && priv->tx_ring[t][i]) 2133 mlx4_en_destroy_tx_ring(priv, 2134 &priv->tx_ring[t][i]); 2135 if (priv->tx_cq[t] && priv->tx_cq[t][i]) 2136 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2137 } 2138 kfree(priv->tx_ring[t]); 2139 kfree(priv->tx_cq[t]); 2140 } 2141 2142 for (i = 0; i < priv->rx_ring_num; i++) { 2143 if (priv->rx_ring[i]) 2144 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2145 priv->prof->rx_ring_size, priv->stride); 2146 if (priv->rx_cq[i]) 2147 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2148 } 2149 2150} 2151 2152static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 2153{ 2154 struct mlx4_en_port_profile *prof = priv->prof; 2155 int i, t; 2156 int node; 2157 2158 /* Create tx Rings */ 2159 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2160 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2161 node = cpu_to_node(i % num_online_cpus()); 2162 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i], 2163 prof->tx_ring_size, i, t, node)) 2164 goto err; 2165 2166 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i], 2167 prof->tx_ring_size, 2168 TXBB_SIZE, node, i)) 2169 goto err; 2170 } 2171 } 2172 2173 /* Create rx Rings */ 2174 for (i = 0; i < priv->rx_ring_num; i++) { 2175 node = cpu_to_node(i % num_online_cpus()); 2176 if (mlx4_en_create_cq(priv, &priv->rx_cq[i], 2177 prof->rx_ring_size, i, RX, node)) 2178 goto err; 2179 2180 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], 2181 prof->rx_ring_size, priv->stride, 2182 node, i)) 2183 goto err; 2184 2185 } 2186 2187#ifdef CONFIG_RFS_ACCEL 2188 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port); 2189#endif 2190 2191 return 0; 2192 2193err: 2194 en_err(priv, "Failed to allocate NIC resources\n"); 2195 for (i = 0; i < priv->rx_ring_num; i++) { 2196 if (priv->rx_ring[i]) 2197 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], 2198 prof->rx_ring_size, 2199 priv->stride); 2200 if (priv->rx_cq[i]) 2201 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); 2202 } 2203 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2204 for (i = 0; i < priv->tx_ring_num[t]; i++) { 2205 if (priv->tx_ring[t][i]) 2206 mlx4_en_destroy_tx_ring(priv, 2207 &priv->tx_ring[t][i]); 2208 if (priv->tx_cq[t][i]) 2209 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]); 2210 } 2211 } 2212 return -ENOMEM; 2213} 2214 2215 2216static int mlx4_en_copy_priv(struct mlx4_en_priv *dst, 2217 struct mlx4_en_priv *src, 2218 struct mlx4_en_port_profile *prof) 2219{ 2220 int t; 2221 2222 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config, 2223 sizeof(dst->hwtstamp_config)); 2224 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up; 2225 dst->rx_ring_num = prof->rx_ring_num; 2226 dst->flags = prof->flags; 2227 dst->mdev = src->mdev; 2228 dst->port = src->port; 2229 dst->dev = src->dev; 2230 dst->prof = prof; 2231 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 2232 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 2233 2234 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2235 dst->tx_ring_num[t] = prof->tx_ring_num[t]; 2236 if (!dst->tx_ring_num[t]) 2237 continue; 2238 2239 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS, 2240 sizeof(struct mlx4_en_tx_ring *), 2241 GFP_KERNEL); 2242 if (!dst->tx_ring[t]) 2243 goto err_free_tx; 2244 2245 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS, 2246 sizeof(struct mlx4_en_cq *), 2247 GFP_KERNEL); 2248 if (!dst->tx_cq[t]) { 2249 kfree(dst->tx_ring[t]); 2250 goto err_free_tx; 2251 } 2252 } 2253 2254 return 0; 2255 2256err_free_tx: 2257 while (t--) { 2258 kfree(dst->tx_ring[t]); 2259 kfree(dst->tx_cq[t]); 2260 } 2261 return -ENOMEM; 2262} 2263 2264static void mlx4_en_update_priv(struct mlx4_en_priv *dst, 2265 struct mlx4_en_priv *src) 2266{ 2267 int t; 2268 memcpy(dst->rx_ring, src->rx_ring, 2269 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num); 2270 memcpy(dst->rx_cq, src->rx_cq, 2271 sizeof(struct mlx4_en_cq *) * src->rx_ring_num); 2272 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config, 2273 sizeof(dst->hwtstamp_config)); 2274 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2275 dst->tx_ring_num[t] = src->tx_ring_num[t]; 2276 dst->tx_ring[t] = src->tx_ring[t]; 2277 dst->tx_cq[t] = src->tx_cq[t]; 2278 } 2279 dst->num_tx_rings_p_up = src->num_tx_rings_p_up; 2280 dst->rx_ring_num = src->rx_ring_num; 2281 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile)); 2282} 2283 2284int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv, 2285 struct mlx4_en_priv *tmp, 2286 struct mlx4_en_port_profile *prof, 2287 bool carry_xdp_prog) 2288{ 2289 struct bpf_prog *xdp_prog; 2290 int i, t, ret; 2291 2292 ret = mlx4_en_copy_priv(tmp, priv, prof); 2293 if (ret) { 2294 en_warn(priv, "%s: mlx4_en_copy_priv() failed, return\n", 2295 __func__); 2296 return ret; 2297 } 2298 2299 if (mlx4_en_alloc_resources(tmp)) { 2300 en_warn(priv, 2301 "%s: Resource allocation failed, using previous configuration\n", 2302 __func__); 2303 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 2304 kfree(tmp->tx_ring[t]); 2305 kfree(tmp->tx_cq[t]); 2306 } 2307 return -ENOMEM; 2308 } 2309 2310 /* All rx_rings has the same xdp_prog. Pick the first one. */ 2311 xdp_prog = rcu_dereference_protected( 2312 priv->rx_ring[0]->xdp_prog, 2313 lockdep_is_held(&priv->mdev->state_lock)); 2314 2315 if (xdp_prog && carry_xdp_prog) { 2316 bpf_prog_add(xdp_prog, tmp->rx_ring_num); 2317 for (i = 0; i < tmp->rx_ring_num; i++) 2318 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog, 2319 xdp_prog); 2320 } 2321 2322 return 0; 2323} 2324 2325void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv, 2326 struct mlx4_en_priv *tmp) 2327{ 2328 mlx4_en_free_resources(priv); 2329 mlx4_en_update_priv(priv, tmp); 2330} 2331 2332void mlx4_en_destroy_netdev(struct net_device *dev) 2333{ 2334 struct mlx4_en_priv *priv = netdev_priv(dev); 2335 struct mlx4_en_dev *mdev = priv->mdev; 2336 2337 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2338 2339 /* Unregister device - this will close the port if it was up */ 2340 if (priv->registered) { 2341 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2342 priv->port)); 2343 unregister_netdev(dev); 2344 } 2345 2346 if (priv->allocated) 2347 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 2348 2349 cancel_delayed_work(&priv->stats_task); 2350 cancel_delayed_work(&priv->service_task); 2351 /* flush any pending task for this netdev */ 2352 flush_workqueue(mdev->workqueue); 2353 2354 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 2355 mlx4_en_remove_timestamp(mdev); 2356 2357 /* Detach the netdev so tasks would not attempt to access it */ 2358 mutex_lock(&mdev->state_lock); 2359 mdev->pndev[priv->port] = NULL; 2360 mdev->upper[priv->port] = NULL; 2361 2362#ifdef CONFIG_RFS_ACCEL 2363 mlx4_en_cleanup_filters(priv); 2364#endif 2365 2366 mlx4_en_free_resources(priv); 2367 mutex_unlock(&mdev->state_lock); 2368 2369 free_netdev(dev); 2370} 2371 2372static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu) 2373{ 2374 struct mlx4_en_priv *priv = netdev_priv(dev); 2375 2376 if (mtu > MLX4_EN_MAX_XDP_MTU) { 2377 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n", 2378 mtu, MLX4_EN_MAX_XDP_MTU); 2379 return false; 2380 } 2381 2382 return true; 2383} 2384 2385static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) 2386{ 2387 struct mlx4_en_priv *priv = netdev_priv(dev); 2388 struct mlx4_en_dev *mdev = priv->mdev; 2389 int err = 0; 2390 2391 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 2392 dev->mtu, new_mtu); 2393 2394 if (priv->tx_ring_num[TX_XDP] && 2395 !mlx4_en_check_xdp_mtu(dev, new_mtu)) 2396 return -EOPNOTSUPP; 2397 2398 dev->mtu = new_mtu; 2399 2400 if (netif_running(dev)) { 2401 mutex_lock(&mdev->state_lock); 2402 if (!mdev->device_up) { 2403 /* NIC is probably restarting - let restart task reset 2404 * the port */ 2405 en_dbg(DRV, priv, "Change MTU called with card down!?\n"); 2406 } else { 2407 mlx4_en_stop_port(dev, 1); 2408 err = mlx4_en_start_port(dev); 2409 if (err) { 2410 en_err(priv, "Failed restarting port:%d\n", 2411 priv->port); 2412 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, 2413 &priv->state)) 2414 queue_work(mdev->workqueue, &priv->restart_task); 2415 } 2416 } 2417 mutex_unlock(&mdev->state_lock); 2418 } 2419 return 0; 2420} 2421 2422static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2423{ 2424 struct mlx4_en_priv *priv = netdev_priv(dev); 2425 struct mlx4_en_dev *mdev = priv->mdev; 2426 struct hwtstamp_config config; 2427 2428 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 2429 return -EFAULT; 2430 2431 /* device doesn't support time stamping */ 2432 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) 2433 return -EINVAL; 2434 2435 /* TX HW timestamp */ 2436 switch (config.tx_type) { 2437 case HWTSTAMP_TX_OFF: 2438 case HWTSTAMP_TX_ON: 2439 break; 2440 default: 2441 return -ERANGE; 2442 } 2443 2444 /* RX HW timestamp */ 2445 switch (config.rx_filter) { 2446 case HWTSTAMP_FILTER_NONE: 2447 break; 2448 case HWTSTAMP_FILTER_ALL: 2449 case HWTSTAMP_FILTER_SOME: 2450 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2451 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2452 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2453 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2454 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2455 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2456 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2457 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2458 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2459 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2460 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2461 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2462 case HWTSTAMP_FILTER_NTP_ALL: 2463 config.rx_filter = HWTSTAMP_FILTER_ALL; 2464 break; 2465 default: 2466 return -ERANGE; 2467 } 2468 2469 if (mlx4_en_reset_config(dev, config, dev->features)) { 2470 config.tx_type = HWTSTAMP_TX_OFF; 2471 config.rx_filter = HWTSTAMP_FILTER_NONE; 2472 } 2473 2474 return copy_to_user(ifr->ifr_data, &config, 2475 sizeof(config)) ? -EFAULT : 0; 2476} 2477 2478static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2479{ 2480 struct mlx4_en_priv *priv = netdev_priv(dev); 2481 2482 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config, 2483 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0; 2484} 2485 2486static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2487{ 2488 switch (cmd) { 2489 case SIOCSHWTSTAMP: 2490 return mlx4_en_hwtstamp_set(dev, ifr); 2491 case SIOCGHWTSTAMP: 2492 return mlx4_en_hwtstamp_get(dev, ifr); 2493 default: 2494 return -EOPNOTSUPP; 2495 } 2496} 2497 2498static netdev_features_t mlx4_en_fix_features(struct net_device *netdev, 2499 netdev_features_t features) 2500{ 2501 struct mlx4_en_priv *en_priv = netdev_priv(netdev); 2502 struct mlx4_en_dev *mdev = en_priv->mdev; 2503 2504 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel 2505 * enable/disable make sure S-TAG flag is always in same state as 2506 * C-TAG. 2507 */ 2508 if (features & NETIF_F_HW_VLAN_CTAG_RX && 2509 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 2510 features |= NETIF_F_HW_VLAN_STAG_RX; 2511 else 2512 features &= ~NETIF_F_HW_VLAN_STAG_RX; 2513 2514 return features; 2515} 2516 2517static int mlx4_en_set_features(struct net_device *netdev, 2518 netdev_features_t features) 2519{ 2520 struct mlx4_en_priv *priv = netdev_priv(netdev); 2521 bool reset = false; 2522 int ret = 0; 2523 2524 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) { 2525 en_info(priv, "Turn %s RX-FCS\n", 2526 (features & NETIF_F_RXFCS) ? "ON" : "OFF"); 2527 reset = true; 2528 } 2529 2530 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) { 2531 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0; 2532 2533 en_info(priv, "Turn %s RX-ALL\n", 2534 ignore_fcs_value ? "ON" : "OFF"); 2535 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev, 2536 priv->port, ignore_fcs_value); 2537 if (ret) 2538 return ret; 2539 } 2540 2541 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 2542 en_info(priv, "Turn %s RX vlan strip offload\n", 2543 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF"); 2544 reset = true; 2545 } 2546 2547 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX)) 2548 en_info(priv, "Turn %s TX vlan strip offload\n", 2549 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF"); 2550 2551 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX)) 2552 en_info(priv, "Turn %s TX S-VLAN strip offload\n", 2553 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF"); 2554 2555 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) { 2556 en_info(priv, "Turn %s loopback\n", 2557 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF"); 2558 mlx4_en_update_loopback_state(netdev, features); 2559 } 2560 2561 if (reset) { 2562 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config, 2563 features); 2564 if (ret) 2565 return ret; 2566 } 2567 2568 return 0; 2569} 2570 2571static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) 2572{ 2573 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2574 struct mlx4_en_dev *mdev = en_priv->mdev; 2575 2576 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac); 2577} 2578 2579static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos, 2580 __be16 vlan_proto) 2581{ 2582 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2583 struct mlx4_en_dev *mdev = en_priv->mdev; 2584 2585 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos, 2586 vlan_proto); 2587} 2588 2589static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate, 2590 int max_tx_rate) 2591{ 2592 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2593 struct mlx4_en_dev *mdev = en_priv->mdev; 2594 2595 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate, 2596 max_tx_rate); 2597} 2598 2599static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) 2600{ 2601 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2602 struct mlx4_en_dev *mdev = en_priv->mdev; 2603 2604 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); 2605} 2606 2607static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) 2608{ 2609 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2610 struct mlx4_en_dev *mdev = en_priv->mdev; 2611 2612 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); 2613} 2614 2615static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) 2616{ 2617 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2618 struct mlx4_en_dev *mdev = en_priv->mdev; 2619 2620 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); 2621} 2622 2623static int mlx4_en_get_vf_stats(struct net_device *dev, int vf, 2624 struct ifla_vf_stats *vf_stats) 2625{ 2626 struct mlx4_en_priv *en_priv = netdev_priv(dev); 2627 struct mlx4_en_dev *mdev = en_priv->mdev; 2628 2629 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats); 2630} 2631 2632#define PORT_ID_BYTE_LEN 8 2633static int mlx4_en_get_phys_port_id(struct net_device *dev, 2634 struct netdev_phys_item_id *ppid) 2635{ 2636 struct mlx4_en_priv *priv = netdev_priv(dev); 2637 struct mlx4_dev *mdev = priv->mdev->dev; 2638 int i; 2639 u64 phys_port_id = mdev->caps.phys_port_id[priv->port]; 2640 2641 if (!phys_port_id) 2642 return -EOPNOTSUPP; 2643 2644 ppid->id_len = sizeof(phys_port_id); 2645 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) { 2646 ppid->id[i] = phys_port_id & 0xff; 2647 phys_port_id >>= 8; 2648 } 2649 return 0; 2650} 2651 2652static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table) 2653{ 2654 struct mlx4_en_priv *priv = netdev_priv(dev); 2655 struct udp_tunnel_info ti; 2656 int ret; 2657 2658 udp_tunnel_nic_get_port(dev, table, 0, &ti); 2659 priv->vxlan_port = ti.port; 2660 2661 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port); 2662 if (ret) 2663 return ret; 2664 2665 return mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port, 2666 VXLAN_STEER_BY_OUTER_MAC, 2667 !!priv->vxlan_port); 2668} 2669 2670static const struct udp_tunnel_nic_info mlx4_udp_tunnels = { 2671 .sync_table = mlx4_udp_tunnel_sync, 2672 .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP | 2673 UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 2674 .tables = { 2675 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 2676 }, 2677}; 2678 2679static netdev_features_t mlx4_en_features_check(struct sk_buff *skb, 2680 struct net_device *dev, 2681 netdev_features_t features) 2682{ 2683 features = vlan_features_check(skb, features); 2684 features = vxlan_features_check(skb, features); 2685 2686 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does 2687 * support inner IPv6 checksums and segmentation so we need to 2688 * strip that feature if this is an IPv6 encapsulated frame. 2689 */ 2690 if (skb->encapsulation && 2691 (skb->ip_summed == CHECKSUM_PARTIAL)) { 2692 struct mlx4_en_priv *priv = netdev_priv(dev); 2693 2694 if (!priv->vxlan_port || 2695 (ip_hdr(skb)->version != 4) || 2696 (udp_hdr(skb)->dest != priv->vxlan_port)) 2697 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2698 } 2699 2700 return features; 2701} 2702 2703static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate) 2704{ 2705 struct mlx4_en_priv *priv = netdev_priv(dev); 2706 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index]; 2707 struct mlx4_update_qp_params params; 2708 int err; 2709 2710 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT)) 2711 return -EOPNOTSUPP; 2712 2713 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */ 2714 if (maxrate >> 12) { 2715 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS; 2716 params.rate_val = maxrate / 1000; 2717 } else if (maxrate) { 2718 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS; 2719 params.rate_val = maxrate; 2720 } else { /* zero serves to revoke the QP rate-limitation */ 2721 params.rate_unit = 0; 2722 params.rate_val = 0; 2723 } 2724 2725 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT, 2726 ¶ms); 2727 return err; 2728} 2729 2730static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog) 2731{ 2732 struct mlx4_en_priv *priv = netdev_priv(dev); 2733 struct mlx4_en_dev *mdev = priv->mdev; 2734 struct mlx4_en_port_profile new_prof; 2735 struct bpf_prog *old_prog; 2736 struct mlx4_en_priv *tmp; 2737 int tx_changed = 0; 2738 int xdp_ring_num; 2739 int port_up = 0; 2740 int err; 2741 int i; 2742 2743 xdp_ring_num = prog ? priv->rx_ring_num : 0; 2744 2745 /* No need to reconfigure buffers when simply swapping the 2746 * program for a new one. 2747 */ 2748 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) { 2749 if (prog) 2750 bpf_prog_add(prog, priv->rx_ring_num - 1); 2751 2752 mutex_lock(&mdev->state_lock); 2753 for (i = 0; i < priv->rx_ring_num; i++) { 2754 old_prog = rcu_dereference_protected( 2755 priv->rx_ring[i]->xdp_prog, 2756 lockdep_is_held(&mdev->state_lock)); 2757 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2758 if (old_prog) 2759 bpf_prog_put(old_prog); 2760 } 2761 mutex_unlock(&mdev->state_lock); 2762 return 0; 2763 } 2764 2765 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu)) 2766 return -EOPNOTSUPP; 2767 2768 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2769 if (!tmp) 2770 return -ENOMEM; 2771 2772 if (prog) 2773 bpf_prog_add(prog, priv->rx_ring_num - 1); 2774 2775 mutex_lock(&mdev->state_lock); 2776 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 2777 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num; 2778 2779 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) { 2780 tx_changed = 1; 2781 new_prof.tx_ring_num[TX] = 2782 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up); 2783 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n"); 2784 } 2785 2786 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false); 2787 if (err) { 2788 if (prog) 2789 bpf_prog_sub(prog, priv->rx_ring_num - 1); 2790 goto unlock_out; 2791 } 2792 2793 if (priv->port_up) { 2794 port_up = 1; 2795 mlx4_en_stop_port(dev, 1); 2796 } 2797 2798 mlx4_en_safe_replace_resources(priv, tmp); 2799 if (tx_changed) 2800 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 2801 2802 for (i = 0; i < priv->rx_ring_num; i++) { 2803 old_prog = rcu_dereference_protected( 2804 priv->rx_ring[i]->xdp_prog, 2805 lockdep_is_held(&mdev->state_lock)); 2806 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog); 2807 if (old_prog) 2808 bpf_prog_put(old_prog); 2809 } 2810 2811 if (port_up) { 2812 err = mlx4_en_start_port(dev); 2813 if (err) { 2814 en_err(priv, "Failed starting port %d for XDP change\n", 2815 priv->port); 2816 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) 2817 queue_work(mdev->workqueue, &priv->restart_task); 2818 } 2819 } 2820 2821unlock_out: 2822 mutex_unlock(&mdev->state_lock); 2823 kfree(tmp); 2824 return err; 2825} 2826 2827static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp) 2828{ 2829 switch (xdp->command) { 2830 case XDP_SETUP_PROG: 2831 return mlx4_xdp_set(dev, xdp->prog); 2832 default: 2833 return -EINVAL; 2834 } 2835} 2836 2837static const struct net_device_ops mlx4_netdev_ops = { 2838 .ndo_open = mlx4_en_open, 2839 .ndo_stop = mlx4_en_close, 2840 .ndo_start_xmit = mlx4_en_xmit, 2841 .ndo_select_queue = mlx4_en_select_queue, 2842 .ndo_get_stats64 = mlx4_en_get_stats64, 2843 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2844 .ndo_set_mac_address = mlx4_en_set_mac, 2845 .ndo_validate_addr = eth_validate_addr, 2846 .ndo_change_mtu = mlx4_en_change_mtu, 2847 .ndo_eth_ioctl = mlx4_en_ioctl, 2848 .ndo_tx_timeout = mlx4_en_tx_timeout, 2849 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2850 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2851 .ndo_set_features = mlx4_en_set_features, 2852 .ndo_fix_features = mlx4_en_fix_features, 2853 .ndo_setup_tc = __mlx4_en_setup_tc, 2854#ifdef CONFIG_RFS_ACCEL 2855 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2856#endif 2857 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2858 .ndo_features_check = mlx4_en_features_check, 2859 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2860 .ndo_bpf = mlx4_xdp, 2861}; 2862 2863static const struct net_device_ops mlx4_netdev_ops_master = { 2864 .ndo_open = mlx4_en_open, 2865 .ndo_stop = mlx4_en_close, 2866 .ndo_start_xmit = mlx4_en_xmit, 2867 .ndo_select_queue = mlx4_en_select_queue, 2868 .ndo_get_stats64 = mlx4_en_get_stats64, 2869 .ndo_set_rx_mode = mlx4_en_set_rx_mode, 2870 .ndo_set_mac_address = mlx4_en_set_mac, 2871 .ndo_validate_addr = eth_validate_addr, 2872 .ndo_change_mtu = mlx4_en_change_mtu, 2873 .ndo_tx_timeout = mlx4_en_tx_timeout, 2874 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2875 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2876 .ndo_set_vf_mac = mlx4_en_set_vf_mac, 2877 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, 2878 .ndo_set_vf_rate = mlx4_en_set_vf_rate, 2879 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, 2880 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, 2881 .ndo_get_vf_stats = mlx4_en_get_vf_stats, 2882 .ndo_get_vf_config = mlx4_en_get_vf_config, 2883 .ndo_set_features = mlx4_en_set_features, 2884 .ndo_fix_features = mlx4_en_fix_features, 2885 .ndo_setup_tc = __mlx4_en_setup_tc, 2886#ifdef CONFIG_RFS_ACCEL 2887 .ndo_rx_flow_steer = mlx4_en_filter_rfs, 2888#endif 2889 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id, 2890 .ndo_features_check = mlx4_en_features_check, 2891 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate, 2892 .ndo_bpf = mlx4_xdp, 2893}; 2894 2895struct mlx4_en_bond { 2896 struct work_struct work; 2897 struct mlx4_en_priv *priv; 2898 int is_bonded; 2899 struct mlx4_port_map port_map; 2900}; 2901 2902static void mlx4_en_bond_work(struct work_struct *work) 2903{ 2904 struct mlx4_en_bond *bond = container_of(work, 2905 struct mlx4_en_bond, 2906 work); 2907 int err = 0; 2908 struct mlx4_dev *dev = bond->priv->mdev->dev; 2909 2910 if (bond->is_bonded) { 2911 if (!mlx4_is_bonded(dev)) { 2912 err = mlx4_bond(dev); 2913 if (err) 2914 en_err(bond->priv, "Fail to bond device\n"); 2915 } 2916 if (!err) { 2917 err = mlx4_port_map_set(dev, &bond->port_map); 2918 if (err) 2919 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n", 2920 bond->port_map.port1, 2921 bond->port_map.port2, 2922 err); 2923 } 2924 } else if (mlx4_is_bonded(dev)) { 2925 err = mlx4_unbond(dev); 2926 if (err) 2927 en_err(bond->priv, "Fail to unbond device\n"); 2928 } 2929 dev_put(bond->priv->dev); 2930 kfree(bond); 2931} 2932 2933static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded, 2934 u8 v2p_p1, u8 v2p_p2) 2935{ 2936 struct mlx4_en_bond *bond = NULL; 2937 2938 bond = kzalloc(sizeof(*bond), GFP_ATOMIC); 2939 if (!bond) 2940 return -ENOMEM; 2941 2942 INIT_WORK(&bond->work, mlx4_en_bond_work); 2943 bond->priv = priv; 2944 bond->is_bonded = is_bonded; 2945 bond->port_map.port1 = v2p_p1; 2946 bond->port_map.port2 = v2p_p2; 2947 dev_hold(priv->dev); 2948 queue_work(priv->mdev->workqueue, &bond->work); 2949 return 0; 2950} 2951 2952int mlx4_en_netdev_event(struct notifier_block *this, 2953 unsigned long event, void *ptr) 2954{ 2955 struct net_device *ndev = netdev_notifier_info_to_dev(ptr); 2956 u8 port = 0; 2957 struct mlx4_en_dev *mdev; 2958 struct mlx4_dev *dev; 2959 int i, num_eth_ports = 0; 2960 bool do_bond = true; 2961 struct mlx4_en_priv *priv; 2962 u8 v2p_port1 = 0; 2963 u8 v2p_port2 = 0; 2964 2965 if (!net_eq(dev_net(ndev), &init_net)) 2966 return NOTIFY_DONE; 2967 2968 mdev = container_of(this, struct mlx4_en_dev, nb); 2969 dev = mdev->dev; 2970 2971 /* Go into this mode only when two network devices set on two ports 2972 * of the same mlx4 device are slaves of the same bonding master 2973 */ 2974 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 2975 ++num_eth_ports; 2976 if (!port && (mdev->pndev[i] == ndev)) 2977 port = i; 2978 mdev->upper[i] = mdev->pndev[i] ? 2979 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL; 2980 /* condition not met: network device is a slave */ 2981 if (!mdev->upper[i]) 2982 do_bond = false; 2983 if (num_eth_ports < 2) 2984 continue; 2985 /* condition not met: same master */ 2986 if (mdev->upper[i] != mdev->upper[i-1]) 2987 do_bond = false; 2988 } 2989 /* condition not met: 2 salves */ 2990 do_bond = (num_eth_ports == 2) ? do_bond : false; 2991 2992 /* handle only events that come with enough info */ 2993 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port) 2994 return NOTIFY_DONE; 2995 2996 priv = netdev_priv(ndev); 2997 if (do_bond) { 2998 struct netdev_notifier_bonding_info *notifier_info = ptr; 2999 struct netdev_bonding_info *bonding_info = 3000 ¬ifier_info->bonding_info; 3001 3002 /* required mode 1, 2 or 4 */ 3003 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) && 3004 (bonding_info->master.bond_mode != BOND_MODE_XOR) && 3005 (bonding_info->master.bond_mode != BOND_MODE_8023AD)) 3006 do_bond = false; 3007 3008 /* require exactly 2 slaves */ 3009 if (bonding_info->master.num_slaves != 2) 3010 do_bond = false; 3011 3012 /* calc v2p */ 3013 if (do_bond) { 3014 if (bonding_info->master.bond_mode == 3015 BOND_MODE_ACTIVEBACKUP) { 3016 /* in active-backup mode virtual ports are 3017 * mapped to the physical port of the active 3018 * slave */ 3019 if (bonding_info->slave.state == 3020 BOND_STATE_BACKUP) { 3021 if (port == 1) { 3022 v2p_port1 = 2; 3023 v2p_port2 = 2; 3024 } else { 3025 v2p_port1 = 1; 3026 v2p_port2 = 1; 3027 } 3028 } else { /* BOND_STATE_ACTIVE */ 3029 if (port == 1) { 3030 v2p_port1 = 1; 3031 v2p_port2 = 1; 3032 } else { 3033 v2p_port1 = 2; 3034 v2p_port2 = 2; 3035 } 3036 } 3037 } else { /* Active-Active */ 3038 /* in active-active mode a virtual port is 3039 * mapped to the native physical port if and only 3040 * if the physical port is up */ 3041 __s8 link = bonding_info->slave.link; 3042 3043 if (port == 1) 3044 v2p_port2 = 2; 3045 else 3046 v2p_port1 = 1; 3047 if ((link == BOND_LINK_UP) || 3048 (link == BOND_LINK_FAIL)) { 3049 if (port == 1) 3050 v2p_port1 = 1; 3051 else 3052 v2p_port2 = 2; 3053 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */ 3054 if (port == 1) 3055 v2p_port1 = 2; 3056 else 3057 v2p_port2 = 1; 3058 } 3059 } 3060 } 3061 } 3062 3063 mlx4_en_queue_bond_work(priv, do_bond, 3064 v2p_port1, v2p_port2); 3065 3066 return NOTIFY_DONE; 3067} 3068 3069void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev, 3070 struct mlx4_en_stats_bitmap *stats_bitmap, 3071 u8 rx_ppp, u8 rx_pause, 3072 u8 tx_ppp, u8 tx_pause) 3073{ 3074 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS; 3075 3076 if (!mlx4_is_slave(dev) && 3077 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) { 3078 mutex_lock(&stats_bitmap->mutex); 3079 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS); 3080 3081 if (rx_ppp) 3082 bitmap_set(stats_bitmap->bitmap, last_i, 3083 NUM_FLOW_PRIORITY_STATS_RX); 3084 last_i += NUM_FLOW_PRIORITY_STATS_RX; 3085 3086 if (rx_pause && !(rx_ppp)) 3087 bitmap_set(stats_bitmap->bitmap, last_i, 3088 NUM_FLOW_STATS_RX); 3089 last_i += NUM_FLOW_STATS_RX; 3090 3091 if (tx_ppp) 3092 bitmap_set(stats_bitmap->bitmap, last_i, 3093 NUM_FLOW_PRIORITY_STATS_TX); 3094 last_i += NUM_FLOW_PRIORITY_STATS_TX; 3095 3096 if (tx_pause && !(tx_ppp)) 3097 bitmap_set(stats_bitmap->bitmap, last_i, 3098 NUM_FLOW_STATS_TX); 3099 last_i += NUM_FLOW_STATS_TX; 3100 3101 mutex_unlock(&stats_bitmap->mutex); 3102 } 3103} 3104 3105void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, 3106 struct mlx4_en_stats_bitmap *stats_bitmap, 3107 u8 rx_ppp, u8 rx_pause, 3108 u8 tx_ppp, u8 tx_pause) 3109{ 3110 int last_i = 0; 3111 3112 mutex_init(&stats_bitmap->mutex); 3113 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS); 3114 3115 if (mlx4_is_slave(dev)) { 3116 bitmap_set(stats_bitmap->bitmap, last_i + 3117 MLX4_FIND_NETDEV_STAT(rx_packets), 1); 3118 bitmap_set(stats_bitmap->bitmap, last_i + 3119 MLX4_FIND_NETDEV_STAT(tx_packets), 1); 3120 bitmap_set(stats_bitmap->bitmap, last_i + 3121 MLX4_FIND_NETDEV_STAT(rx_bytes), 1); 3122 bitmap_set(stats_bitmap->bitmap, last_i + 3123 MLX4_FIND_NETDEV_STAT(tx_bytes), 1); 3124 bitmap_set(stats_bitmap->bitmap, last_i + 3125 MLX4_FIND_NETDEV_STAT(rx_dropped), 1); 3126 bitmap_set(stats_bitmap->bitmap, last_i + 3127 MLX4_FIND_NETDEV_STAT(tx_dropped), 1); 3128 } else { 3129 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS); 3130 } 3131 last_i += NUM_MAIN_STATS; 3132 3133 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS); 3134 last_i += NUM_PORT_STATS; 3135 3136 if (mlx4_is_master(dev)) 3137 bitmap_set(stats_bitmap->bitmap, last_i, 3138 NUM_PF_STATS); 3139 last_i += NUM_PF_STATS; 3140 3141 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap, 3142 rx_ppp, rx_pause, 3143 tx_ppp, tx_pause); 3144 last_i += NUM_FLOW_STATS; 3145 3146 if (!mlx4_is_slave(dev)) 3147 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS); 3148 last_i += NUM_PKT_STATS; 3149 3150 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS); 3151 last_i += NUM_XDP_STATS; 3152 3153 if (!mlx4_is_slave(dev)) 3154 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS); 3155 last_i += NUM_PHY_STATS; 3156} 3157 3158int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, 3159 struct mlx4_en_port_profile *prof) 3160{ 3161 struct net_device *dev; 3162 struct mlx4_en_priv *priv; 3163 int i, t; 3164 int err; 3165 3166 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), 3167 MAX_TX_RINGS, MAX_RX_RINGS); 3168 if (dev == NULL) 3169 return -ENOMEM; 3170 3171 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]); 3172 netif_set_real_num_rx_queues(dev, prof->rx_ring_num); 3173 3174 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev); 3175 dev->dev_port = port - 1; 3176 3177 /* 3178 * Initialize driver private data 3179 */ 3180 3181 priv = netdev_priv(dev); 3182 memset(priv, 0, sizeof(struct mlx4_en_priv)); 3183 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev); 3184 spin_lock_init(&priv->stats_lock); 3185 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); 3186 INIT_WORK(&priv->restart_task, mlx4_en_restart); 3187 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate_work); 3188 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 3189 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); 3190#ifdef CONFIG_RFS_ACCEL 3191 INIT_LIST_HEAD(&priv->filters); 3192 spin_lock_init(&priv->filters_lock); 3193#endif 3194 3195 priv->dev = dev; 3196 priv->mdev = mdev; 3197 priv->ddev = &mdev->pdev->dev; 3198 priv->prof = prof; 3199 priv->port = port; 3200 priv->port_up = false; 3201 priv->flags = prof->flags; 3202 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME; 3203 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | 3204 MLX4_WQE_CTRL_SOLICITED); 3205 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up; 3206 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK; 3207 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key)); 3208 3209 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) { 3210 priv->tx_ring_num[t] = prof->tx_ring_num[t]; 3211 if (!priv->tx_ring_num[t]) 3212 continue; 3213 3214 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS, 3215 sizeof(struct mlx4_en_tx_ring *), 3216 GFP_KERNEL); 3217 if (!priv->tx_ring[t]) { 3218 err = -ENOMEM; 3219 goto out; 3220 } 3221 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS, 3222 sizeof(struct mlx4_en_cq *), 3223 GFP_KERNEL); 3224 if (!priv->tx_cq[t]) { 3225 err = -ENOMEM; 3226 goto out; 3227 } 3228 } 3229 priv->rx_ring_num = prof->rx_ring_num; 3230 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; 3231 priv->cqe_size = mdev->dev->caps.cqe_size; 3232 priv->mac_index = -1; 3233 priv->msg_enable = MLX4_EN_MSG_LEVEL; 3234#ifdef CONFIG_MLX4_EN_DCB 3235 if (!mlx4_is_slave(priv->mdev->dev)) { 3236 u8 prio; 3237 3238 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) { 3239 priv->ets.prio_tc[prio] = prio; 3240 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR; 3241 } 3242 3243 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST | 3244 DCB_CAP_DCBX_VER_IEEE; 3245 priv->flags |= MLX4_EN_DCB_ENABLED; 3246 priv->cee_config.pfc_state = false; 3247 3248 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++) 3249 priv->cee_config.dcb_pfc[i] = pfc_disabled; 3250 3251 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) { 3252 dev->dcbnl_ops = &mlx4_en_dcbnl_ops; 3253 } else { 3254 en_info(priv, "enabling only PFC DCB ops\n"); 3255 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; 3256 } 3257 } 3258#endif 3259 3260 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) 3261 INIT_HLIST_HEAD(&priv->mac_hash[i]); 3262 3263 /* Query for default mac and max mtu */ 3264 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 3265 3266 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] & 3267 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP) 3268 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP; 3269 3270 /* Set default MAC */ 3271 dev->addr_len = ETH_ALEN; 3272 mlx4_en_u64_to_mac(dev, mdev->dev->caps.def_mac[priv->port]); 3273 if (!is_valid_ether_addr(dev->dev_addr)) { 3274 en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n", 3275 priv->port, dev->dev_addr); 3276 err = -EINVAL; 3277 goto out; 3278 } else if (mlx4_is_slave(priv->mdev->dev) && 3279 (priv->mdev->dev->port_random_macs & 1 << priv->port)) { 3280 /* Random MAC was assigned in mlx4_slave_cap 3281 * in mlx4_core module 3282 */ 3283 dev->addr_assign_type |= NET_ADDR_RANDOM; 3284 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); 3285 } 3286 3287 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac)); 3288 3289 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 3290 DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 3291 err = mlx4_en_alloc_resources(priv); 3292 if (err) 3293 goto out; 3294 3295 /* Initialize time stamping config */ 3296 priv->hwtstamp_config.flags = 0; 3297 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; 3298 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; 3299 3300 /* Allocate page for receive rings */ 3301 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 3302 MLX4_EN_PAGE_SIZE); 3303 if (err) { 3304 en_err(priv, "Failed to allocate page for rx qps\n"); 3305 goto out; 3306 } 3307 priv->allocated = 1; 3308 3309 /* 3310 * Initialize netdev entry points 3311 */ 3312 if (mlx4_is_master(priv->mdev->dev)) 3313 dev->netdev_ops = &mlx4_netdev_ops_master; 3314 else 3315 dev->netdev_ops = &mlx4_netdev_ops; 3316 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 3317 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); 3318 netif_set_real_num_rx_queues(dev, priv->rx_ring_num); 3319 3320 dev->ethtool_ops = &mlx4_en_ethtool_ops; 3321 3322 /* 3323 * Set driver features 3324 */ 3325 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 3326 if (mdev->LSO_support) 3327 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; 3328 3329 if (mdev->dev->caps.tunnel_offload_mode == 3330 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3331 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | 3332 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3333 NETIF_F_GSO_PARTIAL; 3334 dev->features |= NETIF_F_GSO_UDP_TUNNEL | 3335 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3336 NETIF_F_GSO_PARTIAL; 3337 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM; 3338 dev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 3339 NETIF_F_RXCSUM | 3340 NETIF_F_TSO | NETIF_F_TSO6 | 3341 NETIF_F_GSO_UDP_TUNNEL | 3342 NETIF_F_GSO_UDP_TUNNEL_CSUM | 3343 NETIF_F_GSO_PARTIAL; 3344 3345 dev->udp_tunnel_nic_info = &mlx4_udp_tunnels; 3346 } 3347 3348 dev->vlan_features = dev->hw_features; 3349 3350 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; 3351 dev->features = dev->hw_features | NETIF_F_HIGHDMA | 3352 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | 3353 NETIF_F_HW_VLAN_CTAG_FILTER; 3354 dev->hw_features |= NETIF_F_LOOPBACK | 3355 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3356 3357 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) { 3358 dev->features |= NETIF_F_HW_VLAN_STAG_RX | 3359 NETIF_F_HW_VLAN_STAG_FILTER; 3360 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX; 3361 } 3362 3363 if (mlx4_is_slave(mdev->dev)) { 3364 bool vlan_offload_disabled; 3365 int phv; 3366 3367 err = get_phv_bit(mdev->dev, port, &phv); 3368 if (!err && phv) { 3369 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3370 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV; 3371 } 3372 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port, 3373 &vlan_offload_disabled); 3374 if (!err && vlan_offload_disabled) { 3375 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3376 NETIF_F_HW_VLAN_CTAG_RX | 3377 NETIF_F_HW_VLAN_STAG_TX | 3378 NETIF_F_HW_VLAN_STAG_RX); 3379 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX | 3380 NETIF_F_HW_VLAN_CTAG_RX | 3381 NETIF_F_HW_VLAN_STAG_TX | 3382 NETIF_F_HW_VLAN_STAG_RX); 3383 } 3384 } else { 3385 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN && 3386 !(mdev->dev->caps.flags2 & 3387 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) 3388 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX; 3389 } 3390 3391 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 3392 dev->hw_features |= NETIF_F_RXFCS; 3393 3394 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS) 3395 dev->hw_features |= NETIF_F_RXALL; 3396 3397 if (mdev->dev->caps.steering_mode == 3398 MLX4_STEERING_MODE_DEVICE_MANAGED && 3399 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC) 3400 dev->hw_features |= NETIF_F_NTUPLE; 3401 3402 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) 3403 dev->priv_flags |= IFF_UNICAST_FLT; 3404 3405 /* Setting a default hash function value */ 3406 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) { 3407 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3408 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) { 3409 priv->rss_hash_fn = ETH_RSS_HASH_XOR; 3410 } else { 3411 en_warn(priv, 3412 "No RSS hash capabilities exposed, using Toeplitz\n"); 3413 priv->rss_hash_fn = ETH_RSS_HASH_TOP; 3414 } 3415 3416 /* MTU range: 68 - hw-specific max */ 3417 dev->min_mtu = ETH_MIN_MTU; 3418 dev->max_mtu = priv->max_mtu; 3419 3420 /* supports LSOv2 packets. */ 3421 netif_set_tso_max_size(dev, GSO_MAX_SIZE); 3422 3423 mdev->pndev[port] = dev; 3424 mdev->upper[port] = NULL; 3425 3426 netif_carrier_off(dev); 3427 mlx4_en_set_default_moderation(priv); 3428 3429 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]); 3430 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); 3431 3432 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 3433 3434 /* Configure port */ 3435 mlx4_en_calc_rx_buf(dev); 3436 err = mlx4_SET_PORT_general(mdev->dev, priv->port, 3437 priv->rx_skb_size + ETH_FCS_LEN, 3438 prof->tx_pause, prof->tx_ppp, 3439 prof->rx_pause, prof->rx_ppp); 3440 if (err) { 3441 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", 3442 priv->port, err); 3443 goto out; 3444 } 3445 3446 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) { 3447 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1); 3448 if (err) { 3449 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n", 3450 err); 3451 goto out; 3452 } 3453 } 3454 3455 /* Init port */ 3456 en_warn(priv, "Initializing port\n"); 3457 err = mlx4_INIT_PORT(mdev->dev, priv->port); 3458 if (err) { 3459 en_err(priv, "Failed Initializing port\n"); 3460 goto out; 3461 } 3462 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 3463 3464 /* Initialize time stamp mechanism */ 3465 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) 3466 mlx4_en_init_timestamp(mdev); 3467 3468 queue_delayed_work(mdev->workqueue, &priv->service_task, 3469 SERVICE_TASK_DELAY); 3470 3471 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap, 3472 mdev->profile.prof[priv->port].rx_ppp, 3473 mdev->profile.prof[priv->port].rx_pause, 3474 mdev->profile.prof[priv->port].tx_ppp, 3475 mdev->profile.prof[priv->port].tx_pause); 3476 3477 err = register_netdev(dev); 3478 if (err) { 3479 en_err(priv, "Netdev registration failed for port %d\n", port); 3480 goto out; 3481 } 3482 3483 priv->registered = 1; 3484 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port), 3485 dev); 3486 3487 return 0; 3488 3489out: 3490 mlx4_en_destroy_netdev(dev); 3491 return err; 3492} 3493 3494int mlx4_en_reset_config(struct net_device *dev, 3495 struct hwtstamp_config ts_config, 3496 netdev_features_t features) 3497{ 3498 struct mlx4_en_priv *priv = netdev_priv(dev); 3499 struct mlx4_en_dev *mdev = priv->mdev; 3500 struct mlx4_en_port_profile new_prof; 3501 struct mlx4_en_priv *tmp; 3502 int port_up = 0; 3503 int err = 0; 3504 3505 if (priv->hwtstamp_config.tx_type == ts_config.tx_type && 3506 priv->hwtstamp_config.rx_filter == ts_config.rx_filter && 3507 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3508 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) 3509 return 0; /* Nothing to change */ 3510 3511 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) && 3512 (features & NETIF_F_HW_VLAN_CTAG_RX) && 3513 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) { 3514 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n"); 3515 return -EINVAL; 3516 } 3517 3518 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 3519 if (!tmp) 3520 return -ENOMEM; 3521 3522 mutex_lock(&mdev->state_lock); 3523 3524 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile)); 3525 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config)); 3526 3527 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true); 3528 if (err) 3529 goto out; 3530 3531 if (priv->port_up) { 3532 port_up = 1; 3533 mlx4_en_stop_port(dev, 1); 3534 } 3535 3536 mlx4_en_safe_replace_resources(priv, tmp); 3537 3538 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) { 3539 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3540 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3541 else 3542 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3543 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) { 3544 /* RX time-stamping is OFF, update the RX vlan offload 3545 * to the latest wanted state 3546 */ 3547 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX) 3548 dev->features |= NETIF_F_HW_VLAN_CTAG_RX; 3549 else 3550 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3551 } 3552 3553 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) { 3554 if (features & NETIF_F_RXFCS) 3555 dev->features |= NETIF_F_RXFCS; 3556 else 3557 dev->features &= ~NETIF_F_RXFCS; 3558 } 3559 3560 /* RX vlan offload and RX time-stamping can't co-exist ! 3561 * Regardless of the caller's choice, 3562 * Turn Off RX vlan offload in case of time-stamping is ON 3563 */ 3564 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) { 3565 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) 3566 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n"); 3567 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; 3568 } 3569 3570 if (port_up) { 3571 err = mlx4_en_start_port(dev); 3572 if (err) 3573 en_err(priv, "Failed starting port\n"); 3574 } 3575 3576 if (!err) 3577 err = mlx4_en_moderation_update(priv); 3578out: 3579 mutex_unlock(&mdev->state_lock); 3580 kfree(tmp); 3581 if (!err) 3582 netdev_features_change(dev); 3583 return err; 3584}