cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ptp.h (2450B)

      1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
      2/* Copyright (c) 2020 Mellanox Technologies. */
      3
      4#ifndef __MLX5_EN_PTP_H__
      5#define __MLX5_EN_PTP_H__
      6
      7#include "en.h"
      8#include "en_stats.h"
      9#include <linux/ptp_classify.h>
     10
     11#define MLX5E_PTP_CHANNEL_IX 0
     12
     13struct mlx5e_ptpsq {
     14	struct mlx5e_txqsq       txqsq;
     15	struct mlx5e_cq          ts_cq;
     16	u16                      skb_fifo_cc;
     17	u16                      skb_fifo_pc;
     18	struct mlx5e_skb_fifo    skb_fifo;
     19	struct mlx5e_ptp_cq_stats *cq_stats;
     20};
     21
     22enum {
     23	MLX5E_PTP_STATE_TX,
     24	MLX5E_PTP_STATE_RX,
     25	MLX5E_PTP_STATE_NUM_STATES,
     26};
     27
     28struct mlx5e_ptp {
     29	/* data path */
     30	struct mlx5e_ptpsq         ptpsq[MLX5E_MAX_NUM_TC];
     31	struct mlx5e_rq            rq;
     32	struct napi_struct         napi;
     33	struct device             *pdev;
     34	struct net_device         *netdev;
     35	__be32                     mkey_be;
     36	u8                         num_tc;
     37	u8                         lag_port;
     38
     39	/* data path - accessed per napi poll */
     40	struct mlx5e_ch_stats     *stats;
     41
     42	/* control */
     43	struct mlx5e_priv         *priv;
     44	struct mlx5_core_dev      *mdev;
     45	struct hwtstamp_config    *tstamp;
     46	DECLARE_BITMAP(state, MLX5E_PTP_STATE_NUM_STATES);
     47};
     48
     49static inline bool mlx5e_use_ptpsq(struct sk_buff *skb)
     50{
     51	struct flow_keys fk;
     52
     53	if (!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
     54		return false;
     55
     56	if (!skb_flow_dissect_flow_keys(skb, &fk, 0))
     57		return false;
     58
     59	if (fk.basic.n_proto == htons(ETH_P_1588))
     60		return true;
     61
     62	if (fk.basic.n_proto != htons(ETH_P_IP) &&
     63	    fk.basic.n_proto != htons(ETH_P_IPV6))
     64		return false;
     65
     66	return (fk.basic.ip_proto == IPPROTO_UDP &&
     67		fk.ports.dst == htons(PTP_EV_PORT));
     68}
     69
     70int mlx5e_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,
     71		   u8 lag_port, struct mlx5e_ptp **cp);
     72void mlx5e_ptp_close(struct mlx5e_ptp *c);
     73void mlx5e_ptp_activate_channel(struct mlx5e_ptp *c);
     74void mlx5e_ptp_deactivate_channel(struct mlx5e_ptp *c);
     75int mlx5e_ptp_get_rqn(struct mlx5e_ptp *c, u32 *rqn);
     76int mlx5e_ptp_alloc_rx_fs(struct mlx5e_priv *priv);
     77void mlx5e_ptp_free_rx_fs(struct mlx5e_priv *priv);
     78int mlx5e_ptp_rx_manage_fs(struct mlx5e_priv *priv, bool set);
     79
     80enum {
     81	MLX5E_SKB_CB_CQE_HWTSTAMP  = BIT(0),
     82	MLX5E_SKB_CB_PORT_HWTSTAMP = BIT(1),
     83};
     84
     85void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,
     86				   ktime_t hwtstamp,
     87				   struct mlx5e_ptp_cq_stats *cq_stats);
     88
     89void mlx5e_skb_cb_hwtstamp_init(struct sk_buff *skb);
     90#endif /* __MLX5_EN_PTP_H__ */