cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ipoib.h (4392B)


      1/*
      2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
      3 *
      4 * This software is available to you under a choice of one of two
      5 * licenses.  You may choose to be licensed under the terms of the GNU
      6 * General Public License (GPL) Version 2, available from the file
      7 * COPYING in the main directory of this source tree, or the
      8 * OpenIB.org BSD license below:
      9 *
     10 *     Redistribution and use in source and binary forms, with or
     11 *     without modification, are permitted provided that the following
     12 *     conditions are met:
     13 *
     14 *      - Redistributions of source code must retain the above
     15 *        copyright notice, this list of conditions and the following
     16 *        disclaimer.
     17 *
     18 *      - Redistributions in binary form must reproduce the above
     19 *        copyright notice, this list of conditions and the following
     20 *        disclaimer in the documentation and/or other materials
     21 *        provided with the distribution.
     22 *
     23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     30 * SOFTWARE.
     31 */
     32
     33#ifndef __MLX5E_IPOB_H__
     34#define __MLX5E_IPOB_H__
     35
     36#ifdef CONFIG_MLX5_CORE_IPOIB
     37
     38#include <linux/mlx5/fs.h>
     39#include "en.h"
     40
     41#define MLX5I_MAX_NUM_TC 1
     42
     43extern const struct ethtool_ops mlx5i_ethtool_ops;
     44extern const struct ethtool_ops mlx5i_pkey_ethtool_ops;
     45extern const struct mlx5e_rx_handlers mlx5i_rx_handlers;
     46
     47#define MLX5_IB_GRH_BYTES       40
     48#define MLX5_IPOIB_ENCAP_LEN    4
     49#define MLX5_IPOIB_PSEUDO_LEN   20
     50#define MLX5_IPOIB_HARD_LEN     (MLX5_IPOIB_PSEUDO_LEN + MLX5_IPOIB_ENCAP_LEN)
     51
     52/* ipoib rdma netdev's private data structure */
     53struct mlx5i_priv {
     54	struct rdma_netdev rn; /* keep this first */
     55	u32 qpn;
     56	bool   sub_interface;
     57	u32    qkey;
     58	u16    pkey_index;
     59	struct mlx5i_pkey_qpn_ht *qpn_htbl;
     60	char  *mlx5e_priv[];
     61};
     62
     63int mlx5i_create_tis(struct mlx5_core_dev *mdev, u32 underlay_qpn, u32 *tisn);
     64
     65/* Underlay QP create/destroy functions */
     66int mlx5i_create_underlay_qp(struct mlx5e_priv *priv);
     67void mlx5i_destroy_underlay_qp(struct mlx5_core_dev *mdev, u32 qpn);
     68
     69/* Underlay QP state modification init/uninit functions */
     70int mlx5i_init_underlay_qp(struct mlx5e_priv *priv);
     71void mlx5i_uninit_underlay_qp(struct mlx5e_priv *priv);
     72
     73/* Allocate/Free underlay QPN to net-device hash table */
     74int mlx5i_pkey_qpn_ht_init(struct net_device *netdev);
     75void mlx5i_pkey_qpn_ht_cleanup(struct net_device *netdev);
     76
     77/* Add/Remove an underlay QPN to net-device mapping to/from the hash table */
     78int mlx5i_pkey_add_qpn(struct net_device *netdev, u32 qpn);
     79int mlx5i_pkey_del_qpn(struct net_device *netdev, u32 qpn);
     80
     81/* Get the net-device corresponding to the given underlay QPN */
     82struct net_device *mlx5i_pkey_get_netdev(struct net_device *netdev, u32 qpn);
     83
     84/* Shared ndo functions */
     85int mlx5i_dev_init(struct net_device *dev);
     86void mlx5i_dev_cleanup(struct net_device *dev);
     87int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
     88
     89/* Parent profile functions */
     90int mlx5i_init(struct mlx5_core_dev *mdev, struct net_device *netdev);
     91void mlx5i_cleanup(struct mlx5e_priv *priv);
     92
     93int mlx5i_update_nic_rx(struct mlx5e_priv *priv);
     94
     95/* Get child interface nic profile */
     96const struct mlx5e_profile *mlx5i_pkey_get_profile(void);
     97
     98/* Extract mlx5e_priv from IPoIB netdev */
     99#define mlx5i_epriv(netdev) ((void *)(((struct mlx5i_priv *)netdev_priv(netdev))->mlx5e_priv))
    100
    101struct mlx5_wqe_eth_pad {
    102	u8 rsvd0[16];
    103};
    104
    105struct mlx5i_tx_wqe {
    106	struct mlx5_wqe_ctrl_seg     ctrl;
    107	struct mlx5_wqe_datagram_seg datagram;
    108	struct mlx5_wqe_eth_pad      pad;
    109	struct mlx5_wqe_eth_seg      eth;
    110	struct mlx5_wqe_data_seg     data[];
    111};
    112
    113#define MLX5I_SQ_FETCH_WQE(sq, pi) \
    114	((struct mlx5i_tx_wqe *)mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5i_tx_wqe)))
    115
    116void mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb,
    117		   struct mlx5_av *av, u32 dqpn, u32 dqkey, bool xmit_more);
    118void mlx5i_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats);
    119
    120#endif /* CONFIG_MLX5_CORE_IPOIB */
    121#endif /* __MLX5E_IPOB_H__ */