cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tout.h (1258B)

      1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
      2/* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
      3
      4#ifndef MLX5_TIMEOUTS_H
      5#define MLX5_TIMEOUTS_H
      6
      7enum mlx5_timeouts_types {
      8	/* pre init timeouts (not read from FW) */
      9	MLX5_TO_FW_PRE_INIT_TIMEOUT_MS,
     10	MLX5_TO_FW_PRE_INIT_ON_RECOVERY_TIMEOUT_MS,
     11	MLX5_TO_FW_PRE_INIT_WARN_MESSAGE_INTERVAL_MS,
     12	MLX5_TO_FW_PRE_INIT_WAIT_MS,
     13
     14	/* init segment timeouts */
     15	MLX5_TO_FW_INIT_MS,
     16	MLX5_TO_CMD_MS,
     17
     18	/* DTOR timeouts */
     19	MLX5_TO_PCI_TOGGLE_MS,
     20	MLX5_TO_HEALTH_POLL_INTERVAL_MS,
     21	MLX5_TO_FULL_CRDUMP_MS,
     22	MLX5_TO_FW_RESET_MS,
     23	MLX5_TO_FLUSH_ON_ERROR_MS,
     24	MLX5_TO_PCI_SYNC_UPDATE_MS,
     25	MLX5_TO_TEARDOWN_MS,
     26	MLX5_TO_FSM_REACTIVATE_MS,
     27	MLX5_TO_RECLAIM_PAGES_MS,
     28	MLX5_TO_RECLAIM_VFS_PAGES_MS,
     29
     30	MAX_TIMEOUT_TYPES
     31};
     32
     33struct mlx5_core_dev;
     34int mlx5_tout_init(struct mlx5_core_dev *dev);
     35void mlx5_tout_cleanup(struct mlx5_core_dev *dev);
     36void mlx5_tout_query_iseg(struct mlx5_core_dev *dev);
     37int mlx5_tout_query_dtor(struct mlx5_core_dev *dev);
     38void mlx5_tout_set_def_val(struct mlx5_core_dev *dev);
     39u64 _mlx5_tout_ms(struct mlx5_core_dev *dev, enum mlx5_timeouts_types type);
     40
     41#define mlx5_tout_ms(dev, type) _mlx5_tout_ms(dev, MLX5_TO_##type##_MS)
     42
     43# endif /* MLX5_TIMEOUTS_H */